8db.c 52 KB

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  1. /*
  2. * This file is part of the UCB release of Plan 9. It is subject to the license
  3. * terms in the LICENSE file found in the top-level directory of this
  4. * distribution and at http://akaros.cs.berkeley.edu/files/Plan9License. No
  5. * part of the UCB release of Plan 9, including this file, may be copied,
  6. * modified, propagated, or distributed except according to the terms contained
  7. * in the LICENSE file.
  8. */
  9. #include <u.h>
  10. #include <libc.h>
  11. #include <bio.h>
  12. #include <mach.h>
  13. /*
  14. * i386-specific debugger interface
  15. * also amd64 extensions
  16. */
  17. static char *i386excep(Map*, Rgetter);
  18. static int i386trace(Map*, uint64_t, uint64_t, uint64_t,
  19. Tracer);
  20. static uint64_t i386frame(Map*, uint64_t, uint64_t, uint64_t,
  21. uint64_t);
  22. static int i386foll(Map*, uint64_t, Rgetter, uint64_t*);
  23. static int i386inst(Map*, uint64_t, char, char*, int);
  24. static int i386das(Map*, uint64_t, char*, int);
  25. static int i386instlen(Map*, uint64_t);
  26. static char STARTSYM[] = "_main";
  27. static char PROFSYM[] = "_mainp";
  28. static char FRAMENAME[] = ".frame";
  29. static char *excname[] =
  30. {
  31. [0] = "divide error",
  32. [1] = "debug exception",
  33. [4] = "overflow",
  34. [5] = "bounds check",
  35. [6] = "invalid opcode",
  36. [7] = "math coprocessor emulation",
  37. [8] = "double fault",
  38. [9] = "math coprocessor overrun",
  39. [10] = "invalid TSS",
  40. [11] = "segment not present",
  41. [12] = "stack exception",
  42. [13] = "general protection violation",
  43. [14] = "page fault",
  44. [16] = "math coprocessor error",
  45. [17] = "alignment check",
  46. [18] = "machine check",
  47. [19] = "floating-point exception",
  48. [24] = "clock",
  49. [25] = "keyboard",
  50. [27] = "modem status",
  51. [28] = "serial line status",
  52. [30] = "floppy disk",
  53. [36] = "mouse",
  54. [37] = "math coprocessor",
  55. [38] = "hard disk",
  56. [64] = "system call",
  57. };
  58. Machdata i386mach =
  59. {
  60. {0xCC, 0, 0, 0}, /* break point: INT 3 */
  61. 1, /* break point size */
  62. leswab, /* convert short to local byte order */
  63. leswal, /* convert long to local byte order */
  64. leswav, /* convert vlong to local byte order */
  65. i386trace, /* C traceback */
  66. i386frame, /* frame finder */
  67. i386excep, /* print exception */
  68. 0, /* breakpoint fixup */
  69. leieeesftos, /* single precision float printer */
  70. leieeedftos, /* double precision float printer */
  71. i386foll, /* following addresses */
  72. i386inst, /* print instruction */
  73. i386das, /* dissembler */
  74. i386instlen, /* instruction size calculation */
  75. };
  76. static char*
  77. i386excep(Map *map, Rgetter rget)
  78. {
  79. uint32_t c;
  80. uint64_t pc;
  81. static char buf[16];
  82. c = (*rget)(map, "TRAP");
  83. if(c > 64 || excname[c] == 0) {
  84. if (c == 3) {
  85. pc = (*rget)(map, "PC");
  86. if (get1(map, pc, (uint8_t*)buf, machdata->bpsize) > 0)
  87. if (memcmp(buf, machdata->bpinst, machdata->bpsize) == 0)
  88. return "breakpoint";
  89. }
  90. snprint(buf, sizeof(buf), "exception %ld", c);
  91. return buf;
  92. } else
  93. return excname[c];
  94. }
  95. static int
  96. i386trace(Map *map, uint64_t pc, uint64_t sp, uint64_t link, Tracer trace)
  97. {
  98. int i;
  99. uint64_t osp;
  100. Symbol s, f;
  101. USED(link);
  102. i = 0;
  103. osp = 0;
  104. while(findsym(pc, CTEXT, &s)) {
  105. if (osp == sp)
  106. break;
  107. osp = sp;
  108. if(strcmp(STARTSYM, s.name) == 0 || strcmp(PROFSYM, s.name) == 0)
  109. break;
  110. if(pc != s.value) { /* not at first instruction */
  111. if(findlocal(&s, FRAMENAME, &f) == 0)
  112. break;
  113. sp += f.value-mach->szaddr;
  114. }
  115. if (geta(map, sp, &pc) < 0)
  116. break;
  117. if(pc == 0)
  118. break;
  119. (*trace)(map, pc, sp, &s);
  120. sp += mach->szaddr;
  121. if(++i > 1000)
  122. break;
  123. }
  124. return i;
  125. }
  126. static uint64_t
  127. i386frame(Map *map, uint64_t addr, uint64_t pc, uint64_t sp, uint64_t link)
  128. {
  129. Symbol s, f;
  130. USED(link);
  131. while (findsym(pc, CTEXT, &s)) {
  132. if(strcmp(STARTSYM, s.name) == 0 || strcmp(PROFSYM, s.name) == 0)
  133. break;
  134. if(pc != s.value) { /* not first instruction */
  135. if(findlocal(&s, FRAMENAME, &f) == 0)
  136. break;
  137. sp += f.value-mach->szaddr;
  138. }
  139. if (s.value == addr)
  140. return sp;
  141. if (geta(map, sp, &pc) < 0)
  142. break;
  143. sp += mach->szaddr;
  144. }
  145. return 0;
  146. }
  147. /* I386/486 - Disassembler and related functions */
  148. /*
  149. * an instruction
  150. */
  151. typedef struct Instr Instr;
  152. struct Instr
  153. {
  154. uint8_t mem[1+1+1+1+2+1+1+4+4]; /* raw instruction */
  155. uint64_t addr; /* address of start of instruction */
  156. int n; /* number of bytes in instruction */
  157. char *prefix; /* instr prefix */
  158. char *segment; /* segment override */
  159. uint8_t jumptype; /* set to the operand type for jump/ret/call */
  160. uint8_t amd64;
  161. uint8_t rex; /* REX prefix (or zero) */
  162. char osize; /* 'W' or 'L' (or 'Q' on amd64) */
  163. char asize; /* address size 'W' or 'L' (or 'Q' or amd64) */
  164. uint8_t mod; /* bits 6-7 of mod r/m field */
  165. uint8_t reg; /* bits 3-5 of mod r/m field */
  166. char ss; /* bits 6-7 of SIB */
  167. char index; /* bits 3-5 of SIB */
  168. char base; /* bits 0-2 of SIB */
  169. char rip; /* RIP-relative in amd64 mode */
  170. uint8_t opre; /* f2/f3 could introduce media */
  171. int16_t seg; /* segment of far address */
  172. uint32_t disp; /* displacement */
  173. uint32_t imm; /* immediate */
  174. uint32_t imm2; /* second immediate operand */
  175. uint64_t imm64; /* big immediate */
  176. char *curr; /* fill level in output buffer */
  177. char *end; /* end of output buffer */
  178. char *err; /* error message */
  179. };
  180. /* 386 register (ha!) set */
  181. enum{
  182. AX=0,
  183. CX,
  184. DX,
  185. BX,
  186. SP,
  187. BP,
  188. SI,
  189. DI,
  190. /* amd64 */
  191. R8,
  192. R9,
  193. R10,
  194. R11,
  195. R12,
  196. R13,
  197. R14,
  198. R15
  199. };
  200. /* amd64 rex extension byte */
  201. enum{
  202. REXW = 1<<3, /* =1, 64-bit operand size */
  203. REXR = 1<<2, /* extend modrm reg */
  204. REXX = 1<<1, /* extend sib index */
  205. REXB = 1<<0 /* extend modrm r/m, sib base, or opcode reg */
  206. };
  207. /* Operand Format codes */
  208. /*
  209. %A - address size register modifier (!asize -> 'E')
  210. %C - Control register CR0/CR1/CR2
  211. %D - Debug register DR0/DR1/DR2/DR3/DR6/DR7
  212. %I - second immediate operand
  213. %O - Operand size register modifier (!osize -> 'E')
  214. %T - Test register TR6/TR7
  215. %S - size code ('W' or 'L')
  216. %W - Weird opcode: OSIZE == 'W' => "CBW"; else => "CWDE"
  217. %d - displacement 16-32 bits
  218. %e - effective address - Mod R/M value
  219. %f - floating point register F0-F7 - from Mod R/M register
  220. %g - segment register
  221. %i - immediate operand 8-32 bits
  222. %p - PC-relative - signed displacement in immediate field
  223. %r - Reg from Mod R/M
  224. %w - Weird opcode: OSIZE == 'W' => "CWD"; else => "CDQ"
  225. */
  226. typedef struct Optable Optable;
  227. struct Optable
  228. {
  229. char operand[2];
  230. void *proto; /* actually either (char*) or (Optable*) */
  231. };
  232. /* Operand decoding codes */
  233. enum {
  234. Ib = 1, /* 8-bit immediate - (no sign extension)*/
  235. Ibs, /* 8-bit immediate (sign extended) */
  236. Jbs, /* 8-bit sign-extended immediate in jump or call */
  237. Iw, /* 16-bit immediate -> imm */
  238. Iw2, /* 16-bit immediate -> imm2 */
  239. Iwd, /* Operand-sized immediate (no sign extension)*/
  240. Iwdq, /* Operand-sized immediate, possibly 64 bits */
  241. Awd, /* Address offset */
  242. Iwds, /* Operand-sized immediate (sign extended) */
  243. RM, /* Word or long R/M field with register (/r) */
  244. RMB, /* Byte R/M field with register (/r) */
  245. RMOP, /* Word or long R/M field with op code (/digit) */
  246. RMOPB, /* Byte R/M field with op code (/digit) */
  247. RMR, /* R/M register only (mod = 11) */
  248. RMM, /* R/M memory only (mod = 0/1/2) */
  249. R0, /* Base reg of Mod R/M is literal 0x00 */
  250. R1, /* Base reg of Mod R/M is literal 0x01 */
  251. FRMOP, /* Floating point R/M field with opcode */
  252. FRMEX, /* Extended floating point R/M field with opcode */
  253. JUMP, /* Jump or Call flag - no operand */
  254. RET, /* Return flag - no operand */
  255. OA, /* literal 0x0a byte */
  256. PTR, /* Seg:Displacement addr (ptr16:16 or ptr16:32) */
  257. AUX, /* Multi-byte op code - Auxiliary table */
  258. AUXMM, /* multi-byte op code - auxiliary table chosen by prefix */
  259. PRE, /* Instr Prefix */
  260. OPRE, /* Instr Prefix or media op extension */
  261. SEG, /* Segment Prefix */
  262. OPOVER, /* Operand size override */
  263. ADDOVER, /* Address size override */
  264. };
  265. static Optable optab0F00[8]=
  266. {
  267. [0x00] = 0,0, "MOVW LDT,%e",
  268. [0x01] = 0,0, "MOVW TR,%e",
  269. [0x02] = 0,0, "MOVW %e,LDT",
  270. [0x03] = 0,0, "MOVW %e,TR",
  271. [0x04] = 0,0, "VERR %e",
  272. [0x05] = 0,0, "VERW %e",
  273. };
  274. static Optable optab0F01[8]=
  275. {
  276. [0x00] = 0,0, "MOVL GDTR,%e",
  277. [0x01] = 0,0, "MOVL IDTR,%e",
  278. [0x02] = 0,0, "MOVL %e,GDTR",
  279. [0x03] = 0,0, "MOVL %e,IDTR",
  280. [0x04] = 0,0, "MOVW MSW,%e", /* word */
  281. [0x06] = 0,0, "MOVW %e,MSW", /* word */
  282. [0x07] = 0,0, "INVLPG %e", /* or SWAPGS */
  283. };
  284. static Optable optab0F01F8[1]=
  285. {
  286. [0x00] = 0,0, "SWAPGS",
  287. };
  288. /* 0F71 */
  289. /* 0F72 */
  290. /* 0F73 */
  291. static Optable optab0FAE[8]=
  292. {
  293. [0x00] = 0,0, "FXSAVE %e",
  294. [0x01] = 0,0, "FXRSTOR %e",
  295. [0x02] = 0,0, "LDMXCSR %e",
  296. [0x03] = 0,0, "STMXCSR %e",
  297. [0x05] = 0,0, "LFENCE",
  298. [0x06] = 0,0, "MFENCE",
  299. [0x07] = 0,0, "SFENCE",
  300. };
  301. /* 0F18 */
  302. /* 0F0D */
  303. static Optable optab0FBA[8]=
  304. {
  305. [0x04] = Ib,0, "BT%S %i,%e",
  306. [0x05] = Ib,0, "BTS%S %i,%e",
  307. [0x06] = Ib,0, "BTR%S %i,%e",
  308. [0x07] = Ib,0, "BTC%S %i,%e",
  309. };
  310. static Optable optab0F0F[256]=
  311. {
  312. [0x0c] = 0,0, "PI2FW %m,%M",
  313. [0x0d] = 0,0, "PI2L %m,%M",
  314. [0x1c] = 0,0, "PF2IW %m,%M",
  315. [0x1d] = 0,0, "PF2IL %m,%M",
  316. [0x8a] = 0,0, "PFNACC %m,%M",
  317. [0x8e] = 0,0, "PFPNACC %m,%M",
  318. [0x90] = 0,0, "PFCMPGE %m,%M",
  319. [0x94] = 0,0, "PFMIN %m,%M",
  320. [0x96] = 0,0, "PFRCP %m,%M",
  321. [0x97] = 0,0, "PFRSQRT %m,%M",
  322. [0x9a] = 0,0, "PFSUB %m,%M",
  323. [0x9e] = 0,0, "PFADD %m,%M",
  324. [0xa0] = 0,0, "PFCMPGT %m,%M",
  325. [0xa4] = 0,0, "PFMAX %m,%M",
  326. [0xa6] = 0,0, "PFRCPIT1 %m,%M",
  327. [0xa7] = 0,0, "PFRSQIT1 %m,%M",
  328. [0xaa] = 0,0, "PFSUBR %m,%M",
  329. [0xae] = 0,0, "PFACC %m,%M",
  330. [0xb0] = 0,0, "PFCMPEQ %m,%M",
  331. [0xb4] = 0,0, "PFMUL %m,%M",
  332. [0xb6] = 0,0, "PFRCPI2T %m,%M",
  333. [0xb7] = 0,0, "PMULHRW %m,%M",
  334. [0xbb] = 0,0, "PSWAPL %m,%M",
  335. };
  336. static Optable optab0FC7[8]=
  337. {
  338. [0x01] = 0,0, "CMPXCHG8B %e",
  339. };
  340. static Optable optab660F71[8]=
  341. {
  342. [0x02] = Ib,0, "PSRLW %i,%X",
  343. [0x04] = Ib,0, "PSRAW %i,%X",
  344. [0x06] = Ib,0, "PSLLW %i,%X",
  345. };
  346. static Optable optab660F72[8]=
  347. {
  348. [0x02] = Ib,0, "PSRLL %i,%X",
  349. [0x04] = Ib,0, "PSRAL %i,%X",
  350. [0x06] = Ib,0, "PSLLL %i,%X",
  351. };
  352. static Optable optab660F73[8]=
  353. {
  354. [0x02] = Ib,0, "PSRLQ %i,%X",
  355. [0x03] = Ib,0, "PSRLO %i,%X",
  356. [0x06] = Ib,0, "PSLLQ %i,%X",
  357. [0x07] = Ib,0, "PSLLO %i,%X",
  358. };
  359. static Optable optab660F[256]=
  360. {
  361. [0x2B] = RM,0, "MOVNTPD %x,%e",
  362. [0x2E] = RM,0, "UCOMISD %x,%X",
  363. [0x2F] = RM,0, "COMISD %x,%X",
  364. [0x5A] = RM,0, "CVTPD2PS %x,%X",
  365. [0x5B] = RM,0, "CVTPS2PL %x,%X",
  366. [0x6A] = RM,0, "PUNPCKHLQ %x,%X",
  367. [0x6B] = RM,0, "PACKSSLW %x,%X",
  368. [0x6C] = RM,0, "PUNPCKLQDQ %x,%X",
  369. [0x6D] = RM,0, "PUNPCKHQDQ %x,%X",
  370. [0x6E] = RM,0, "MOV%S %e,%X",
  371. [0x6F] = RM,0, "MOVO %x,%X", /* MOVDQA */
  372. [0x70] = RM,Ib, "PSHUFL %i,%x,%X",
  373. [0x71] = RMOP,0, optab660F71,
  374. [0x72] = RMOP,0, optab660F72,
  375. [0x73] = RMOP,0, optab660F73,
  376. [0x7E] = RM,0, "MOV%S %X,%e",
  377. [0x7F] = RM,0, "MOVO %X,%x",
  378. [0xC4] = RM,Ib, "PINSRW %i,%e,%X",
  379. [0xC5] = RMR,Ib, "PEXTRW %i,%X,%e",
  380. [0xD4] = RM,0, "PADDQ %x,%X",
  381. [0xD5] = RM,0, "PMULLW %x,%X",
  382. [0xD6] = RM,0, "MOVQ %X,%x",
  383. [0xE6] = RM,0, "CVTTPD2PL %x,%X",
  384. [0xE7] = RM,0, "MOVNTO %X,%e",
  385. [0xF7] = RM,0, "MASKMOVOU %x,%X",
  386. };
  387. static Optable optabF20F[256]=
  388. {
  389. [0x10] = RM,0, "MOVSD %x,%X",
  390. [0x11] = RM,0, "MOVSD %X,%x",
  391. [0x2A] = RM,0, "CVTS%S2SD %e,%X",
  392. [0x2C] = RM,0, "CVTTSD2S%S %x,%r",
  393. [0x2D] = RM,0, "CVTSD2S%S %x,%r",
  394. [0x5A] = RM,0, "CVTSD2SS %x,%X",
  395. [0x6F] = RM,0, "MOVOU %x,%X",
  396. [0x70] = RM,Ib, "PSHUFLW %i,%x,%X",
  397. [0x7F] = RM,0, "MOVOU %X,%x",
  398. [0xD6] = RM,0, "MOVQOZX %M,%X",
  399. [0xE6] = RM,0, "CVTPD2PL %x,%X",
  400. };
  401. static Optable optabF30F[256]=
  402. {
  403. [0x10] = RM,0, "MOVSS %x,%X",
  404. [0x11] = RM,0, "MOVSS %X,%x",
  405. [0x2A] = RM,0, "CVTS%S2SS %e,%X",
  406. [0x2C] = RM,0, "CVTTSS2S%S %x,%r",
  407. [0x2D] = RM,0, "CVTSS2S%S %x,%r",
  408. [0x5A] = RM,0, "CVTSS2SD %x,%X",
  409. [0x5B] = RM,0, "CVTTPS2PL %x,%X",
  410. [0x6F] = RM,0, "MOVOU %x,%X",
  411. [0x70] = RM,Ib, "PSHUFHW %i,%x,%X",
  412. [0x7E] = RM,0, "MOVQOZX %x,%X",
  413. [0x7F] = RM,0, "MOVOU %X,%x",
  414. [0xD6] = RM,0, "MOVQOZX %m*,%X",
  415. [0xE6] = RM,0, "CVTPL2PD %x,%X",
  416. };
  417. static Optable optab0F[256]=
  418. {
  419. [0x00] = RMOP,0, optab0F00,
  420. [0x01] = RMOP,0, optab0F01,
  421. [0x02] = RM,0, "LAR %e,%r",
  422. [0x03] = RM,0, "LSL %e,%r",
  423. [0x05] = 0,0, "SYSCALL",
  424. [0x06] = 0,0, "CLTS",
  425. [0x07] = 0,0, "SYSRET",
  426. [0x08] = 0,0, "INVD",
  427. [0x09] = 0,0, "WBINVD",
  428. [0x0B] = 0,0, "UD2",
  429. [0x0F] = RM,AUX, optab0F0F, /* 3DNow! */
  430. [0x10] = RM,0, "MOVU%s %x,%X",
  431. [0x11] = RM,0, "MOVU%s %X,%x",
  432. [0x12] = RM,0, "MOV[H]L%s %x,%X", /* TO DO: H if source is XMM */
  433. [0x13] = RM,0, "MOVL%s %X,%e",
  434. [0x14] = RM,0, "UNPCKL%s %x,%X",
  435. [0x15] = RM,0, "UNPCKH%s %x,%X",
  436. [0x16] = RM,0, "MOV[L]H%s %x,%X", /* TO DO: L if source is XMM */
  437. [0x17] = RM,0, "MOVH%s %X,%x",
  438. [0x20] = RMR,0, "MOVL %C,%e",
  439. [0x21] = RMR,0, "MOVL %D,%e",
  440. [0x22] = RMR,0, "MOVL %e,%C",
  441. [0x23] = RMR,0, "MOVL %e,%D",
  442. [0x24] = RMR,0, "MOVL %T,%e",
  443. [0x26] = RMR,0, "MOVL %e,%T",
  444. [0x28] = RM,0, "MOVA%s %x,%X",
  445. [0x29] = RM,0, "MOVA%s %X,%x",
  446. [0x2A] = RM,0, "CVTPL2%s %m*,%X",
  447. [0x2B] = RM,0, "MOVNT%s %X,%e",
  448. [0x2C] = RM,0, "CVTT%s2PL %x,%M",
  449. [0x2D] = RM,0, "CVT%s2PL %x,%M",
  450. [0x2E] = RM,0, "UCOMISS %x,%X",
  451. [0x2F] = RM,0, "COMISS %x,%X",
  452. [0x30] = 0,0, "WRMSR",
  453. [0x31] = 0,0, "RDTSC",
  454. [0x32] = 0,0, "RDMSR",
  455. [0x33] = 0,0, "RDPMC",
  456. [0x42] = RM,0, "CMOVC %e,%r", /* CF */
  457. [0x43] = RM,0, "CMOVNC %e,%r", /* ¬ CF */
  458. [0x44] = RM,0, "CMOVZ %e,%r", /* ZF */
  459. [0x45] = RM,0, "CMOVNZ %e,%r", /* ¬ ZF */
  460. [0x46] = RM,0, "CMOVBE %e,%r", /* CF ∨ ZF */
  461. [0x47] = RM,0, "CMOVA %e,%r", /* ¬CF ∧ ¬ZF */
  462. [0x48] = RM,0, "CMOVS %e,%r", /* SF */
  463. [0x49] = RM,0, "CMOVNS %e,%r", /* ¬ SF */
  464. [0x4A] = RM,0, "CMOVP %e,%r", /* PF */
  465. [0x4B] = RM,0, "CMOVNP %e,%r", /* ¬ PF */
  466. [0x4C] = RM,0, "CMOVLT %e,%r", /* LT ≡ OF ≠ SF */
  467. [0x4D] = RM,0, "CMOVGE %e,%r", /* GE ≡ ZF ∨ SF */
  468. [0x4E] = RM,0, "CMOVLE %e,%r", /* LE ≡ ZF ∨ LT */
  469. [0x4F] = RM,0, "CMOVGT %e,%r", /* GT ≡ ¬ZF ∧ GE */
  470. [0x50] = RM,0, "MOVMSK%s %X,%r", /* TO DO: check */
  471. [0x51] = RM,0, "SQRT%s %x,%X",
  472. [0x52] = RM,0, "RSQRT%s %x,%X",
  473. [0x53] = RM,0, "RCP%s %x,%X",
  474. [0x54] = RM,0, "AND%s %x,%X",
  475. [0x55] = RM,0, "ANDN%s %x,%X",
  476. [0x56] = RM,0, "OR%s %x,%X", /* TO DO: S/D */
  477. [0x57] = RM,0, "XOR%s %x,%X", /* S/D */
  478. [0x58] = RM,0, "ADD%s %x,%X", /* S/P S/D */
  479. [0x59] = RM,0, "MUL%s %x,%X",
  480. [0x5A] = RM,0, "CVTPS2PD %x,%X",
  481. [0x5B] = RM,0, "CVTPL2PS %x,%X",
  482. [0x5C] = RM,0, "SUB%s %x,%X",
  483. [0x5D] = RM,0, "MIN%s %x,%X",
  484. [0x5E] = RM,0, "DIV%s %x,%X", /* TO DO: S/P S/D */
  485. [0x5F] = RM,0, "MAX%s %x,%X",
  486. [0x60] = RM,0, "PUNPCKLBW %m,%M",
  487. [0x61] = RM,0, "PUNPCKLWL %m,%M",
  488. [0x62] = RM,0, "PUNPCKLLQ %m,%M",
  489. [0x63] = RM,0, "PACKSSWB %m,%M",
  490. [0x64] = RM,0, "PCMPGTB %m,%M",
  491. [0x65] = RM,0, "PCMPGTW %m,%M",
  492. [0x66] = RM,0, "PCMPGTL %m,%M",
  493. [0x67] = RM,0, "PACKUSWB %m,%M",
  494. [0x68] = RM,0, "PUNPCKHBW %m,%M",
  495. [0x69] = RM,0, "PUNPCKHWL %m,%M",
  496. [0x6A] = RM,0, "PUNPCKHLQ %m,%M",
  497. [0x6B] = RM,0, "PACKSSLW %m,%M",
  498. [0x6E] = RM,0, "MOV%S %e,%M",
  499. [0x6F] = RM,0, "MOVQ %m,%M",
  500. [0x70] = RM,Ib, "PSHUFW %i,%m,%M",
  501. [0x74] = RM,0, "PCMPEQB %m,%M",
  502. [0x75] = RM,0, "PCMPEQW %m,%M",
  503. [0x76] = RM,0, "PCMPEQL %m,%M",
  504. [0x7E] = RM,0, "MOV%S %M,%e",
  505. [0x7F] = RM,0, "MOVQ %M,%m",
  506. [0xAE] = RMOP,0, optab0FAE,
  507. [0xAA] = 0,0, "RSM",
  508. [0xB0] = RM,0, "CMPXCHGB %r,%e",
  509. [0xB1] = RM,0, "CMPXCHG%S %r,%e",
  510. [0xC0] = RMB,0, "XADDB %r,%e",
  511. [0xC1] = RM,0, "XADD%S %r,%e",
  512. [0xC2] = RM,Ib, "CMP%s %i,%x,%X",
  513. [0xC3] = RM,0, "MOVNTI%S %r,%e",
  514. [0xC6] = RM,Ib, "SHUF%s %i,%x,%X",
  515. [0xC8] = 0,0, "BSWAP AX",
  516. [0xC9] = 0,0, "BSWAP CX",
  517. [0xCA] = 0,0, "BSWAP DX",
  518. [0xCB] = 0,0, "BSWAP BX",
  519. [0xCC] = 0,0, "BSWAP SP",
  520. [0xCD] = 0,0, "BSWAP BP",
  521. [0xCE] = 0,0, "BSWAP SI",
  522. [0xCF] = 0,0, "BSWAP DI",
  523. [0xD1] = RM,0, "PSRLW %m,%M",
  524. [0xD2] = RM,0, "PSRLL %m,%M",
  525. [0xD3] = RM,0, "PSRLQ %m,%M",
  526. [0xD5] = RM,0, "PMULLW %m,%M",
  527. [0xD6] = RM,0, "MOVQOZX %m*,%X",
  528. [0xD7] = RM,0, "PMOVMSKB %m,%r",
  529. [0xD8] = RM,0, "PSUBUSB %m,%M",
  530. [0xD9] = RM,0, "PSUBUSW %m,%M",
  531. [0xDA] = RM,0, "PMINUB %m,%M",
  532. [0xDB] = RM,0, "PAND %m,%M",
  533. [0xDC] = RM,0, "PADDUSB %m,%M",
  534. [0xDD] = RM,0, "PADDUSW %m,%M",
  535. [0xDE] = RM,0, "PMAXUB %m,%M",
  536. [0xDF] = RM,0, "PANDN %m,%M",
  537. [0xE0] = RM,0, "PAVGB %m,%M",
  538. [0xE1] = RM,0, "PSRAW %m,%M",
  539. [0xE2] = RM,0, "PSRAL %m,%M",
  540. [0xE3] = RM,0, "PAVGW %m,%M",
  541. [0xE4] = RM,0, "PMULHUW %m,%M",
  542. [0xE5] = RM,0, "PMULHW %m,%M",
  543. [0xE7] = RM,0, "MOVNTQ %M,%e",
  544. [0xE8] = RM,0, "PSUBSB %m,%M",
  545. [0xE9] = RM,0, "PSUBSW %m,%M",
  546. [0xEA] = RM,0, "PMINSW %m,%M",
  547. [0xEB] = RM,0, "POR %m,%M",
  548. [0xEC] = RM,0, "PADDSB %m,%M",
  549. [0xED] = RM,0, "PADDSW %m,%M",
  550. [0xEE] = RM,0, "PMAXSW %m,%M",
  551. [0xEF] = RM,0, "PXOR %m,%M",
  552. [0xF1] = RM,0, "PSLLW %m,%M",
  553. [0xF2] = RM,0, "PSLLL %m,%M",
  554. [0xF3] = RM,0, "PSLLQ %m,%M",
  555. [0xF4] = RM,0, "PMULULQ %m,%M",
  556. [0xF5] = RM,0, "PMADDWL %m,%M",
  557. [0xF6] = RM,0, "PSADBW %m,%M",
  558. [0xF7] = RMR,0, "MASKMOVQ %m,%M",
  559. [0xF8] = RM,0, "PSUBB %m,%M",
  560. [0xF9] = RM,0, "PSUBW %m,%M",
  561. [0xFA] = RM,0, "PSUBL %m,%M",
  562. [0xFC] = RM,0, "PADDB %m,%M",
  563. [0xFD] = RM,0, "PADDW %m,%M",
  564. [0xFE] = RM,0, "PADDL %m,%M",
  565. [0x80] = Iwds,0, "JOS %p",
  566. [0x81] = Iwds,0, "JOC %p",
  567. [0x82] = Iwds,0, "JCS %p",
  568. [0x83] = Iwds,0, "JCC %p",
  569. [0x84] = Iwds,0, "JEQ %p",
  570. [0x85] = Iwds,0, "JNE %p",
  571. [0x86] = Iwds,0, "JLS %p",
  572. [0x87] = Iwds,0, "JHI %p",
  573. [0x88] = Iwds,0, "JMI %p",
  574. [0x89] = Iwds,0, "JPL %p",
  575. [0x8a] = Iwds,0, "JPS %p",
  576. [0x8b] = Iwds,0, "JPC %p",
  577. [0x8c] = Iwds,0, "JLT %p",
  578. [0x8d] = Iwds,0, "JGE %p",
  579. [0x8e] = Iwds,0, "JLE %p",
  580. [0x8f] = Iwds,0, "JGT %p",
  581. [0x90] = RMB,0, "SETOS %e",
  582. [0x91] = RMB,0, "SETOC %e",
  583. [0x92] = RMB,0, "SETCS %e",
  584. [0x93] = RMB,0, "SETCC %e",
  585. [0x94] = RMB,0, "SETEQ %e",
  586. [0x95] = RMB,0, "SETNE %e",
  587. [0x96] = RMB,0, "SETLS %e",
  588. [0x97] = RMB,0, "SETHI %e",
  589. [0x98] = RMB,0, "SETMI %e",
  590. [0x99] = RMB,0, "SETPL %e",
  591. [0x9a] = RMB,0, "SETPS %e",
  592. [0x9b] = RMB,0, "SETPC %e",
  593. [0x9c] = RMB,0, "SETLT %e",
  594. [0x9d] = RMB,0, "SETGE %e",
  595. [0x9e] = RMB,0, "SETLE %e",
  596. [0x9f] = RMB,0, "SETGT %e",
  597. [0xa0] = 0,0, "PUSHL FS",
  598. [0xa1] = 0,0, "POPL FS",
  599. [0xa2] = 0,0, "CPUID",
  600. [0xa3] = RM,0, "BT%S %r,%e",
  601. [0xa4] = RM,Ib, "SHLD%S %r,%i,%e",
  602. [0xa5] = RM,0, "SHLD%S %r,CL,%e",
  603. [0xa8] = 0,0, "PUSHL GS",
  604. [0xa9] = 0,0, "POPL GS",
  605. [0xab] = RM,0, "BTS%S %r,%e",
  606. [0xac] = RM,Ib, "SHRD%S %r,%i,%e",
  607. [0xad] = RM,0, "SHRD%S %r,CL,%e",
  608. [0xaf] = RM,0, "IMUL%S %e,%r",
  609. [0xb2] = RMM,0, "LSS %e,%r",
  610. [0xb3] = RM,0, "BTR%S %r,%e",
  611. [0xb4] = RMM,0, "LFS %e,%r",
  612. [0xb5] = RMM,0, "LGS %e,%r",
  613. [0xb6] = RMB,0, "MOVBZX %e,%R",
  614. [0xb7] = RM,0, "MOVWZX %e,%R",
  615. [0xba] = RMOP,0, optab0FBA,
  616. [0xbb] = RM,0, "BTC%S %e,%r",
  617. [0xbc] = RM,0, "BSF%S %e,%r",
  618. [0xbd] = RM,0, "BSR%S %e,%r",
  619. [0xbe] = RMB,0, "MOVBSX %e,%R",
  620. [0xbf] = RM,0, "MOVWSX %e,%R",
  621. [0xc7] = RMOP,0, optab0FC7,
  622. };
  623. static Optable optab80[8]=
  624. {
  625. [0x00] = Ib,0, "ADDB %i,%e",
  626. [0x01] = Ib,0, "ORB %i,%e",
  627. [0x02] = Ib,0, "ADCB %i,%e",
  628. [0x03] = Ib,0, "SBBB %i,%e",
  629. [0x04] = Ib,0, "ANDB %i,%e",
  630. [0x05] = Ib,0, "SUBB %i,%e",
  631. [0x06] = Ib,0, "XORB %i,%e",
  632. [0x07] = Ib,0, "CMPB %e,%i",
  633. };
  634. static Optable optab81[8]=
  635. {
  636. [0x00] = Iwd,0, "ADD%S %i,%e",
  637. [0x01] = Iwd,0, "OR%S %i,%e",
  638. [0x02] = Iwd,0, "ADC%S %i,%e",
  639. [0x03] = Iwd,0, "SBB%S %i,%e",
  640. [0x04] = Iwd,0, "AND%S %i,%e",
  641. [0x05] = Iwd,0, "SUB%S %i,%e",
  642. [0x06] = Iwd,0, "XOR%S %i,%e",
  643. [0x07] = Iwd,0, "CMP%S %e,%i",
  644. };
  645. static Optable optab83[8]=
  646. {
  647. [0x00] = Ibs,0, "ADD%S %i,%e",
  648. [0x01] = Ibs,0, "OR%S %i,%e",
  649. [0x02] = Ibs,0, "ADC%S %i,%e",
  650. [0x03] = Ibs,0, "SBB%S %i,%e",
  651. [0x04] = Ibs,0, "AND%S %i,%e",
  652. [0x05] = Ibs,0, "SUB%S %i,%e",
  653. [0x06] = Ibs,0, "XOR%S %i,%e",
  654. [0x07] = Ibs,0, "CMP%S %e,%i",
  655. };
  656. static Optable optabC0[8] =
  657. {
  658. [0x00] = Ib,0, "ROLB %i,%e",
  659. [0x01] = Ib,0, "RORB %i,%e",
  660. [0x02] = Ib,0, "RCLB %i,%e",
  661. [0x03] = Ib,0, "RCRB %i,%e",
  662. [0x04] = Ib,0, "SHLB %i,%e",
  663. [0x05] = Ib,0, "SHRB %i,%e",
  664. [0x07] = Ib,0, "SARB %i,%e",
  665. };
  666. static Optable optabC1[8] =
  667. {
  668. [0x00] = Ib,0, "ROL%S %i,%e",
  669. [0x01] = Ib,0, "ROR%S %i,%e",
  670. [0x02] = Ib,0, "RCL%S %i,%e",
  671. [0x03] = Ib,0, "RCR%S %i,%e",
  672. [0x04] = Ib,0, "SHL%S %i,%e",
  673. [0x05] = Ib,0, "SHR%S %i,%e",
  674. [0x07] = Ib,0, "SAR%S %i,%e",
  675. };
  676. static Optable optabD0[8] =
  677. {
  678. [0x00] = 0,0, "ROLB %e",
  679. [0x01] = 0,0, "RORB %e",
  680. [0x02] = 0,0, "RCLB %e",
  681. [0x03] = 0,0, "RCRB %e",
  682. [0x04] = 0,0, "SHLB %e",
  683. [0x05] = 0,0, "SHRB %e",
  684. [0x07] = 0,0, "SARB %e",
  685. };
  686. static Optable optabD1[8] =
  687. {
  688. [0x00] = 0,0, "ROL%S %e",
  689. [0x01] = 0,0, "ROR%S %e",
  690. [0x02] = 0,0, "RCL%S %e",
  691. [0x03] = 0,0, "RCR%S %e",
  692. [0x04] = 0,0, "SHL%S %e",
  693. [0x05] = 0,0, "SHR%S %e",
  694. [0x07] = 0,0, "SAR%S %e",
  695. };
  696. static Optable optabD2[8] =
  697. {
  698. [0x00] = 0,0, "ROLB CL,%e",
  699. [0x01] = 0,0, "RORB CL,%e",
  700. [0x02] = 0,0, "RCLB CL,%e",
  701. [0x03] = 0,0, "RCRB CL,%e",
  702. [0x04] = 0,0, "SHLB CL,%e",
  703. [0x05] = 0,0, "SHRB CL,%e",
  704. [0x07] = 0,0, "SARB CL,%e",
  705. };
  706. static Optable optabD3[8] =
  707. {
  708. [0x00] = 0,0, "ROL%S CL,%e",
  709. [0x01] = 0,0, "ROR%S CL,%e",
  710. [0x02] = 0,0, "RCL%S CL,%e",
  711. [0x03] = 0,0, "RCR%S CL,%e",
  712. [0x04] = 0,0, "SHL%S CL,%e",
  713. [0x05] = 0,0, "SHR%S CL,%e",
  714. [0x07] = 0,0, "SAR%S CL,%e",
  715. };
  716. static Optable optabD8[8+8] =
  717. {
  718. [0x00] = 0,0, "FADDF %e,F0",
  719. [0x01] = 0,0, "FMULF %e,F0",
  720. [0x02] = 0,0, "FCOMF %e,F0",
  721. [0x03] = 0,0, "FCOMFP %e,F0",
  722. [0x04] = 0,0, "FSUBF %e,F0",
  723. [0x05] = 0,0, "FSUBRF %e,F0",
  724. [0x06] = 0,0, "FDIVF %e,F0",
  725. [0x07] = 0,0, "FDIVRF %e,F0",
  726. [0x08] = 0,0, "FADDD %f,F0",
  727. [0x09] = 0,0, "FMULD %f,F0",
  728. [0x0a] = 0,0, "FCOMD %f,F0",
  729. [0x0b] = 0,0, "FCOMPD %f,F0",
  730. [0x0c] = 0,0, "FSUBD %f,F0",
  731. [0x0d] = 0,0, "FSUBRD %f,F0",
  732. [0x0e] = 0,0, "FDIVD %f,F0",
  733. [0x0f] = 0,0, "FDIVRD %f,F0",
  734. };
  735. /*
  736. * optabD9 and optabDB use the following encoding:
  737. * if (0 <= modrm <= 2) instruction = optabDx[modrm&0x07];
  738. * else instruction = optabDx[(modrm&0x3f)+8];
  739. *
  740. * the instructions for MOD == 3, follow the 8 instructions
  741. * for the other MOD values stored at the front of the table.
  742. */
  743. static Optable optabD9[64+8] =
  744. {
  745. [0x00] = 0,0, "FMOVF %e,F0",
  746. [0x02] = 0,0, "FMOVF F0,%e",
  747. [0x03] = 0,0, "FMOVFP F0,%e",
  748. [0x04] = 0,0, "FLDENV%S %e",
  749. [0x05] = 0,0, "FLDCW %e",
  750. [0x06] = 0,0, "FSTENV%S %e",
  751. [0x07] = 0,0, "FSTCW %e",
  752. [0x08] = 0,0, "FMOVD F0,F0", /* Mod R/M = 11xx xxxx*/
  753. [0x09] = 0,0, "FMOVD F1,F0",
  754. [0x0a] = 0,0, "FMOVD F2,F0",
  755. [0x0b] = 0,0, "FMOVD F3,F0",
  756. [0x0c] = 0,0, "FMOVD F4,F0",
  757. [0x0d] = 0,0, "FMOVD F5,F0",
  758. [0x0e] = 0,0, "FMOVD F6,F0",
  759. [0x0f] = 0,0, "FMOVD F7,F0",
  760. [0x10] = 0,0, "FXCHD F0,F0",
  761. [0x11] = 0,0, "FXCHD F1,F0",
  762. [0x12] = 0,0, "FXCHD F2,F0",
  763. [0x13] = 0,0, "FXCHD F3,F0",
  764. [0x14] = 0,0, "FXCHD F4,F0",
  765. [0x15] = 0,0, "FXCHD F5,F0",
  766. [0x16] = 0,0, "FXCHD F6,F0",
  767. [0x17] = 0,0, "FXCHD F7,F0",
  768. [0x18] = 0,0, "FNOP",
  769. [0x28] = 0,0, "FCHS",
  770. [0x29] = 0,0, "FABS",
  771. [0x2c] = 0,0, "FTST",
  772. [0x2d] = 0,0, "FXAM",
  773. [0x30] = 0,0, "FLD1",
  774. [0x31] = 0,0, "FLDL2T",
  775. [0x32] = 0,0, "FLDL2E",
  776. [0x33] = 0,0, "FLDPI",
  777. [0x34] = 0,0, "FLDLG2",
  778. [0x35] = 0,0, "FLDLN2",
  779. [0x36] = 0,0, "FLDZ",
  780. [0x38] = 0,0, "F2XM1",
  781. [0x39] = 0,0, "FYL2X",
  782. [0x3a] = 0,0, "FPTAN",
  783. [0x3b] = 0,0, "FPATAN",
  784. [0x3c] = 0,0, "FXTRACT",
  785. [0x3d] = 0,0, "FPREM1",
  786. [0x3e] = 0,0, "FDECSTP",
  787. [0x3f] = 0,0, "FNCSTP",
  788. [0x40] = 0,0, "FPREM",
  789. [0x41] = 0,0, "FYL2XP1",
  790. [0x42] = 0,0, "FSQRT",
  791. [0x43] = 0,0, "FSINCOS",
  792. [0x44] = 0,0, "FRNDINT",
  793. [0x45] = 0,0, "FSCALE",
  794. [0x46] = 0,0, "FSIN",
  795. [0x47] = 0,0, "FCOS",
  796. };
  797. static Optable optabDA[8+8] =
  798. {
  799. [0x00] = 0,0, "FADDL %e,F0",
  800. [0x01] = 0,0, "FMULL %e,F0",
  801. [0x02] = 0,0, "FCOML %e,F0",
  802. [0x03] = 0,0, "FCOMLP %e,F0",
  803. [0x04] = 0,0, "FSUBL %e,F0",
  804. [0x05] = 0,0, "FSUBRL %e,F0",
  805. [0x06] = 0,0, "FDIVL %e,F0",
  806. [0x07] = 0,0, "FDIVRL %e,F0",
  807. [0x0d] = R1,0, "FUCOMPP",
  808. };
  809. static Optable optabDB[8+64] =
  810. {
  811. [0x00] = 0,0, "FMOVL %e,F0",
  812. [0x02] = 0,0, "FMOVL F0,%e",
  813. [0x03] = 0,0, "FMOVLP F0,%e",
  814. [0x05] = 0,0, "FMOVX %e,F0",
  815. [0x07] = 0,0, "FMOVXP F0,%e",
  816. [0x2a] = 0,0, "FCLEX",
  817. [0x2b] = 0,0, "FINIT",
  818. };
  819. static Optable optabDC[8+8] =
  820. {
  821. [0x00] = 0,0, "FADDD %e,F0",
  822. [0x01] = 0,0, "FMULD %e,F0",
  823. [0x02] = 0,0, "FCOMD %e,F0",
  824. [0x03] = 0,0, "FCOMDP %e,F0",
  825. [0x04] = 0,0, "FSUBD %e,F0",
  826. [0x05] = 0,0, "FSUBRD %e,F0",
  827. [0x06] = 0,0, "FDIVD %e,F0",
  828. [0x07] = 0,0, "FDIVRD %e,F0",
  829. [0x08] = 0,0, "FADDD F0,%f",
  830. [0x09] = 0,0, "FMULD F0,%f",
  831. [0x0c] = 0,0, "FSUBRD F0,%f",
  832. [0x0d] = 0,0, "FSUBD F0,%f",
  833. [0x0e] = 0,0, "FDIVRD F0,%f",
  834. [0x0f] = 0,0, "FDIVD F0,%f",
  835. };
  836. static Optable optabDD[8+8] =
  837. {
  838. [0x00] = 0,0, "FMOVD %e,F0",
  839. [0x02] = 0,0, "FMOVD F0,%e",
  840. [0x03] = 0,0, "FMOVDP F0,%e",
  841. [0x04] = 0,0, "FRSTOR%S %e",
  842. [0x06] = 0,0, "FSAVE%S %e",
  843. [0x07] = 0,0, "FSTSW %e",
  844. [0x08] = 0,0, "FFREED %f",
  845. [0x0a] = 0,0, "FMOVD %f,F0",
  846. [0x0b] = 0,0, "FMOVDP %f,F0",
  847. [0x0c] = 0,0, "FUCOMD %f,F0",
  848. [0x0d] = 0,0, "FUCOMDP %f,F0",
  849. };
  850. static Optable optabDE[8+8] =
  851. {
  852. [0x00] = 0,0, "FADDW %e,F0",
  853. [0x01] = 0,0, "FMULW %e,F0",
  854. [0x02] = 0,0, "FCOMW %e,F0",
  855. [0x03] = 0,0, "FCOMWP %e,F0",
  856. [0x04] = 0,0, "FSUBW %e,F0",
  857. [0x05] = 0,0, "FSUBRW %e,F0",
  858. [0x06] = 0,0, "FDIVW %e,F0",
  859. [0x07] = 0,0, "FDIVRW %e,F0",
  860. [0x08] = 0,0, "FADDDP F0,%f",
  861. [0x09] = 0,0, "FMULDP F0,%f",
  862. [0x0b] = R1,0, "FCOMPDP",
  863. [0x0c] = 0,0, "FSUBRDP F0,%f",
  864. [0x0d] = 0,0, "FSUBDP F0,%f",
  865. [0x0e] = 0,0, "FDIVRDP F0,%f",
  866. [0x0f] = 0,0, "FDIVDP F0,%f",
  867. };
  868. static Optable optabDF[8+8] =
  869. {
  870. [0x00] = 0,0, "FMOVW %e,F0",
  871. [0x02] = 0,0, "FMOVW F0,%e",
  872. [0x03] = 0,0, "FMOVWP F0,%e",
  873. [0x04] = 0,0, "FBLD %e",
  874. [0x05] = 0,0, "FMOVL %e,F0",
  875. [0x06] = 0,0, "FBSTP %e",
  876. [0x07] = 0,0, "FMOVLP F0,%e",
  877. [0x0c] = R0,0, "FSTSW %OAX",
  878. };
  879. static Optable optabF6[8] =
  880. {
  881. [0x00] = Ib,0, "TESTB %i,%e",
  882. [0x02] = 0,0, "NOTB %e",
  883. [0x03] = 0,0, "NEGB %e",
  884. [0x04] = 0,0, "MULB AL,%e",
  885. [0x05] = 0,0, "IMULB AL,%e",
  886. [0x06] = 0,0, "DIVB AL,%e",
  887. [0x07] = 0,0, "IDIVB AL,%e",
  888. };
  889. static Optable optabF7[8] =
  890. {
  891. [0x00] = Iwd,0, "TEST%S %i,%e",
  892. [0x02] = 0,0, "NOT%S %e",
  893. [0x03] = 0,0, "NEG%S %e",
  894. [0x04] = 0,0, "MUL%S %OAX,%e",
  895. [0x05] = 0,0, "IMUL%S %OAX,%e",
  896. [0x06] = 0,0, "DIV%S %OAX,%e",
  897. [0x07] = 0,0, "IDIV%S %OAX,%e",
  898. };
  899. static Optable optabFE[8] =
  900. {
  901. [0x00] = 0,0, "INCB %e",
  902. [0x01] = 0,0, "DECB %e",
  903. };
  904. static Optable optabFF[8] =
  905. {
  906. [0x00] = 0,0, "INC%S %e",
  907. [0x01] = 0,0, "DEC%S %e",
  908. [0x02] = JUMP,0, "CALL* %e",
  909. [0x03] = JUMP,0, "CALLF* %e",
  910. [0x04] = JUMP,0, "JMP* %e",
  911. [0x05] = JUMP,0, "JMPF* %e",
  912. [0x06] = 0,0, "PUSHL %e",
  913. };
  914. static Optable optable[256+1] =
  915. {
  916. [0x00] = RMB,0, "ADDB %r,%e",
  917. [0x01] = RM,0, "ADD%S %r,%e",
  918. [0x02] = RMB,0, "ADDB %e,%r",
  919. [0x03] = RM,0, "ADD%S %e,%r",
  920. [0x04] = Ib,0, "ADDB %i,AL",
  921. [0x05] = Iwd,0, "ADD%S %i,%OAX",
  922. [0x06] = 0,0, "PUSHL ES",
  923. [0x07] = 0,0, "POPL ES",
  924. [0x08] = RMB,0, "ORB %r,%e",
  925. [0x09] = RM,0, "OR%S %r,%e",
  926. [0x0a] = RMB,0, "ORB %e,%r",
  927. [0x0b] = RM,0, "OR%S %e,%r",
  928. [0x0c] = Ib,0, "ORB %i,AL",
  929. [0x0d] = Iwd,0, "OR%S %i,%OAX",
  930. [0x0e] = 0,0, "PUSHL CS",
  931. [0x0f] = AUXMM,0, optab0F,
  932. [0x10] = RMB,0, "ADCB %r,%e",
  933. [0x11] = RM,0, "ADC%S %r,%e",
  934. [0x12] = RMB,0, "ADCB %e,%r",
  935. [0x13] = RM,0, "ADC%S %e,%r",
  936. [0x14] = Ib,0, "ADCB %i,AL",
  937. [0x15] = Iwd,0, "ADC%S %i,%OAX",
  938. [0x16] = 0,0, "PUSHL SS",
  939. [0x17] = 0,0, "POPL SS",
  940. [0x18] = RMB,0, "SBBB %r,%e",
  941. [0x19] = RM,0, "SBB%S %r,%e",
  942. [0x1a] = RMB,0, "SBBB %e,%r",
  943. [0x1b] = RM,0, "SBB%S %e,%r",
  944. [0x1c] = Ib,0, "SBBB %i,AL",
  945. [0x1d] = Iwd,0, "SBB%S %i,%OAX",
  946. [0x1e] = 0,0, "PUSHL DS",
  947. [0x1f] = 0,0, "POPL DS",
  948. [0x20] = RMB,0, "ANDB %r,%e",
  949. [0x21] = RM,0, "AND%S %r,%e",
  950. [0x22] = RMB,0, "ANDB %e,%r",
  951. [0x23] = RM,0, "AND%S %e,%r",
  952. [0x24] = Ib,0, "ANDB %i,AL",
  953. [0x25] = Iwd,0, "AND%S %i,%OAX",
  954. [0x26] = SEG,0, "ES:",
  955. [0x27] = 0,0, "DAA",
  956. [0x28] = RMB,0, "SUBB %r,%e",
  957. [0x29] = RM,0, "SUB%S %r,%e",
  958. [0x2a] = RMB,0, "SUBB %e,%r",
  959. [0x2b] = RM,0, "SUB%S %e,%r",
  960. [0x2c] = Ib,0, "SUBB %i,AL",
  961. [0x2d] = Iwd,0, "SUB%S %i,%OAX",
  962. [0x2e] = SEG,0, "CS:",
  963. [0x2f] = 0,0, "DAS",
  964. [0x30] = RMB,0, "XORB %r,%e",
  965. [0x31] = RM,0, "XOR%S %r,%e",
  966. [0x32] = RMB,0, "XORB %e,%r",
  967. [0x33] = RM,0, "XOR%S %e,%r",
  968. [0x34] = Ib,0, "XORB %i,AL",
  969. [0x35] = Iwd,0, "XOR%S %i,%OAX",
  970. [0x36] = SEG,0, "SS:",
  971. [0x37] = 0,0, "AAA",
  972. [0x38] = RMB,0, "CMPB %r,%e",
  973. [0x39] = RM,0, "CMP%S %r,%e",
  974. [0x3a] = RMB,0, "CMPB %e,%r",
  975. [0x3b] = RM,0, "CMP%S %e,%r",
  976. [0x3c] = Ib,0, "CMPB %i,AL",
  977. [0x3d] = Iwd,0, "CMP%S %i,%OAX",
  978. [0x3e] = SEG,0, "DS:",
  979. [0x3f] = 0,0, "AAS",
  980. [0x40] = 0,0, "INC%S %OAX",
  981. [0x41] = 0,0, "INC%S %OCX",
  982. [0x42] = 0,0, "INC%S %ODX",
  983. [0x43] = 0,0, "INC%S %OBX",
  984. [0x44] = 0,0, "INC%S %OSP",
  985. [0x45] = 0,0, "INC%S %OBP",
  986. [0x46] = 0,0, "INC%S %OSI",
  987. [0x47] = 0,0, "INC%S %ODI",
  988. [0x48] = 0,0, "DEC%S %OAX",
  989. [0x49] = 0,0, "DEC%S %OCX",
  990. [0x4a] = 0,0, "DEC%S %ODX",
  991. [0x4b] = 0,0, "DEC%S %OBX",
  992. [0x4c] = 0,0, "DEC%S %OSP",
  993. [0x4d] = 0,0, "DEC%S %OBP",
  994. [0x4e] = 0,0, "DEC%S %OSI",
  995. [0x4f] = 0,0, "DEC%S %ODI",
  996. [0x50] = 0,0, "PUSH%S %OAX",
  997. [0x51] = 0,0, "PUSH%S %OCX",
  998. [0x52] = 0,0, "PUSH%S %ODX",
  999. [0x53] = 0,0, "PUSH%S %OBX",
  1000. [0x54] = 0,0, "PUSH%S %OSP",
  1001. [0x55] = 0,0, "PUSH%S %OBP",
  1002. [0x56] = 0,0, "PUSH%S %OSI",
  1003. [0x57] = 0,0, "PUSH%S %ODI",
  1004. [0x58] = 0,0, "POP%S %OAX",
  1005. [0x59] = 0,0, "POP%S %OCX",
  1006. [0x5a] = 0,0, "POP%S %ODX",
  1007. [0x5b] = 0,0, "POP%S %OBX",
  1008. [0x5c] = 0,0, "POP%S %OSP",
  1009. [0x5d] = 0,0, "POP%S %OBP",
  1010. [0x5e] = 0,0, "POP%S %OSI",
  1011. [0x5f] = 0,0, "POP%S %ODI",
  1012. [0x60] = 0,0, "PUSHA%S",
  1013. [0x61] = 0,0, "POPA%S",
  1014. [0x62] = RMM,0, "BOUND %e,%r",
  1015. [0x63] = RM,0, "ARPL %r,%e",
  1016. [0x64] = SEG,0, "FS:",
  1017. [0x65] = SEG,0, "GS:",
  1018. [0x66] = OPOVER,0, "",
  1019. [0x67] = ADDOVER,0, "",
  1020. [0x68] = Iwd,0, "PUSH%S %i",
  1021. [0x69] = RM,Iwd, "IMUL%S %e,%i,%r",
  1022. [0x6a] = Ib,0, "PUSH%S %i",
  1023. [0x6b] = RM,Ibs, "IMUL%S %e,%i,%r",
  1024. [0x6c] = 0,0, "INSB DX,(%ODI)",
  1025. [0x6d] = 0,0, "INS%S DX,(%ODI)",
  1026. [0x6e] = 0,0, "OUTSB (%ASI),DX",
  1027. [0x6f] = 0,0, "OUTS%S (%ASI),DX",
  1028. [0x70] = Jbs,0, "JOS %p",
  1029. [0x71] = Jbs,0, "JOC %p",
  1030. [0x72] = Jbs,0, "JCS %p",
  1031. [0x73] = Jbs,0, "JCC %p",
  1032. [0x74] = Jbs,0, "JEQ %p",
  1033. [0x75] = Jbs,0, "JNE %p",
  1034. [0x76] = Jbs,0, "JLS %p",
  1035. [0x77] = Jbs,0, "JHI %p",
  1036. [0x78] = Jbs,0, "JMI %p",
  1037. [0x79] = Jbs,0, "JPL %p",
  1038. [0x7a] = Jbs,0, "JPS %p",
  1039. [0x7b] = Jbs,0, "JPC %p",
  1040. [0x7c] = Jbs,0, "JLT %p",
  1041. [0x7d] = Jbs,0, "JGE %p",
  1042. [0x7e] = Jbs,0, "JLE %p",
  1043. [0x7f] = Jbs,0, "JGT %p",
  1044. [0x80] = RMOPB,0, optab80,
  1045. [0x81] = RMOP,0, optab81,
  1046. [0x83] = RMOP,0, optab83,
  1047. [0x84] = RMB,0, "TESTB %r,%e",
  1048. [0x85] = RM,0, "TEST%S %r,%e",
  1049. [0x86] = RMB,0, "XCHGB %r,%e",
  1050. [0x87] = RM,0, "XCHG%S %r,%e",
  1051. [0x88] = RMB,0, "MOVB %r,%e",
  1052. [0x89] = RM,0, "MOV%S %r,%e",
  1053. [0x8a] = RMB,0, "MOVB %e,%r",
  1054. [0x8b] = RM,0, "MOV%S %e,%r",
  1055. [0x8c] = RM,0, "MOVW %g,%e",
  1056. [0x8d] = RM,0, "LEA%S %e,%r",
  1057. [0x8e] = RM,0, "MOVW %e,%g",
  1058. [0x8f] = RM,0, "POP%S %e",
  1059. [0x90] = 0,0, "NOP",
  1060. [0x91] = 0,0, "XCHG %OCX,%OAX",
  1061. [0x92] = 0,0, "XCHG %ODX,%OAX",
  1062. [0x93] = 0,0, "XCHG %OBX,%OAX",
  1063. [0x94] = 0,0, "XCHG %OSP,%OAX",
  1064. [0x95] = 0,0, "XCHG %OBP,%OAX",
  1065. [0x96] = 0,0, "XCHG %OSI,%OAX",
  1066. [0x97] = 0,0, "XCHG %ODI,%OAX",
  1067. [0x98] = 0,0, "%W", /* miserable CBW or CWDE */
  1068. [0x99] = 0,0, "%w", /* idiotic CWD or CDQ */
  1069. [0x9a] = PTR,0, "CALL%S %d",
  1070. [0x9b] = 0,0, "WAIT",
  1071. [0x9c] = 0,0, "PUSHF",
  1072. [0x9d] = 0,0, "POPF",
  1073. [0x9e] = 0,0, "SAHF",
  1074. [0x9f] = 0,0, "LAHF",
  1075. [0xa0] = Awd,0, "MOVB %i,AL",
  1076. [0xa1] = Awd,0, "MOV%S %i,%OAX",
  1077. [0xa2] = Awd,0, "MOVB AL,%i",
  1078. [0xa3] = Awd,0, "MOV%S %OAX,%i",
  1079. [0xa4] = 0,0, "MOVSB (%ASI),(%ADI)",
  1080. [0xa5] = 0,0, "MOVS%S (%ASI),(%ADI)",
  1081. [0xa6] = 0,0, "CMPSB (%ASI),(%ADI)",
  1082. [0xa7] = 0,0, "CMPS%S (%ASI),(%ADI)",
  1083. [0xa8] = Ib,0, "TESTB %i,AL",
  1084. [0xa9] = Iwd,0, "TEST%S %i,%OAX",
  1085. [0xaa] = 0,0, "STOSB AL,(%ADI)",
  1086. [0xab] = 0,0, "STOS%S %OAX,(%ADI)",
  1087. [0xac] = 0,0, "LODSB (%ASI),AL",
  1088. [0xad] = 0,0, "LODS%S (%ASI),%OAX",
  1089. [0xae] = 0,0, "SCASB (%ADI),AL",
  1090. [0xaf] = 0,0, "SCAS%S (%ADI),%OAX",
  1091. [0xb0] = Ib,0, "MOVB %i,AL",
  1092. [0xb1] = Ib,0, "MOVB %i,CL",
  1093. [0xb2] = Ib,0, "MOVB %i,DL",
  1094. [0xb3] = Ib,0, "MOVB %i,BL",
  1095. [0xb4] = Ib,0, "MOVB %i,AH",
  1096. [0xb5] = Ib,0, "MOVB %i,CH",
  1097. [0xb6] = Ib,0, "MOVB %i,DH",
  1098. [0xb7] = Ib,0, "MOVB %i,BH",
  1099. [0xb8] = Iwdq,0, "MOV%S %i,%OAX",
  1100. [0xb9] = Iwdq,0, "MOV%S %i,%OCX",
  1101. [0xba] = Iwdq,0, "MOV%S %i,%ODX",
  1102. [0xbb] = Iwdq,0, "MOV%S %i,%OBX",
  1103. [0xbc] = Iwdq,0, "MOV%S %i,%OSP",
  1104. [0xbd] = Iwdq,0, "MOV%S %i,%OBP",
  1105. [0xbe] = Iwdq,0, "MOV%S %i,%OSI",
  1106. [0xbf] = Iwdq,0, "MOV%S %i,%ODI",
  1107. [0xc0] = RMOPB,0, optabC0,
  1108. [0xc1] = RMOP,0, optabC1,
  1109. [0xc2] = Iw,0, "RET %i",
  1110. [0xc3] = RET,0, "RET",
  1111. [0xc4] = RM,0, "LES %e,%r",
  1112. [0xc5] = RM,0, "LDS %e,%r",
  1113. [0xc6] = RMB,Ib, "MOVB %i,%e",
  1114. [0xc7] = RM,Iwd, "MOV%S %i,%e",
  1115. [0xc8] = Iw2,Ib, "ENTER %i,%I", /* loony ENTER */
  1116. [0xc9] = RET,0, "LEAVE", /* bizarre LEAVE */
  1117. [0xca] = Iw,0, "RETF %i",
  1118. [0xcb] = RET,0, "RETF",
  1119. [0xcc] = 0,0, "INT 3",
  1120. [0xcd] = Ib,0, "INTB %i",
  1121. [0xce] = 0,0, "INTO",
  1122. [0xcf] = 0,0, "IRET",
  1123. [0xd0] = RMOPB,0, optabD0,
  1124. [0xd1] = RMOP,0, optabD1,
  1125. [0xd2] = RMOPB,0, optabD2,
  1126. [0xd3] = RMOP,0, optabD3,
  1127. [0xd4] = OA,0, "AAM",
  1128. [0xd5] = OA,0, "AAD",
  1129. [0xd7] = 0,0, "XLAT",
  1130. [0xd8] = FRMOP,0, optabD8,
  1131. [0xd9] = FRMEX,0, optabD9,
  1132. [0xda] = FRMOP,0, optabDA,
  1133. [0xdb] = FRMEX,0, optabDB,
  1134. [0xdc] = FRMOP,0, optabDC,
  1135. [0xdd] = FRMOP,0, optabDD,
  1136. [0xde] = FRMOP,0, optabDE,
  1137. [0xdf] = FRMOP,0, optabDF,
  1138. [0xe0] = Jbs,0, "LOOPNE %p",
  1139. [0xe1] = Jbs,0, "LOOPE %p",
  1140. [0xe2] = Jbs,0, "LOOP %p",
  1141. [0xe3] = Jbs,0, "JCXZ %p",
  1142. [0xe4] = Ib,0, "INB %i,AL",
  1143. [0xe5] = Ib,0, "IN%S %i,%OAX",
  1144. [0xe6] = Ib,0, "OUTB AL,%i",
  1145. [0xe7] = Ib,0, "OUT%S %OAX,%i",
  1146. [0xe8] = Iwds,0, "CALL %p",
  1147. [0xe9] = Iwds,0, "JMP %p",
  1148. [0xea] = PTR,0, "JMP %d",
  1149. [0xeb] = Jbs,0, "JMP %p",
  1150. [0xec] = 0,0, "INB DX,AL",
  1151. [0xed] = 0,0, "IN%S DX,%OAX",
  1152. [0xee] = 0,0, "OUTB AL,DX",
  1153. [0xef] = 0,0, "OUT%S %OAX,DX",
  1154. [0xf0] = PRE,0, "LOCK",
  1155. [0xf2] = OPRE,0, "REPNE",
  1156. [0xf3] = OPRE,0, "REP",
  1157. [0xf4] = 0,0, "HLT",
  1158. [0xf5] = 0,0, "CMC",
  1159. [0xf6] = RMOPB,0, optabF6,
  1160. [0xf7] = RMOP,0, optabF7,
  1161. [0xf8] = 0,0, "CLC",
  1162. [0xf9] = 0,0, "STC",
  1163. [0xfa] = 0,0, "CLI",
  1164. [0xfb] = 0,0, "STI",
  1165. [0xfc] = 0,0, "CLD",
  1166. [0xfd] = 0,0, "STD",
  1167. [0xfe] = RMOPB,0, optabFE,
  1168. [0xff] = RMOP,0, optabFF,
  1169. [0x100] = RM,0, "MOVLQSX %r,%e",
  1170. };
  1171. /*
  1172. * get a byte of the instruction
  1173. */
  1174. static int
  1175. igetc(Map *map, Instr *ip, uint8_t *c)
  1176. {
  1177. if(ip->n+1 > sizeof(ip->mem)){
  1178. werrstr("instruction too long");
  1179. return -1;
  1180. }
  1181. if (get1(map, ip->addr+ip->n, c, 1) < 0) {
  1182. werrstr("can't read instruction: %r");
  1183. return -1;
  1184. }
  1185. ip->mem[ip->n++] = *c;
  1186. return 1;
  1187. }
  1188. /*
  1189. * get two bytes of the instruction
  1190. */
  1191. static int
  1192. igets(Map *map, Instr *ip, uint16_t *sp)
  1193. {
  1194. uint8_t c;
  1195. uint16_t s;
  1196. if (igetc(map, ip, &c) < 0)
  1197. return -1;
  1198. s = c;
  1199. if (igetc(map, ip, &c) < 0)
  1200. return -1;
  1201. s |= (c<<8);
  1202. *sp = s;
  1203. return 1;
  1204. }
  1205. /*
  1206. * get 4 bytes of the instruction
  1207. */
  1208. static int
  1209. igetl(Map *map, Instr *ip, uint32_t *lp)
  1210. {
  1211. uint16_t s;
  1212. int32_t l;
  1213. if (igets(map, ip, &s) < 0)
  1214. return -1;
  1215. l = s;
  1216. if (igets(map, ip, &s) < 0)
  1217. return -1;
  1218. l |= (s<<16);
  1219. *lp = l;
  1220. return 1;
  1221. }
  1222. /*
  1223. * get 8 bytes of the instruction
  1224. */
  1225. static int
  1226. igetq(Map *map, Instr *ip, int64_t *qp)
  1227. {
  1228. uint32_t l;
  1229. uint64_t q;
  1230. if (igetl(map, ip, &l) < 0)
  1231. return -1;
  1232. q = l;
  1233. if (igetl(map, ip, &l) < 0)
  1234. return -1;
  1235. q |= ((uint64_t)l<<32);
  1236. *qp = q;
  1237. return 1;
  1238. }
  1239. static int
  1240. getdisp(Map *map, Instr *ip, int mod, int rm, int code, int pcrel)
  1241. {
  1242. uint8_t c;
  1243. uint16_t s;
  1244. if (mod > 2)
  1245. return 1;
  1246. if (mod == 1) {
  1247. if (igetc(map, ip, &c) < 0)
  1248. return -1;
  1249. if (c&0x80)
  1250. ip->disp = c|0xffffff00;
  1251. else
  1252. ip->disp = c&0xff;
  1253. } else if (mod == 2 || rm == code) {
  1254. if (ip->asize == 'E') {
  1255. if (igetl(map, ip, &ip->disp) < 0)
  1256. return -1;
  1257. if (mod == 0)
  1258. ip->rip = pcrel;
  1259. } else {
  1260. if (igets(map, ip, &s) < 0)
  1261. return -1;
  1262. if (s&0x8000)
  1263. ip->disp = s|0xffff0000;
  1264. else
  1265. ip->disp = s;
  1266. }
  1267. if (mod == 0)
  1268. ip->base = -1;
  1269. }
  1270. return 1;
  1271. }
  1272. static int
  1273. modrm(Map *map, Instr *ip, uint8_t c)
  1274. {
  1275. uint8_t rm, mod;
  1276. mod = (c>>6)&3;
  1277. rm = c&7;
  1278. ip->mod = mod;
  1279. ip->base = rm;
  1280. ip->reg = (c>>3)&7;
  1281. ip->rip = 0;
  1282. if (mod == 3) /* register */
  1283. return 1;
  1284. if (ip->asize == 0) { /* 16-bit mode */
  1285. switch(rm) {
  1286. case 0:
  1287. ip->base = BX; ip->index = SI;
  1288. break;
  1289. case 1:
  1290. ip->base = BX; ip->index = DI;
  1291. break;
  1292. case 2:
  1293. ip->base = BP; ip->index = SI;
  1294. break;
  1295. case 3:
  1296. ip->base = BP; ip->index = DI;
  1297. break;
  1298. case 4:
  1299. ip->base = SI;
  1300. break;
  1301. case 5:
  1302. ip->base = DI;
  1303. break;
  1304. case 6:
  1305. ip->base = BP;
  1306. break;
  1307. case 7:
  1308. ip->base = BX;
  1309. break;
  1310. default:
  1311. break;
  1312. }
  1313. return getdisp(map, ip, mod, rm, 6, 0);
  1314. }
  1315. if (rm == 4) { /* scummy sib byte */
  1316. if (igetc(map, ip, &c) < 0)
  1317. return -1;
  1318. ip->ss = (c>>6)&0x03;
  1319. ip->index = (c>>3)&0x07;
  1320. if (ip->index == 4)
  1321. ip->index = -1;
  1322. ip->base = c&0x07;
  1323. return getdisp(map, ip, mod, ip->base, 5, 0);
  1324. }
  1325. return getdisp(map, ip, mod, rm, 5, ip->amd64);
  1326. }
  1327. static Optable *
  1328. mkinstr(Map *map, Instr *ip, uint64_t pc)
  1329. {
  1330. int i, n, norex;
  1331. uint8_t c;
  1332. uint16_t s;
  1333. Optable *op, *obase;
  1334. char buf[128];
  1335. memset(ip, 0, sizeof(*ip));
  1336. norex = 1;
  1337. ip->base = -1;
  1338. ip->index = -1;
  1339. if(asstype == AI8086)
  1340. ip->osize = 'W';
  1341. else {
  1342. ip->osize = 'L';
  1343. ip->asize = 'E';
  1344. ip->amd64 = asstype != AI386;
  1345. norex = 0;
  1346. }
  1347. ip->addr = pc;
  1348. if (igetc(map, ip, &c) < 0)
  1349. return 0;
  1350. obase = optable;
  1351. newop:
  1352. if(ip->amd64 && !norex){
  1353. if(c >= 0x40 && c <= 0x4f) {
  1354. ip->rex = c;
  1355. if(igetc(map, ip, &c) < 0)
  1356. return 0;
  1357. }
  1358. if(c == 0x63){
  1359. op = &obase[0x100]; /* MOVLQSX */
  1360. goto hack;
  1361. }
  1362. }
  1363. op = &obase[c];
  1364. hack:
  1365. if (op->proto == 0) {
  1366. badop:
  1367. n = snprint(buf, sizeof(buf), "opcode: ??");
  1368. for (i = 0; i < ip->n && n < sizeof(buf)-3; i++, n+=2)
  1369. _hexify(buf+n, ip->mem[i], 1);
  1370. strcpy(buf+n, "??");
  1371. werrstr(buf);
  1372. return 0;
  1373. }
  1374. for(i = 0; i < 2 && op->operand[i]; i++) {
  1375. switch(op->operand[i]) {
  1376. case Ib: /* 8-bit immediate - (no sign extension)*/
  1377. if (igetc(map, ip, &c) < 0)
  1378. return 0;
  1379. ip->imm = c&0xff;
  1380. ip->imm64 = ip->imm;
  1381. break;
  1382. case Jbs: /* 8-bit jump immediate (sign extended) */
  1383. if (igetc(map, ip, &c) < 0)
  1384. return 0;
  1385. if (c&0x80)
  1386. ip->imm = c|0xffffff00;
  1387. else
  1388. ip->imm = c&0xff;
  1389. ip->imm64 = (int32_t)ip->imm;
  1390. ip->jumptype = Jbs;
  1391. break;
  1392. case Ibs: /* 8-bit immediate (sign extended) */
  1393. if (igetc(map, ip, &c) < 0)
  1394. return 0;
  1395. if (c&0x80)
  1396. if (ip->osize == 'L')
  1397. ip->imm = c|0xffffff00;
  1398. else
  1399. ip->imm = c|0xff00;
  1400. else
  1401. ip->imm = c&0xff;
  1402. ip->imm64 = (int32_t)ip->imm;
  1403. break;
  1404. case Iw: /* 16-bit immediate -> imm */
  1405. if (igets(map, ip, &s) < 0)
  1406. return 0;
  1407. ip->imm = s&0xffff;
  1408. ip->imm64 = ip->imm;
  1409. ip->jumptype = Iw;
  1410. break;
  1411. case Iw2: /* 16-bit immediate -> in imm2*/
  1412. if (igets(map, ip, &s) < 0)
  1413. return 0;
  1414. ip->imm2 = s&0xffff;
  1415. break;
  1416. case Iwd: /* Operand-sized immediate (no sign extension unless 64 bits)*/
  1417. if (ip->osize == 'L') {
  1418. if (igetl(map, ip, &ip->imm) < 0)
  1419. return 0;
  1420. ip->imm64 = ip->imm;
  1421. if(ip->rex&REXW && (ip->imm & (1<<31)) != 0)
  1422. ip->imm64 |= (uint64_t)~0 << 32;
  1423. } else {
  1424. if (igets(map, ip, &s)< 0)
  1425. return 0;
  1426. ip->imm = s&0xffff;
  1427. ip->imm64 = ip->imm;
  1428. }
  1429. break;
  1430. case Iwdq: /* Operand-sized immediate, possibly big */
  1431. if (ip->osize == 'L') {
  1432. if (igetl(map, ip, &ip->imm) < 0)
  1433. return 0;
  1434. ip->imm64 = ip->imm;
  1435. if (ip->rex & REXW) {
  1436. uint32_t l;
  1437. if (igetl(map, ip, &l) < 0)
  1438. return 0;
  1439. ip->imm64 |= (uint64_t)l << 32;
  1440. }
  1441. } else {
  1442. if (igets(map, ip, &s)< 0)
  1443. return 0;
  1444. ip->imm = s&0xffff;
  1445. }
  1446. break;
  1447. case Awd: /* Address-sized immediate (no sign extension)*/
  1448. if (ip->asize == 'E') {
  1449. if (igetl(map, ip, &ip->imm) < 0)
  1450. return 0;
  1451. /* TO DO: REX */
  1452. } else {
  1453. if (igets(map, ip, &s)< 0)
  1454. return 0;
  1455. ip->imm = s&0xffff;
  1456. }
  1457. break;
  1458. case Iwds: /* Operand-sized immediate (sign extended) */
  1459. if (ip->osize == 'L') {
  1460. if (igetl(map, ip, &ip->imm) < 0)
  1461. return 0;
  1462. } else {
  1463. if (igets(map, ip, &s)< 0)
  1464. return 0;
  1465. if (s&0x8000)
  1466. ip->imm = s|0xffff0000;
  1467. else
  1468. ip->imm = s&0xffff;
  1469. }
  1470. ip->jumptype = Iwds;
  1471. break;
  1472. case OA: /* literal 0x0a byte */
  1473. if (igetc(map, ip, &c) < 0)
  1474. return 0;
  1475. if (c != 0x0a)
  1476. goto badop;
  1477. break;
  1478. case R0: /* base register must be R0 */
  1479. if (ip->base != 0)
  1480. goto badop;
  1481. break;
  1482. case R1: /* base register must be R1 */
  1483. if (ip->base != 1)
  1484. goto badop;
  1485. break;
  1486. case RMB: /* R/M field with byte register (/r)*/
  1487. if (igetc(map, ip, &c) < 0)
  1488. return 0;
  1489. if (modrm(map, ip, c) < 0)
  1490. return 0;
  1491. ip->osize = 'B';
  1492. break;
  1493. case RM: /* R/M field with register (/r) */
  1494. if (igetc(map, ip, &c) < 0)
  1495. return 0;
  1496. if (modrm(map, ip, c) < 0)
  1497. return 0;
  1498. break;
  1499. case RMOPB: /* R/M field with op code (/digit) */
  1500. if (igetc(map, ip, &c) < 0)
  1501. return 0;
  1502. if (modrm(map, ip, c) < 0)
  1503. return 0;
  1504. c = ip->reg; /* secondary op code */
  1505. obase = (Optable*)op->proto;
  1506. ip->osize = 'B';
  1507. goto newop;
  1508. case RMOP: /* R/M field with op code (/digit) */
  1509. if (igetc(map, ip, &c) < 0)
  1510. return 0;
  1511. if (modrm(map, ip, c) < 0)
  1512. return 0;
  1513. obase = (Optable*)op->proto;
  1514. if(ip->amd64 && obase == optab0F01 && c == 0xF8)
  1515. return optab0F01F8;
  1516. c = ip->reg;
  1517. goto newop;
  1518. case FRMOP: /* FP R/M field with op code (/digit) */
  1519. if (igetc(map, ip, &c) < 0)
  1520. return 0;
  1521. if (modrm(map, ip, c) < 0)
  1522. return 0;
  1523. if ((c&0xc0) == 0xc0)
  1524. c = ip->reg+8; /* 16 entry table */
  1525. else
  1526. c = ip->reg;
  1527. obase = (Optable*)op->proto;
  1528. goto newop;
  1529. case FRMEX: /* Extended FP R/M field with op code (/digit) */
  1530. if (igetc(map, ip, &c) < 0)
  1531. return 0;
  1532. if (modrm(map, ip, c) < 0)
  1533. return 0;
  1534. if ((c&0xc0) == 0xc0)
  1535. c = (c&0x3f)+8; /* 64-entry table */
  1536. else
  1537. c = ip->reg;
  1538. obase = (Optable*)op->proto;
  1539. goto newop;
  1540. case RMR: /* R/M register only (mod = 11) */
  1541. if (igetc(map, ip, &c) < 0)
  1542. return 0;
  1543. if ((c&0xc0) != 0xc0) {
  1544. werrstr("invalid R/M register: %x", c);
  1545. return 0;
  1546. }
  1547. if (modrm(map, ip, c) < 0)
  1548. return 0;
  1549. break;
  1550. case RMM: /* R/M register only (mod = 11) */
  1551. if (igetc(map, ip, &c) < 0)
  1552. return 0;
  1553. if ((c&0xc0) == 0xc0) {
  1554. werrstr("invalid R/M memory mode: %x", c);
  1555. return 0;
  1556. }
  1557. if (modrm(map, ip, c) < 0)
  1558. return 0;
  1559. break;
  1560. case PTR: /* Seg:Displacement addr (ptr16:16 or ptr16:32) */
  1561. if (ip->osize == 'L') {
  1562. if (igetl(map, ip, &ip->disp) < 0)
  1563. return 0;
  1564. } else {
  1565. if (igets(map, ip, &s)< 0)
  1566. return 0;
  1567. ip->disp = s&0xffff;
  1568. }
  1569. if (igets(map, ip, (uint16_t*)&ip->seg) < 0)
  1570. return 0;
  1571. ip->jumptype = PTR;
  1572. break;
  1573. case AUXMM: /* Multi-byte op code; prefix determines table selection */
  1574. if (igetc(map, ip, &c) < 0)
  1575. return 0;
  1576. obase = (Optable*)op->proto;
  1577. switch (ip->opre) {
  1578. case 0x66: op = optab660F; break;
  1579. case 0xF2: op = optabF20F; break;
  1580. case 0xF3: op = optabF30F; break;
  1581. default: op = nil; break;
  1582. }
  1583. if(op != nil && op[c].proto != nil)
  1584. obase = op;
  1585. norex = 1; /* no more rex prefixes */
  1586. /* otherwise the optab entry captures it */
  1587. goto newop;
  1588. case AUX: /* Multi-byte op code - Auxiliary table */
  1589. obase = (Optable*)op->proto;
  1590. if (igetc(map, ip, &c) < 0)
  1591. return 0;
  1592. goto newop;
  1593. case OPRE: /* Instr Prefix or media op */
  1594. ip->opre = c;
  1595. /* fall through */
  1596. case PRE: /* Instr Prefix */
  1597. ip->prefix = (char*)op->proto;
  1598. if (igetc(map, ip, &c) < 0)
  1599. return 0;
  1600. if (ip->opre && c == 0x0F)
  1601. ip->prefix = 0;
  1602. goto newop;
  1603. case SEG: /* Segment Prefix */
  1604. ip->segment = (char*)op->proto;
  1605. if (igetc(map, ip, &c) < 0)
  1606. return 0;
  1607. goto newop;
  1608. case OPOVER: /* Operand size override */
  1609. ip->opre = c;
  1610. ip->osize = 'W';
  1611. if (igetc(map, ip, &c) < 0)
  1612. return 0;
  1613. if (c == 0x0F)
  1614. ip->osize = 'L';
  1615. else if (ip->amd64 && (c&0xF0) == 0x40)
  1616. ip->osize = 'Q';
  1617. goto newop;
  1618. case ADDOVER: /* Address size override */
  1619. ip->asize = 0;
  1620. if (igetc(map, ip, &c) < 0)
  1621. return 0;
  1622. goto newop;
  1623. case JUMP: /* mark instruction as JUMP or RET */
  1624. case RET:
  1625. ip->jumptype = op->operand[i];
  1626. break;
  1627. default:
  1628. werrstr("bad operand type %d", op->operand[i]);
  1629. return 0;
  1630. }
  1631. }
  1632. return op;
  1633. }
  1634. #pragma varargck argpos bprint 2
  1635. static void
  1636. bprint(Instr *ip, char *fmt, ...)
  1637. {
  1638. va_list arg;
  1639. va_start(arg, fmt);
  1640. ip->curr = vseprint(ip->curr, ip->end, fmt, arg);
  1641. va_end(arg);
  1642. }
  1643. /*
  1644. * if we want to call 16 bit regs AX,BX,CX,...
  1645. * and 32 bit regs EAX,EBX,ECX,... then
  1646. * change the defs of ANAME and ONAME to:
  1647. * #define ANAME(ip) ((ip->asize == 'E' ? "E" : "")
  1648. * #define ONAME(ip) ((ip)->osize == 'L' ? "E" : "")
  1649. */
  1650. #define ANAME(ip) ""
  1651. #define ONAME(ip) ""
  1652. static char *reg[] = {
  1653. [AX] = "AX",
  1654. [CX] = "CX",
  1655. [DX] = "DX",
  1656. [BX] = "BX",
  1657. [SP] = "SP",
  1658. [BP] = "BP",
  1659. [SI] = "SI",
  1660. [DI] = "DI",
  1661. /* amd64 */
  1662. [R8] = "R8",
  1663. [R9] = "R9",
  1664. [R10] = "R10",
  1665. [R11] = "R11",
  1666. [R12] = "R12",
  1667. [R13] = "R13",
  1668. [R14] = "R14",
  1669. [R15] = "R15",
  1670. };
  1671. static char *breg[] = { "AL", "CL", "DL", "BL", "AH", "CH", "DH", "BH" };
  1672. static char *breg64[] = { "AL", "CL", "DL", "BL", "SPB", "BPB", "SIB", "DIB",
  1673. "R8B", "R9B", "R10B", "R11B", "R12B", "R13B", "R14B", "R15B" };
  1674. static char *sreg[] = { "ES", "CS", "SS", "DS", "FS", "GS" };
  1675. static void
  1676. plocal(Instr *ip)
  1677. {
  1678. int ret;
  1679. int32_t offset;
  1680. Symbol s;
  1681. char *reg;
  1682. offset = ip->disp;
  1683. if (!findsym(ip->addr, CTEXT, &s) || !findlocal(&s, FRAMENAME, &s)) {
  1684. bprint(ip, "%lx(SP)", offset);
  1685. return;
  1686. }
  1687. if (s.value > ip->disp) {
  1688. ret = getauto(&s, s.value-ip->disp-mach->szaddr, CAUTO, &s);
  1689. reg = "(SP)";
  1690. } else {
  1691. offset -= s.value;
  1692. ret = getauto(&s, offset, CPARAM, &s);
  1693. reg = "(FP)";
  1694. }
  1695. if (ret)
  1696. bprint(ip, "%s+", s.name);
  1697. else
  1698. offset = ip->disp;
  1699. bprint(ip, "%lx%s", offset, reg);
  1700. }
  1701. static int
  1702. isjmp(Instr *ip)
  1703. {
  1704. switch(ip->jumptype){
  1705. case Iwds:
  1706. case Jbs:
  1707. case JUMP:
  1708. return 1;
  1709. default:
  1710. return 0;
  1711. }
  1712. }
  1713. /*
  1714. * This is too smart for its own good, but it really is nice
  1715. * to have accurate translations when debugging, and it
  1716. * helps us identify which code is different in binaries that
  1717. * are changed on sources.
  1718. */
  1719. static int
  1720. issymref(Instr *ip, Symbol *s, int32_t w, int32_t val)
  1721. {
  1722. Symbol next, tmp;
  1723. int32_t isstring, size;
  1724. if (isjmp(ip))
  1725. return 1;
  1726. if (s->class==CTEXT && w==0)
  1727. return 1;
  1728. if (s->class==CDATA) {
  1729. /* use first bss symbol (or "end") rather than edata */
  1730. if (s->name[0]=='e' && strcmp(s->name, "edata") == 0){
  1731. if((s ->index >= 0 && globalsym(&tmp, s->index+1) && tmp.value==s->value)
  1732. || (s->index > 0 && globalsym(&tmp, s->index-1) && tmp.value==s->value))
  1733. *s = tmp;
  1734. }
  1735. if (w == 0)
  1736. return 1;
  1737. for (next=*s; next.value==s->value; next=tmp)
  1738. if (!globalsym(&tmp, next.index+1))
  1739. break;
  1740. size = next.value - s->value;
  1741. if (w >= size)
  1742. return 0;
  1743. if (w > size-w)
  1744. w = size-w;
  1745. /* huge distances are usually wrong except in .string */
  1746. isstring = (s->name[0]=='.' && strcmp(s->name, ".string") == 0);
  1747. if (w > 8192 && !isstring)
  1748. return 0;
  1749. /* medium distances are tricky - look for constants */
  1750. /* near powers of two */
  1751. if ((val&(val-1)) == 0 || (val&(val+1)) == 0)
  1752. return 0;
  1753. return 1;
  1754. }
  1755. return 0;
  1756. }
  1757. static void
  1758. immediate(Instr *ip, int64_t val)
  1759. {
  1760. Symbol s;
  1761. int32_t w;
  1762. if (findsym(val, CANY, &s)) { /* TO DO */
  1763. w = val - s.value;
  1764. if (w < 0)
  1765. w = -w;
  1766. if (issymref(ip, &s, w, val)) {
  1767. if (w)
  1768. bprint(ip, "%s+%lx(SB)", s.name, w);
  1769. else
  1770. bprint(ip, "%s(SB)", s.name);
  1771. return;
  1772. }
  1773. /*
  1774. if (s.class==CDATA && globalsym(&s, s.index+1)) {
  1775. w = s.value - val;
  1776. if (w < 0)
  1777. w = -w;
  1778. if (w < 4096) {
  1779. bprint(ip, "%s-%lx(SB)", s.name, w);
  1780. return;
  1781. }
  1782. }
  1783. */
  1784. }
  1785. if((ip->rex & REXW) == 0)
  1786. bprint(ip, "%lx", (int32_t)val);
  1787. else
  1788. bprint(ip, "%llux", val);
  1789. }
  1790. static void
  1791. pea(Instr *ip)
  1792. {
  1793. if (ip->mod == 3) {
  1794. if (ip->osize == 'B')
  1795. bprint(ip, (ip->rex & REXB? breg64: breg)[ip->base]);
  1796. else if(ip->rex & REXB)
  1797. bprint(ip, "%s%s", ANAME(ip), reg[ip->base+8]);
  1798. else
  1799. bprint(ip, "%s%s", ANAME(ip), reg[ip->base]);
  1800. return;
  1801. }
  1802. if (ip->segment)
  1803. bprint(ip, ip->segment);
  1804. if (ip->asize == 'E' && ip->base == SP)
  1805. plocal(ip);
  1806. else {
  1807. if (ip->base < 0)
  1808. immediate(ip, ip->disp);
  1809. else {
  1810. bprint(ip, "%lx", ip->disp);
  1811. if(ip->rip)
  1812. bprint(ip, "(RIP)");
  1813. bprint(ip,"(%s%s)", ANAME(ip), reg[ip->rex&REXB? ip->base+8: ip->base]);
  1814. }
  1815. }
  1816. if (ip->index >= 0)
  1817. bprint(ip,"(%s%s*%d)", ANAME(ip), reg[ip->rex&REXX? ip->index+8: ip->index], 1<<ip->ss);
  1818. }
  1819. static void
  1820. prinstr(Instr *ip, char *fmt)
  1821. {
  1822. int64_t v;
  1823. if (ip->prefix)
  1824. bprint(ip, "%s ", ip->prefix);
  1825. for (; *fmt && ip->curr < ip->end; fmt++) {
  1826. if (*fmt != '%'){
  1827. *ip->curr++ = *fmt;
  1828. continue;
  1829. }
  1830. switch(*++fmt){
  1831. case '%':
  1832. *ip->curr++ = '%';
  1833. break;
  1834. case 'A':
  1835. bprint(ip, "%s", ANAME(ip));
  1836. break;
  1837. case 'C':
  1838. bprint(ip, "CR%d", ip->reg);
  1839. break;
  1840. case 'D':
  1841. if (ip->reg < 4 || ip->reg == 6 || ip->reg == 7)
  1842. bprint(ip, "DR%d",ip->reg);
  1843. else
  1844. bprint(ip, "???");
  1845. break;
  1846. case 'I':
  1847. bprint(ip, "$");
  1848. immediate(ip, ip->imm2);
  1849. break;
  1850. case 'O':
  1851. bprint(ip,"%s", ONAME(ip));
  1852. break;
  1853. case 'i':
  1854. bprint(ip, "$");
  1855. v = ip->imm;
  1856. if(ip->rex & REXW)
  1857. v = ip->imm64;
  1858. immediate(ip, v);
  1859. break;
  1860. case 'R':
  1861. bprint(ip, "%s%s", ONAME(ip), reg[ip->rex&REXR? ip->reg+8: ip->reg]);
  1862. break;
  1863. case 'S':
  1864. if(ip->osize == 'Q' || ip->osize == 'L' && ip->rex & REXW)
  1865. bprint(ip, "Q");
  1866. else
  1867. bprint(ip, "%c", ip->osize);
  1868. break;
  1869. case 's':
  1870. if(ip->opre == 0 || ip->opre == 0x66)
  1871. bprint(ip, "P");
  1872. else
  1873. bprint(ip, "S");
  1874. if(ip->opre == 0xf2 || ip->opre == 0x66)
  1875. bprint(ip, "D");
  1876. else
  1877. bprint(ip, "S");
  1878. break;
  1879. case 'T':
  1880. if (ip->reg == 6 || ip->reg == 7)
  1881. bprint(ip, "TR%d",ip->reg);
  1882. else
  1883. bprint(ip, "???");
  1884. break;
  1885. case 'W':
  1886. if (ip->osize == 'Q' || ip->osize == 'L' && ip->rex & REXW)
  1887. bprint(ip, "CDQE");
  1888. else if (ip->osize == 'L')
  1889. bprint(ip,"CWDE");
  1890. else
  1891. bprint(ip, "CBW");
  1892. break;
  1893. case 'd':
  1894. bprint(ip,"%x:%lx",ip->seg,ip->disp);
  1895. break;
  1896. case 'm':
  1897. if (ip->mod == 3 && ip->osize != 'B') {
  1898. if(fmt[1] != '*'){
  1899. if(ip->opre != 0) {
  1900. bprint(ip, "X%d", ip->rex&REXB? ip->base+8: ip->base);
  1901. break;
  1902. }
  1903. } else
  1904. fmt++;
  1905. bprint(ip, "M%d", ip->base);
  1906. break;
  1907. }
  1908. pea(ip);
  1909. break;
  1910. case 'e':
  1911. pea(ip);
  1912. break;
  1913. case 'f':
  1914. bprint(ip, "F%d", ip->base);
  1915. break;
  1916. case 'g':
  1917. if (ip->reg < 6)
  1918. bprint(ip,"%s",sreg[ip->reg]);
  1919. else
  1920. bprint(ip,"???");
  1921. break;
  1922. case 'p':
  1923. /*
  1924. * signed immediate in the ulong ip->imm.
  1925. */
  1926. v = (int32_t)ip->imm;
  1927. immediate(ip, v+ip->addr+ip->n);
  1928. break;
  1929. case 'r':
  1930. if (ip->osize == 'B')
  1931. bprint(ip,"%s", (ip->rex? breg64: breg)[ip->rex&REXR? ip->reg+8: ip->reg]);
  1932. else
  1933. bprint(ip, reg[ip->rex&REXR? ip->reg+8: ip->reg]);
  1934. break;
  1935. case 'w':
  1936. if (ip->osize == 'Q' || ip->rex & REXW)
  1937. bprint(ip, "CQO");
  1938. else if (ip->osize == 'L')
  1939. bprint(ip,"CDQ");
  1940. else
  1941. bprint(ip, "CWD");
  1942. break;
  1943. case 'M':
  1944. if(ip->opre != 0)
  1945. bprint(ip, "X%d", ip->rex&REXR? ip->reg+8: ip->reg);
  1946. else
  1947. bprint(ip, "M%d", ip->reg);
  1948. break;
  1949. case 'x':
  1950. if (ip->mod == 3 && ip->osize != 'B') {
  1951. bprint(ip, "X%d", ip->rex&REXB? ip->base+8: ip->base);
  1952. break;
  1953. }
  1954. pea(ip);
  1955. break;
  1956. case 'X':
  1957. bprint(ip, "X%d", ip->rex&REXR? ip->reg+8: ip->reg);
  1958. break;
  1959. default:
  1960. bprint(ip, "%%%c", *fmt);
  1961. break;
  1962. }
  1963. }
  1964. *ip->curr = 0; /* there's always room for 1 byte */
  1965. }
  1966. static int
  1967. i386inst(Map *map, uint64_t pc, char modifier, char *buf, int n)
  1968. {
  1969. Instr instr;
  1970. Optable *op;
  1971. USED(modifier);
  1972. op = mkinstr(map, &instr, pc);
  1973. if (op == 0) {
  1974. errstr(buf, n);
  1975. return -1;
  1976. }
  1977. instr.curr = buf;
  1978. instr.end = buf+n-1;
  1979. prinstr(&instr, op->proto);
  1980. return instr.n;
  1981. }
  1982. static int
  1983. i386das(Map *map, uint64_t pc, char *buf, int n)
  1984. {
  1985. Instr instr;
  1986. int i;
  1987. if (mkinstr(map, &instr, pc) == 0) {
  1988. errstr(buf, n);
  1989. return -1;
  1990. }
  1991. for(i = 0; i < instr.n && n > 2; i++) {
  1992. _hexify(buf, instr.mem[i], 1);
  1993. buf += 2;
  1994. n -= 2;
  1995. }
  1996. *buf = 0;
  1997. return instr.n;
  1998. }
  1999. static int
  2000. i386instlen(Map *map, uint64_t pc)
  2001. {
  2002. Instr i;
  2003. if (mkinstr(map, &i, pc))
  2004. return i.n;
  2005. return -1;
  2006. }
  2007. static int
  2008. i386foll(Map *map, uint64_t pc, Rgetter rget, uint64_t *foll)
  2009. {
  2010. Instr i;
  2011. Optable *op;
  2012. uint16_t s;
  2013. uint64_t l, addr;
  2014. int64_t v;
  2015. int n;
  2016. op = mkinstr(map, &i, pc);
  2017. if (!op)
  2018. return -1;
  2019. n = 0;
  2020. switch(i.jumptype) {
  2021. case RET: /* RETURN or LEAVE */
  2022. case Iw: /* RETURN */
  2023. if (strcmp(op->proto, "LEAVE") == 0) {
  2024. if (geta(map, (*rget)(map, "BP"), &l) < 0)
  2025. return -1;
  2026. } else if (geta(map, (*rget)(map, mach->sp), &l) < 0)
  2027. return -1;
  2028. foll[0] = l;
  2029. return 1;
  2030. case Iwds: /* pc relative JUMP or CALL*/
  2031. case Jbs: /* pc relative JUMP or CALL */
  2032. v = (int32_t)i.imm;
  2033. foll[0] = pc+v+i.n;
  2034. n = 1;
  2035. break;
  2036. case PTR: /* seg:displacement JUMP or CALL */
  2037. foll[0] = (i.seg<<4)+i.disp;
  2038. return 1;
  2039. case JUMP: /* JUMP or CALL EA */
  2040. if(i.mod == 3) {
  2041. foll[0] = (*rget)(map, reg[i.rex&REXB? i.base+8: i.base]);
  2042. return 1;
  2043. }
  2044. /* calculate the effective address */
  2045. addr = i.disp;
  2046. if (i.base >= 0) {
  2047. if (geta(map, (*rget)(map, reg[i.rex&REXB? i.base+8: i.base]), &l) < 0)
  2048. return -1;
  2049. addr += l;
  2050. }
  2051. if (i.index >= 0) {
  2052. if (geta(map, (*rget)(map, reg[i.rex&REXX? i.index+8: i.index]), &l) < 0)
  2053. return -1;
  2054. addr += l*(1<<i.ss);
  2055. }
  2056. /* now retrieve a seg:disp value at that address */
  2057. if (get2(map, addr, &s) < 0) /* seg */
  2058. return -1;
  2059. foll[0] = s<<4;
  2060. addr += 2;
  2061. if (i.asize == 'L') {
  2062. if (geta(map, addr, &l) < 0) /* disp32 */
  2063. return -1;
  2064. foll[0] += l;
  2065. } else { /* disp16 */
  2066. if (get2(map, addr, &s) < 0)
  2067. return -1;
  2068. foll[0] += s;
  2069. }
  2070. return 1;
  2071. default:
  2072. break;
  2073. }
  2074. if (strncmp(op->proto,"JMP", 3) == 0 || strncmp(op->proto,"CALL", 4) == 0)
  2075. return 1;
  2076. foll[n++] = pc+i.n;
  2077. return n;
  2078. }