alpha 4.7 KB

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  1. // Alpha support
  2. defn acidinit() // Called after all the init modules are loaded
  3. {
  4. bplist = {};
  5. bpfmt = 'X';
  6. srcpath = {
  7. "./",
  8. "/sys/src/libc/port/",
  9. "/sys/src/libc/9sys/",
  10. "/sys/src/libc/alpha/"
  11. };
  12. srcfiles = {}; // list of loaded files
  13. srctext = {}; // the text of the files
  14. }
  15. defn stk() // trace
  16. {
  17. _stk(*PC, *SP, linkreg(0), 0);
  18. }
  19. defn lstk() // trace with locals
  20. {
  21. _stk(*PC, *SP, linkreg(0), 1);
  22. }
  23. defn gpr() // print general purpose registers
  24. {
  25. print("R0\t", *R0, "\n");
  26. print("R1\t", *R1, " R2\t", *R2, " R3\t", *R3, "\n");
  27. print("R4\t", *R4, " R5\t", *R5, " R6\t", *R6, "\n");
  28. print("R7\t", *R7, " R8\t", *R8, " R9\t", *R9, "\n");
  29. print("R10\t", *R10, " R11\t", *R11, " R12\t", *R12, "\n");
  30. print("R13\t", *R13, " R14\t", *R14, " R15\t", *R15, "\n");
  31. print("R16\t", *R16, " R17\t", *R17, " R18\t", *R18, "\n");
  32. print("R19\t", *R19, " R20\t", *R20, " R21\t", *R21, "\n");
  33. print("R22\t", *R22, " R23\t", *R23, " R24\t", *R24, "\n");
  34. print("R25\t", *R25, " R26\t", *R26, " R27\t", *R27, "\n");
  35. print("R28\t", *R28, " R29\t", *R29, " R30\t", *SP\Y, "\n");
  36. }
  37. defn fpr()
  38. {
  39. print("F0\t", *fmt(F0, 'G'), "\tF1\t", *fmt(F1, 'G'), "\n");
  40. print("F2\t", *fmt(F2, 'G'), "\tF3\t", *fmt(F3, 'G'), "\n");
  41. print("F4\t", *fmt(F4, 'G'), "\tF5\t", *fmt(F5, 'G'), "\n");
  42. print("F6\t", *fmt(F6, 'G'), "\tF7\t", *fmt(F7, 'G'), "\n");
  43. print("F8\t", *fmt(F8, 'G'), "\tF9\t", *fmt(F9, 'G'), "\n");
  44. print("F10\t", *fmt(F10, 'G'), "\tF11\t", *fmt(F11, 'G'), "\n");
  45. print("F12\t", *fmt(F12, 'G'), "\tF13\t", *fmt(F13, 'G'), "\n");
  46. print("F14\t", *fmt(F14, 'G'), "\tF15\t", *fmt(F15, 'G'), "\n");
  47. print("F16\t", *fmt(F16, 'G'), "\tF17\t", *fmt(F17, 'G'), "\n");
  48. print("F18\t", *fmt(F18, 'G'), "\tF19\t", *fmt(F19, 'G'), "\n");
  49. print("F20\t", *fmt(F20, 'G'), "\tF21\t", *fmt(F21, 'G'), "\n");
  50. print("F22\t", *fmt(F22, 'G'), "\tF23\t", *fmt(F23, 'G'), "\n");
  51. print("F24\t", *fmt(F24, 'G'), "\tF25\t", *fmt(F25, 'G'), "\n");
  52. print("F26\t", *fmt(F26, 'G'), "\tF27\t", *fmt(F27, 'G'), "\n");
  53. print("F28\t", *fmt(F28, 'G'), "\tF29\t", *fmt(F29, 'G'), "\n");
  54. print("F30\t", *fmt(F30, 'G'), "\tF31\t", *fmt(F31, 'G'), "\n");
  55. }
  56. defn spr() // print special processor registers
  57. {
  58. local pc, link, cause;
  59. pc = *PC;
  60. print("PC\t", pc, " ", fmt(pc, 'a'), " ");
  61. pfl(pc);
  62. link = *R26;
  63. print("SP\t", *SP, "\tLINK\t", link, " ", fmt(link, 'a'), " ");
  64. pfl(link);
  65. cause = *TYPE;
  66. print("STATUS\t", *STATUS, "\tTYPE\t", cause, " ", reason(cause), "\n");
  67. print("A0\t", *A0, " A1\t", *A1, " A2\t", *A2, "\n");
  68. }
  69. defn regs() // print all registers
  70. {
  71. spr();
  72. gpr();
  73. }
  74. defn pstop(pid)
  75. {
  76. local l, pc;
  77. pc = *PC;
  78. print(pid,": ", reason(*TYPE), "\t");
  79. print(fmt(pc, 'a'), "\t", fmt(pc, 'i'), "\n");
  80. if notes then {
  81. if notes[0] != "sys: breakpoint" then {
  82. print("Notes pending:\n");
  83. l = notes;
  84. while l do {
  85. print("\t", head l, "\n");
  86. l = tail l;
  87. }
  88. }
  89. }
  90. }
  91. sizeofUreg = 296;
  92. aggr Ureg
  93. {
  94. 'W' 0 type;
  95. 'W' 8 a0;
  96. 'W' 16 a1;
  97. 'W' 24 a2;
  98. 'W' 32 r0;
  99. 'W' 40 r1;
  100. 'W' 48 r2;
  101. 'W' 56 r3;
  102. 'W' 64 r4;
  103. 'W' 72 r5;
  104. 'W' 80 r6;
  105. 'W' 88 r7;
  106. 'W' 96 r8;
  107. 'W' 104 r9;
  108. 'W' 112 r10;
  109. 'W' 120 r11;
  110. 'W' 128 r12;
  111. 'W' 136 r13;
  112. 'W' 144 r14;
  113. 'W' 152 r15;
  114. 'W' 160 r19;
  115. 'W' 168 r20;
  116. 'W' 176 r21;
  117. 'W' 184 r22;
  118. 'W' 192 r23;
  119. 'W' 200 r24;
  120. 'W' 208 r25;
  121. 'W' 216 r26;
  122. 'W' 224 r27;
  123. 'W' 232 r28;
  124. {
  125. 'W' 240 r30;
  126. 'W' 240 usp;
  127. 'W' 240 sp;
  128. };
  129. 'W' 248 status;
  130. 'W' 256 pc;
  131. 'W' 264 r29;
  132. 'W' 272 r16;
  133. 'W' 280 r17;
  134. 'W' 288 r18;
  135. };
  136. defn
  137. Ureg(addr) {
  138. complex Ureg addr;
  139. print(" type ", addr.type, "\n");
  140. print(" a0 ", addr.a0, "\n");
  141. print(" a1 ", addr.a1, "\n");
  142. print(" a2 ", addr.a2, "\n");
  143. print(" r0 ", addr.r0, "\n");
  144. print(" r1 ", addr.r1, "\n");
  145. print(" r2 ", addr.r2, "\n");
  146. print(" r3 ", addr.r3, "\n");
  147. print(" r4 ", addr.r4, "\n");
  148. print(" r5 ", addr.r5, "\n");
  149. print(" r6 ", addr.r6, "\n");
  150. print(" r7 ", addr.r7, "\n");
  151. print(" r8 ", addr.r8, "\n");
  152. print(" r9 ", addr.r9, "\n");
  153. print(" r10 ", addr.r10, "\n");
  154. print(" r11 ", addr.r11, "\n");
  155. print(" r12 ", addr.r12, "\n");
  156. print(" r13 ", addr.r13, "\n");
  157. print(" r14 ", addr.r14, "\n");
  158. print(" r15 ", addr.r15, "\n");
  159. print(" r19 ", addr.r19, "\n");
  160. print(" r20 ", addr.r20, "\n");
  161. print(" r21 ", addr.r21, "\n");
  162. print(" r22 ", addr.r22, "\n");
  163. print(" r23 ", addr.r23, "\n");
  164. print(" r24 ", addr.r24, "\n");
  165. print(" r25 ", addr.r25, "\n");
  166. print(" r26 ", addr.r26, "\n");
  167. print(" r27 ", addr.r27, "\n");
  168. print(" r28 ", addr.r28, "\n");
  169. print("_12_ {\n");
  170. _12_(addr+240);
  171. print("}\n");
  172. print(" status ", addr.status, "\n");
  173. print(" pc ", addr.pc, "\n");
  174. print(" r29 ", addr.r29, "\n");
  175. print(" r16 ", addr.r16, "\n");
  176. print(" r17 ", addr.r17, "\n");
  177. print(" r18 ", addr.r18, "\n");
  178. };
  179. defn linkreg(addr)
  180. {
  181. complex Ureg addr;
  182. return addr.r26\X;
  183. }
  184. print("/sys/lib/acid/alpha");