vga.h 10 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447
  1. /*
  2. * Generic VGA registers.
  3. */
  4. enum {
  5. MiscW = 0x03C2, /* Miscellaneous Output (W) */
  6. MiscR = 0x03CC, /* Miscellaneous Output (R) */
  7. Status0 = 0x03C2, /* Input status 0 (R) */
  8. Status1 = 0x03DA, /* Input Status 1 (R) */
  9. FeatureR = 0x03CA, /* Feature Control (R) */
  10. FeatureW = 0x03DA, /* Feature Control (W) */
  11. Seqx = 0x03C4, /* Sequencer Index, Data at Seqx+1 */
  12. Crtx = 0x03D4, /* CRT Controller Index, Data at Crtx+1 */
  13. Grx = 0x03CE, /* Graphics Controller Index, Data at Grx+1 */
  14. Attrx = 0x03C0, /* Attribute Controller Index and Data */
  15. PaddrW = 0x03C8, /* Palette Address Register, write */
  16. Pdata = 0x03C9, /* Palette Data Register */
  17. Pixmask = 0x03C6, /* Pixel Mask Register */
  18. PaddrR = 0x03C7, /* Palette Address Register, read */
  19. Pstatus = 0x03C7, /* DAC Status (RO) */
  20. Pcolours = 256, /* Palette */
  21. Red = 0,
  22. Green = 1,
  23. Blue = 2,
  24. Pblack = 0x00,
  25. Pwhite = 0xFF,
  26. };
  27. enum {
  28. RefFreq = 14318180, /* External Reference Clock frequency */
  29. VgaFreq0 = 25175000,
  30. VgaFreq1 = 28322000,
  31. };
  32. enum {
  33. Namelen = 32,
  34. };
  35. typedef struct Ctlr Ctlr;
  36. typedef struct Vga Vga;
  37. typedef struct Ctlr {
  38. char name[Namelen+1];
  39. void (*snarf)(Vga*, Ctlr*);
  40. void (*options)(Vga*, Ctlr*);
  41. void (*init)(Vga*, Ctlr*);
  42. void (*load)(Vga*, Ctlr*);
  43. void (*dump)(Vga*, Ctlr*);
  44. char* type;
  45. ulong flag;
  46. Ctlr* link;
  47. } Ctlr;
  48. enum { /* flag */
  49. Fsnarf = 0x00000001, /* snarf done */
  50. Foptions = 0x00000002, /* options done */
  51. Finit = 0x00000004, /* init done */
  52. Fload = 0x00000008, /* load done */
  53. Fdump = 0x00000010, /* dump done */
  54. Ferror = 0x00000020, /* error during snarf */
  55. Hpclk2x8 = 0x00000100, /* have double 8-bit mode */
  56. Upclk2x8 = 0x00000200, /* use double 8-bit mode */
  57. Henhanced = 0x00000400, /* have enhanced mode */
  58. Uenhanced = 0x00000800, /* use enhanced mode */
  59. Hpvram = 0x00001000, /* have parallel VRAM */
  60. Upvram = 0x00002000, /* use parallel VRAM */
  61. Hextsid = 0x00004000, /* have external SID mode */
  62. Uextsid = 0x00008000, /* use external SID mode */
  63. Hclk2 = 0x00010000, /* have clock-doubler */
  64. Uclk2 = 0x00020000, /* use clock-doubler */
  65. Hlinear = 0x00040000, /* have linear-address mode */
  66. Ulinear = 0x00080000, /* use linear-address mode */
  67. Hclkdiv = 0x00100000, /* have a clock-divisor */
  68. Uclkdiv = 0x00200000, /* use clock-divisor */
  69. Hsid32 = 0x00400000, /* have a 32-bit (as opposed to 64-bit) SID */
  70. };
  71. typedef struct Attr Attr;
  72. typedef struct Attr {
  73. char* attr;
  74. char* val;
  75. Attr* next;
  76. } Attr;
  77. typedef struct Mode {
  78. char type[Namelen+1]; /* monitor type e.g. "vs1782" */
  79. char size[Namelen+1]; /* size e.g. "1376x1024x8" */
  80. char chan[Namelen+1]; /* channel descriptor, e.g. "m8" or "r8g8b8a8" */
  81. int frequency; /* Dot Clock (MHz) */
  82. int deffrequency; /* Default dot clock if calculation can't be done */
  83. int x; /* Horizontal Display End (Crt01), from .size[] */
  84. int y; /* Vertical Display End (Crt18), from .size[] */
  85. int z; /* depth, from .size[] */
  86. int ht; /* Horizontal Total (Crt00) */
  87. int shb; /* Start Horizontal Blank (Crt02) */
  88. int ehb; /* End Horizontal Blank (Crt03) */
  89. int shs; /* optional Start Horizontal Sync (Crt04) */
  90. int ehs; /* optional End Horizontal Sync (Crt05) */
  91. int vt; /* Vertical Total (Crt06) */
  92. int vrs; /* Vertical Retrace Start (Crt10) */
  93. int vre; /* Vertical Retrace End (Crt11) */
  94. ulong videobw;
  95. char hsync;
  96. char vsync;
  97. char interlace;
  98. Attr* attr;
  99. } Mode;
  100. /*
  101. * The sizes of the register sets are large as many SVGA and GUI chips have extras.
  102. * The Crt registers are ushorts in order to keep overflow bits handy.
  103. * The clock elements are used for communication between the VGA, RAMDAC and clock chips;
  104. * they can use them however they like, it's assumed they will be used compatibly.
  105. *
  106. * The mode->x, mode->y coordinates are the physical size of the screen.
  107. * Virtx and virty are the coordinates of the underlying memory image.
  108. * This can be used to implement panning around a larger screen or to cope
  109. * with chipsets that need the in-memory pixel line width to be a round number.
  110. * For example, virge.c uses this because the Savage chipset needs the pixel
  111. * width to be a multiple of 16. Also, mga2164w.c needs the pixel width
  112. * to be a multiple of 128.
  113. *
  114. * Vga->panning differentiates between these two uses of virtx, virty.
  115. *
  116. * (14 October 2001, rsc) Most drivers don't know the difference between
  117. * mode->x and virtx, a bug that should be corrected. Vga.c, virge.c, and
  118. * mga2164w.c know. For the others, the computation that sets crt[0x13]
  119. * should use virtx instead of mode->x (and maybe other places change too,
  120. * dependent on the driver).
  121. */
  122. typedef struct Vga {
  123. uchar misc;
  124. uchar feature;
  125. uchar sequencer[256];
  126. ushort crt[256];
  127. uchar graphics[256];
  128. uchar attribute[256];
  129. uchar pixmask;
  130. uchar pstatus;
  131. uchar palette[Pcolours][3];
  132. ulong f[2]; /* clock */
  133. ulong d[2];
  134. ulong i[2];
  135. ulong m[2];
  136. ulong n[2];
  137. ulong p[2];
  138. ulong q[2];
  139. ulong r[2];
  140. ulong vma; /* video memory linear-address alignment */
  141. ulong vmb; /* video memory linear-address base */
  142. ulong apz; /* aperture size */
  143. ulong vmz; /* video memory size */
  144. ulong membw; /* memory bandwidth, MB/s */
  145. long offset; /* BIOS string offset */
  146. char* bios; /* matching BIOS string */
  147. Pcidev* pci; /* matching PCI device if any */
  148. Mode* mode;
  149. ulong virtx; /* resolution of virtual screen */
  150. ulong virty;
  151. int panning; /* pan the virtual screen */
  152. Ctlr* ctlr;
  153. Ctlr* ramdac;
  154. Ctlr* clock;
  155. Ctlr* hwgc;
  156. Ctlr* vesa;
  157. Ctlr* link;
  158. int linear;
  159. Attr* attr;
  160. void* private;
  161. } Vga;
  162. /* 3dfx.c */
  163. extern Ctlr tdfx;
  164. extern Ctlr tdfxhwgc;
  165. /* ark2000pv.c */
  166. extern Ctlr ark2000pv;
  167. extern Ctlr ark2000pvhwgc;
  168. /* att20c49x.c */
  169. extern Ctlr att20c490;
  170. extern Ctlr att20c491;
  171. extern Ctlr att20c492;
  172. /* att21c498.c */
  173. extern uchar attdaci(uchar);
  174. extern void attdaco(uchar, uchar);
  175. extern Ctlr att21c498;
  176. /* bt485.c */
  177. extern uchar bt485i(uchar);
  178. extern void bt485o(uchar, uchar);
  179. extern Ctlr bt485;
  180. /* ch9294.c */
  181. extern Ctlr ch9294;
  182. /* clgd542x.c */
  183. extern void clgd54xxclock(Vga*, Ctlr*);
  184. extern Ctlr clgd542x;
  185. extern Ctlr clgd542xhwgc;
  186. /* clgd546x.c */
  187. extern Ctlr clgd546x;
  188. extern Ctlr clgd546xhwgc;
  189. /* ct65540.c */
  190. extern Ctlr ct65540;
  191. extern Ctlr ct65545;
  192. extern Ctlr ct65545hwgc;
  193. /* cyber938x.c */
  194. extern Ctlr cyber938x;
  195. extern Ctlr cyber938xhwgc;
  196. /* data.c */
  197. extern int cflag;
  198. extern int dflag;
  199. extern Ctlr *ctlrs[];
  200. extern ushort dacxreg[4];
  201. /* db.c */
  202. extern char* dbattr(Attr*, char*);
  203. extern int dbctlr(char*, Vga*);
  204. extern Mode* dbmode(char*, char*, char*);
  205. extern void dbdumpmode(Mode*);
  206. /* error.c */
  207. extern void error(char*, ...);
  208. extern void trace(char*, ...);
  209. extern int vflag, Vflag;
  210. /* et4000.c */
  211. extern Ctlr et4000;
  212. /* et4000hwgc.c */
  213. extern Ctlr et4000hwgc;
  214. /* hiqvideo.c */
  215. extern Ctlr hiqvideo;
  216. extern Ctlr hiqvideohwgc;
  217. /* i81x.c */
  218. extern Ctlr i81x;
  219. extern Ctlr i81xhwgc;
  220. /* ibm8514.c */
  221. extern Ctlr ibm8514;
  222. /* icd2061a.c */
  223. extern Ctlr icd2061a;
  224. /* ics2494.c */
  225. extern Ctlr ics2494;
  226. extern Ctlr ics2494a;
  227. /* ics534x.c */
  228. extern Ctlr ics534x;
  229. /* io.c */
  230. extern uchar inportb(long);
  231. extern void outportb(long, uchar);
  232. extern ushort inportw(long);
  233. extern void outportw(long, ushort);
  234. extern ulong inportl(long);
  235. extern void outportl(long, ulong);
  236. extern char* vgactlr(char*, char*);
  237. extern void vgactlw(char*, char*);
  238. extern char* readbios(long, long);
  239. extern void dumpbios(long);
  240. extern void error(char*, ...);
  241. extern void* alloc(ulong);
  242. extern void printitem(char*, char*);
  243. extern void printreg(ulong);
  244. extern void printflag(ulong);
  245. extern void setpalette(int, int, int, int);
  246. extern int curprintindex;
  247. /* mach32.c */
  248. extern Ctlr mach32;
  249. /* mach64.c */
  250. extern Ctlr mach64;
  251. /* mach64xx.c */
  252. extern Ctlr mach64xx;
  253. extern Ctlr mach64xxhwgc;
  254. /* main.c */
  255. extern char* chanstr[];
  256. extern void resyncinit(Vga*, Ctlr*, ulong, ulong);
  257. extern void sequencer(Vga*, int);
  258. extern void main(int, char*[]);
  259. Biobuf stdout;
  260. /* mga2164w.c */
  261. extern Ctlr mga2164w;
  262. extern Ctlr mga2164whwgc;
  263. /* neomagic.c */
  264. extern Ctlr neomagic;
  265. extern Ctlr neomagichwgc;
  266. /* nvidia.c */
  267. extern Ctlr nvidia;
  268. extern Ctlr nvidiahwgc;
  269. /* palette.c */
  270. extern Ctlr palette;
  271. /* pci.c */
  272. typedef struct Pcidev Pcidev;
  273. extern int pcicfgr8(Pcidev*, int);
  274. extern int pcicfgr16(Pcidev*, int);
  275. extern int pcicfgr32(Pcidev*, int);
  276. extern void pcicfgw8(Pcidev*, int, int);
  277. extern void pcicfgw16(Pcidev*, int, int);
  278. extern void pcicfgw32(Pcidev*, int, int);
  279. extern void pcihinv(Pcidev*);
  280. extern Pcidev* pcimatch(Pcidev*, int, int);
  281. /* rgb524.c */
  282. extern Ctlr rgb524;
  283. /* rgb524mn.c */
  284. extern uchar (*rgb524mnxi)(Vga*, int);
  285. extern void (*rgb524mnxo)(Vga*, int, uchar);
  286. extern Ctlr rgb524mn;
  287. /* s3801.c */
  288. extern Ctlr s3801;
  289. extern Ctlr s3805;
  290. /* s3928.c */
  291. extern Ctlr s3928;
  292. /* s3clock.c */
  293. extern Ctlr s3clock;
  294. /* s3generic.c */
  295. extern Ctlr s3generic;
  296. /* s3hwgc.c */
  297. extern Ctlr bt485hwgc;
  298. extern Ctlr rgb524hwgc;
  299. extern Ctlr s3hwgc;
  300. extern Ctlr tvp3020hwgc;
  301. extern Ctlr tvp3026hwgc;
  302. /* sc15025.c */
  303. extern Ctlr sc15025;
  304. /* stg1702.c */
  305. extern Ctlr stg1702;
  306. /* t2r4.c */
  307. extern Ctlr t2r4;
  308. extern Ctlr t2r4hwgc;
  309. /* trio64.c */
  310. extern void trio64clock(Vga*, Ctlr*);
  311. extern Ctlr trio64;
  312. /* tvp3020.c */
  313. extern uchar tvp3020i(uchar);
  314. extern uchar tvp3020xi(uchar);
  315. extern void tvp3020o(uchar, uchar);
  316. extern void tvp3020xo(uchar, uchar);
  317. extern Ctlr tvp3020;
  318. /* tvp3025.c */
  319. extern Ctlr tvp3025;
  320. /* tvp3025clock.c */
  321. extern Ctlr tvp3025clock;
  322. /* tvp3026.c */
  323. extern uchar tvp3026xi(uchar);
  324. extern void tvp3026xo(uchar, uchar);
  325. extern Ctlr tvp3026;
  326. /* tvp3026clock.c */
  327. extern Ctlr tvp3026clock;
  328. /* vga.c */
  329. extern uchar vgai(long);
  330. extern uchar vgaxi(long, uchar);
  331. extern void vgao(long, uchar);
  332. extern void vgaxo(long, uchar, uchar);
  333. extern Ctlr generic;
  334. /* vesa.c */
  335. extern Ctlr vesa;
  336. extern Ctlr softhwgc; /* has to go somewhere */
  337. extern int dbvesa(Vga*);
  338. extern Mode *dbvesamode(char*);
  339. extern void vesatextmode(void);
  340. /* virge.c */
  341. extern Ctlr virge;
  342. /* vision864.c */
  343. extern Ctlr vision864;
  344. /* vision964.c */
  345. extern Ctlr vision964;
  346. /* vision968.c */
  347. extern Ctlr vision968;
  348. /* vmware.c */
  349. extern Ctlr vmware;
  350. extern Ctlr vmwarehwgc;
  351. /* w30c516.c */
  352. extern Ctlr w30c516;
  353. /* mga4xx.c */
  354. extern Ctlr mga4xx;
  355. extern Ctlr mga4xxhwgc;
  356. #pragma varargck argpos error 1
  357. #pragma varargck argpos trace 1