nvidia.c 12 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586
  1. #include <u.h>
  2. #include <libc.h>
  3. #include <bio.h>
  4. #include "pci.h"
  5. #include "vga.h"
  6. #include "riva_tbl.h"
  7. typedef struct Nvidia Nvidia;
  8. struct Nvidia {
  9. ulong mmio;
  10. Pcidev* pci;
  11. int arch;
  12. int crystalfreq;
  13. ulong* pfb; /* mmio pointers */
  14. ulong* pramdac;
  15. ulong* pextdev;
  16. ulong* pmc;
  17. ulong* ptimer;
  18. ulong* pfifo;
  19. ulong* pramin;
  20. ulong* pgraph;
  21. ulong* fifo;
  22. ulong cursor2;
  23. ulong vpll;
  24. ulong pllsel;
  25. ulong general;
  26. ulong scale;
  27. ulong config;
  28. ulong offset[4];
  29. ulong pitch[6];
  30. int islcd;
  31. };
  32. static int extcrts[] = {
  33. 0x19, 0x1A, 0x25, 0x28, 0x2D, 0x30, 0x31, -1
  34. };
  35. static void
  36. snarf(Vga* vga, Ctlr* ctlr)
  37. {
  38. Nvidia *nv;
  39. Pcidev *p;
  40. ulong m, *mmio, tmp;
  41. int i;
  42. if(vga->private == nil){
  43. vga->private = alloc(sizeof(Nvidia));
  44. nv = vga->private;
  45. p = nil;
  46. while((p = pcimatch(p, 0x10DE, 0)) != nil){
  47. if((p->ccru>>8) == 3)
  48. break;
  49. }
  50. if(p == nil)
  51. error("%s: not found\n", ctlr->name);
  52. if(p->did < 0x20)
  53. error("%s: DID %4.4uX unsupported\n", ctlr->name, p->did);
  54. switch(p->did&0xFF00){
  55. case 0:
  56. nv->arch = 4;
  57. break;
  58. case 0x0100:
  59. nv->arch = 10;
  60. break;
  61. case 0x0200:
  62. default:
  63. nv->arch = 20;
  64. break;
  65. }
  66. vgactlw("type", ctlr->name);
  67. if((m = segattach(0, "nvidiammio", 0, p->mem[0].size)) == -1)
  68. error("%s: segattach nvidiammio, size %d: %r\n",
  69. ctlr->name, p->mem[0].size);
  70. nv->pci = p;
  71. nv->mmio = m;
  72. mmio = (ulong*)m;
  73. nv->pfb = mmio+0x00100000/4;
  74. nv->pramdac = mmio+0x00680000/4;
  75. nv->pextdev = mmio+0x00101000/4;
  76. nv->pmc = mmio+0x00000000/4;
  77. nv->ptimer = mmio+0x00009000/4;
  78. nv->pfifo = mmio+0x00002000/4;
  79. nv->pramin = mmio+0x00710000/4;
  80. nv->pgraph = mmio+0x00400000/4;
  81. nv->fifo = mmio+0x00800000/4;
  82. }
  83. nv = vga->private;
  84. vga->p[1] = 4;
  85. vga->n[1] = 255;
  86. vga->f[1] = 350000000;
  87. /*
  88. * Unlock
  89. */
  90. vgaxo(Crtx, 0x1F, 0x57);
  91. if (nv->pextdev[0x00000000] & 0x00000040){
  92. nv->crystalfreq = RefFreq;
  93. vga->m[1] = 14;
  94. } else {
  95. nv->crystalfreq = 13500000;
  96. vga->m[1] = 13;
  97. }
  98. switch(nv->pci->did & 0x0ff0) {
  99. case 0x0170:
  100. case 0x0180:
  101. case 0x01F0:
  102. case 0x0250:
  103. case 0x0280:
  104. case 0x0300:
  105. case 0x0310:
  106. case 0x0320:
  107. case 0x0330:
  108. case 0x0340:
  109. if(nv->pextdev[0x00000000] & (1 << 22))
  110. nv->crystalfreq = 27000000;
  111. break;
  112. default:
  113. break;
  114. }
  115. if (nv->arch == 4) {
  116. tmp = nv->pfb[0x00000000];
  117. if (tmp & 0x0100) {
  118. vga->vmz = ((tmp >> 12) & 0x0F) * 1024 + 1024 * 2;
  119. } else {
  120. tmp &= 0x03;
  121. if (tmp)
  122. vga->vmz = (1024*1024*2) << tmp;
  123. else
  124. vga->vmz = 1024*1024*32;
  125. }
  126. }
  127. if (nv->arch == 10 || nv->arch == 20) {
  128. tmp = (nv->pfb[0x0000020C/4] >> 20) & 0xFF;
  129. if (tmp == 0)
  130. tmp = 16;
  131. vga->vmz = 1024*1024*tmp;
  132. }
  133. for(i=0; i<4; i++)
  134. nv->offset[i] = nv->pgraph[0x640/4+i];
  135. for(i=0; i<6; i++)
  136. nv->pitch[i] = nv->pgraph[0x670/4+i];
  137. for(i = 0x19; i < 0x100; i++)
  138. vga->crt[i] = vgaxi(Crtx, i);
  139. nv->cursor2 = nv->pramdac[0x00000300/4];
  140. nv->vpll = nv->pramdac[0x00000508/4];
  141. nv->pllsel = nv->pramdac[0x0000050C/4];
  142. nv->general = nv->pramdac[0x00000600/4];
  143. nv->scale = nv->pramdac[0x00000848/4];
  144. nv->config = nv->pfb[0x00000200/4];
  145. ctlr->flag |= Fsnarf;
  146. }
  147. static void
  148. options(Vga*, Ctlr* ctlr)
  149. {
  150. ctlr->flag |= Hlinear|Foptions;
  151. }
  152. static void
  153. clock(Vga* vga, Ctlr* ctlr)
  154. {
  155. int m, n, p, f, d;
  156. Nvidia *nv;
  157. double trouble;
  158. nv = vga->private;
  159. if(vga->f[0] == 0)
  160. vga->f[0] = vga->mode->frequency;
  161. vga->d[0] = vga->f[0]+1;
  162. for (p=0; p <= vga->p[1]; p++){
  163. f = vga->f[0] << p;
  164. if ((f >= 128000000) && (f <= vga->f[1])) {
  165. for (m=7; m <= vga->m[1]; m++){
  166. trouble = (double) nv->crystalfreq / (double) (m << p);
  167. n = (vga->f[0] / trouble)+0.5;
  168. f = n*trouble + 0.5;
  169. d = vga->f[0] - f;
  170. if (d < 0)
  171. d = -d;
  172. if (n & ~0xFF)
  173. d = vga->d[0] + 1;
  174. if (d <= vga->d[0]){
  175. vga->n[0] = n;
  176. vga->m[0] = m;
  177. vga->p[0] = p;
  178. vga->d[0] = d;
  179. }
  180. }
  181. }
  182. }
  183. if (vga->d[0] > vga->f[0])
  184. error("%s: vclk %lud out of range\n", ctlr->name, vga->f[0]);
  185. }
  186. static void
  187. init(Vga* vga, Ctlr* ctlr)
  188. {
  189. Mode *mode;
  190. Nvidia *nv;
  191. char *p, *val;
  192. int digital, i, tmp;
  193. int pixeldepth;
  194. mode = vga->mode;
  195. if(mode->z == 24)
  196. error("%s: 24-bit colour not supported, use 32-bit\n", ctlr->name);
  197. nv = vga->private;
  198. if(vga->linear && (ctlr->flag & Hlinear))
  199. ctlr->flag |= Ulinear;
  200. clock(vga, ctlr);
  201. if(val = dbattr(vga->mode->attr, "lcd")){
  202. if((nv->islcd = strtol(val, &p, 0)) == 0 && p == val)
  203. error("%s: invalid 'lcd' attr\n", ctlr->name);
  204. }
  205. if(digital = (vga->crt[0x28] & 0x80))
  206. nv->islcd = 1;
  207. for(i = 0; extcrts[i] >= 0; i++)
  208. vga->crt[extcrts[i]] = 0;
  209. vga->crt[0x30] = 0x00;
  210. vga->crt[0x31] = 0xFC;
  211. nv->cursor2 = 0;
  212. nv->vpll = (vga->p[0] << 16) | (vga->n[0] << 8) | vga->m[0];
  213. nv->pllsel = 0x10000700;
  214. if (mode->z == 16)
  215. nv->general = 0x00001100;
  216. else
  217. nv->general = 0x00000100;
  218. nv->scale &= 0xFFF000FF;
  219. if(nv->islcd){
  220. digital = 0x80;
  221. nv->scale |= 0x100;
  222. vga->crt[0x21] = 0xFA;
  223. vga->crt[0x53] = 0;
  224. vga->crt[0x54] = 0;
  225. }
  226. if(nv->arch == 4)
  227. nv->config = 0x00001114;
  228. else if(nv->arch == 10 || nv->arch == 20)
  229. nv->config = nv->pfb[0x200/4];
  230. pixeldepth = (mode->z +1)/8;
  231. tmp = pixeldepth * mode->x;
  232. for(i=0; i<nelem(nv->pitch); i++)
  233. nv->pitch[i] = tmp;
  234. for(i=0; i<nelem(nv->offset); i++)
  235. nv->offset[i] = 0;
  236. vga->attribute[0x10] &= ~0x40;
  237. vga->attribute[0x11] = Pblack;
  238. vga->crt[0x14] = 0x00;
  239. /* set vert blanking to cover full overscan */
  240. tmp = vga->crt[0x12];
  241. vga->crt[0x15] = tmp;
  242. if(tmp & 0x100)
  243. vga->crt[0x07] |= 0x08;
  244. else
  245. vga->crt[0x07] &= ~0x08;
  246. if(tmp & 0x200)
  247. vga->crt[0x09] |= 0x20;
  248. else
  249. vga->crt[0x09] &= ~0x20;
  250. vga->crt[0x16] = vga->crt[0x06] + 1;
  251. /* set horiz blanking to cover full overscan */
  252. vga->crt[0x02] = vga->crt[0x01];
  253. tmp = vga->crt[0x00] + 4;
  254. vga->crt[0x03] = 0x80 | (tmp & 0x1F);
  255. if (tmp & 0x20)
  256. vga->crt[0x05] |= 0x80;
  257. else
  258. vga->crt[0x05] &= ~0x80;
  259. if (tmp & 0x40)
  260. vga->crt[0x25] |= 0x10;
  261. /* overflow bits */
  262. vga->crt[0x1A] = 0x02;
  263. if (mode->x < 1280)
  264. vga->crt[0x1A] |= 0x04;
  265. tmp = pixeldepth;
  266. if (tmp > 3)
  267. tmp=3;
  268. vga->crt[0x28] = digital|tmp;
  269. vga->crt[0x19] = (vga->crt[0x13] & 0x0700) >> 3;
  270. if (vga->crt[0x06] & 0x400)
  271. vga->crt[0x25] |= 0x01;
  272. if (vga->crt[0x12] & 0x400)
  273. vga->crt[0x25] |= 0x02;
  274. if (vga->crt[0x10] & 0x400)
  275. vga->crt[0x25] |= 0x04;
  276. if (vga->crt[0x15] & 0x400)
  277. vga->crt[0x25] |= 0x08;
  278. if (vga->crt[0x13] & 0x800)
  279. vga->crt[0x25] |= 0x20;
  280. if (vga->crt[0x00] & 0x100)
  281. vga->crt[0x2D] |= 0x01;
  282. if(vga->crt[0x01] & 0x100)
  283. vga->crt[0x2D] |= 0x02;
  284. if(vga->crt[0x02] & 0x100)
  285. vga->crt[0x2D] |= 0x04;
  286. if(vga->crt[0x04] & 0x100)
  287. vga->crt[0x2D] |= 0x08;
  288. ctlr->flag |= Finit;
  289. }
  290. #define loadtable(p, tab) _loadtable(p, tab, nelem(tab))
  291. static void
  292. _loadtable(ulong *p, uint tab[][2], int ntab)
  293. {
  294. int i;
  295. for(i=0; i<ntab; i++)
  296. p[tab[i][0]] = tab[i][1];
  297. }
  298. static struct {
  299. ulong addr;
  300. ulong val;
  301. int rep;
  302. } gtab[] = {
  303. { 0x0F40, 0x10000000, 1 },
  304. { 0x0F44, 0x00000000, 1 },
  305. { 0x0F50, 0x00000040, 1 },
  306. { 0x0F54, 0x00000008, 1 },
  307. { 0x0F50, 0x00000200, 1 },
  308. { 0x0F54, 0x00000000, 3*16 },
  309. { 0x0F50, 0x00000040, 1 },
  310. { 0x0F54, 0x00000000, 1 },
  311. { 0x0F50, 0x00000800, 1 },
  312. { 0x0F54, 0x00000000, 16*16 },
  313. { 0x0F40, 0x30000000, 1 },
  314. { 0x0F44, 0x00000004, 1 },
  315. { 0x0F50, 0x00006400, 1 },
  316. { 0x0F54, 0x00000000, 59*4 },
  317. { 0x0F50, 0x00006800, 1 },
  318. { 0x0F54, 0x00000000, 47*4 },
  319. { 0x0F50, 0x00006C00, 1 },
  320. { 0x0F54, 0x00000000, 3*4 },
  321. { 0x0F50, 0x00007000, 1 },
  322. { 0x0F54, 0x00000000, 19*4 },
  323. { 0x0F50, 0x00007400, 1 },
  324. { 0x0F54, 0x00000000, 12*4 },
  325. { 0x0F50, 0x00007800, 1 },
  326. { 0x0F54, 0x00000000, 12*4 },
  327. { 0x0F50, 0x00004400, 1 },
  328. { 0x0F54, 0x00000000, 8*4 },
  329. { 0x0F50, 0x00000000, 1 },
  330. { 0x0F54, 0x00000000, 16 },
  331. { 0x0F50, 0x00000040, 1 },
  332. { 0x0F54, 0x00000000, 4 },
  333. };
  334. static void
  335. load(Vga* vga, Ctlr* ctlr)
  336. {
  337. Nvidia *nv;
  338. int i, j = 0;
  339. nv = vga->private;
  340. /*
  341. * Unlock
  342. */
  343. vgaxo(Crtx, 0x1F, 0x57);
  344. loadtable(nv->pmc, RivaTablePMC);
  345. loadtable(nv->ptimer, RivaTablePTIMER);
  346. switch (nv->arch){
  347. case 4:
  348. nv->pfb[0x00000200/4] = nv->config;
  349. loadtable(nv->pfifo, nv4TablePFIFO);
  350. loadtable(nv->pramin, nv4TablePRAMIN);
  351. loadtable(nv->pgraph, nv4TablePGRAPH);
  352. switch (vga->mode->z){
  353. case 32:
  354. loadtable(nv->pramin, nv4TablePRAMIN_32BPP);
  355. loadtable(nv->pgraph, nv4TablePGRAPH_32BPP);
  356. break;
  357. case 16:
  358. loadtable(nv->pramin, nv4TablePRAMIN_16BPP);
  359. loadtable(nv->pgraph, nv4TablePGRAPH_16BPP);
  360. break;
  361. case 8:
  362. loadtable(nv->pramin, nv4TablePRAMIN_8BPP);
  363. loadtable(nv->pgraph, nv4TablePGRAPH_8BPP);
  364. break;
  365. }
  366. break;
  367. case 10:
  368. case 20:
  369. loadtable(nv->pfifo, nv10TablePFIFO);
  370. loadtable(nv->pramin, nv10TablePRAMIN);
  371. loadtable(nv->pgraph, nv10TablePGRAPH);
  372. switch (vga->mode->z){
  373. case 32:
  374. loadtable(nv->pramin, nv10TablePRAMIN_32BPP);
  375. loadtable(nv->pgraph, nv10TablePGRAPH_32BPP);
  376. break;
  377. case 16:
  378. loadtable(nv->pramin, nv10TablePRAMIN_16BPP);
  379. loadtable(nv->pgraph, nv10TablePGRAPH_16BPP);
  380. break;
  381. case 8:
  382. loadtable(nv->pramin, nv10TablePRAMIN_8BPP);
  383. loadtable(nv->pgraph, nv10TablePGRAPH_8BPP);
  384. break;
  385. }
  386. break;
  387. }
  388. if(nv->arch == 4 || nv->arch == 10) {
  389. for(i=0; i<4; i++)
  390. nv->pgraph[0x640/4+i] = nv->offset[i];
  391. if(nv->arch == 10)
  392. j = 5;
  393. else if(nv->arch == 4)
  394. j = 4;
  395. for(i=0; i<j; i++)
  396. nv->pgraph[0x670/4+i] = nv->pitch[i];
  397. }
  398. if(nv->arch == 20) {
  399. for(i = 0; i < 4; i++)
  400. nv->pgraph[0x864/4+i] = 0x01ffffff;
  401. for(i = 0; i < 4; i++)
  402. nv->pgraph[0x820/4+i] = nv->offset[i];
  403. for(i = 0; i < 4; i++)
  404. nv->pgraph[0x850/4+i] = nv->pitch[i];
  405. nv->pgraph[0x9A4/4] = nv->pfb[0x200/4];
  406. nv->pgraph[0x9A8/4] = nv->pfb[0x204/4];
  407. }
  408. if(nv->arch == 10 || nv->arch == 20){
  409. nv->pramdac[0x00000404/4] |= (1 << 25);
  410. nv->pmc[0x8704/4] = 1;
  411. nv->pmc[0x8140/4] = 0;
  412. nv->pmc[0x8920/4] = 0;
  413. nv->pmc[0x8924/4] = 0;
  414. nv->pmc[0x8908/4] = 0x01FFFFFF;
  415. nv->pmc[0x890C/4] = 0x01FFFFFF;
  416. nv->pmc[0x1588/4] = 0;
  417. for(i=0; i<8; i++)
  418. nv->pfb[0x240/4+(i * 4)] = 0;
  419. for(i=0; i<0x7C/4; i++)
  420. nv->pgraph[0xB00/4+i] = nv->pfb[0x240/4+i];
  421. for(i=0; i<nelem(gtab); i++)
  422. for(j=0; j<gtab[i].rep; j++)
  423. nv->pgraph[gtab[i].addr/4] = gtab[i].val;
  424. }
  425. loadtable(nv->fifo, RivaTableFIFO);
  426. switch (nv->arch){
  427. case 4:
  428. loadtable(nv->fifo, nv4TableFIFO);
  429. break;
  430. case 10:
  431. case 20:
  432. loadtable(nv->fifo, nv10TableFIFO);
  433. break;
  434. }
  435. for(i = 0; extcrts[i] >= 0; i++)
  436. vgaxo(Crtx, extcrts[i], vga->crt[extcrts[i]]);
  437. nv->pramdac[0x00000300/4] = nv->cursor2;
  438. if(nv->islcd){
  439. nv->pramdac[0x00000848/4] = nv->scale;
  440. vgaxo(Crtx, 0x21, 0xFA);
  441. vgaxo(Crtx, 0x53, 0);
  442. vgaxo(Crtx, 0x54, 0);
  443. }
  444. else{
  445. nv->pramdac[0x00000508/4] = nv->vpll;
  446. nv->pramdac[0x0000050C/4] = nv->pllsel;
  447. }
  448. nv->pramdac[0x00000600/4] = nv->general;
  449. ctlr->flag |= Fload;
  450. }
  451. static void
  452. dump(Vga* vga, Ctlr* ctlr)
  453. {
  454. Nvidia *nv;
  455. int i, m, n, p, f;
  456. double trouble;
  457. if((nv = vga->private) == 0)
  458. return;
  459. printitem(ctlr->name, "Crt18");
  460. for(i = 0x18; i < 0x100; i++)
  461. printreg(vga->crt[i]);
  462. p = (nv->vpll >> 16);
  463. n = (nv->vpll >> 8) & 0xFF;
  464. m = nv->vpll & 0xFF;
  465. trouble = nv->crystalfreq;
  466. trouble = trouble * n / (m<<p);
  467. f = trouble+0.5;
  468. printitem(ctlr->name, "dclk m n p");
  469. Bprint(&stdout, " %d %d - %d %d\n", f, m, n, p);
  470. printitem(ctlr->name, "CrystalFreq");
  471. Bprint(&stdout, " %d Hz\n", nv->crystalfreq);
  472. printitem(ctlr->name, "cursor2");
  473. Bprint(&stdout, " %lux\n", nv->cursor2);
  474. printitem(ctlr->name, "vpll");
  475. Bprint(&stdout, " %lux\n", nv->vpll);
  476. printitem(ctlr->name, "pllsel");
  477. Bprint(&stdout, " %lux\n", nv->pllsel);
  478. printitem(ctlr->name, "general");
  479. Bprint(&stdout, " %lux\n", nv->general);
  480. printitem(ctlr->name, "scale");
  481. Bprint(&stdout, " %lux\n", nv->scale);
  482. printitem(ctlr->name, "config");
  483. Bprint(&stdout, " %lux\n", nv->config);
  484. printitem(ctlr->name, "islcd");
  485. Bprint(&stdout, " %d\n", nv->islcd);
  486. }
  487. Ctlr nvidia = {
  488. "nvidia", /* name */
  489. snarf, /* snarf */
  490. options, /* options */
  491. init, /* init */
  492. load, /* load */
  493. dump, /* dump */
  494. };
  495. Ctlr nvidiahwgc = {
  496. "nvidiahwgc", /* name */
  497. 0, /* snarf */
  498. 0, /* options */
  499. 0, /* init */
  500. 0, /* load */
  501. 0, /* dump */
  502. };