ethermii.h 4.0 KB

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  1. typedef struct Mii Mii;
  2. typedef struct MiiPhy MiiPhy;
  3. enum { /* registers */
  4. Bmcr = 0, /* Basic Mode Control */
  5. Bmsr = 1, /* Basic Mode Status */
  6. Phyidr1 = 2, /* PHY Identifier #1 */
  7. Phyidr2 = 3, /* PHY Identifier #2 */
  8. Anar = 4, /* Auto-Negotiation Advertisement */
  9. Anlpar = 5, /* AN Link Partner Ability */
  10. Aner = 6, /* AN Expansion */
  11. Annptr = 7, /* AN Next Page TX */
  12. Annprr = 8, /* AN Next Page RX */
  13. Mscr = 9, /* Gb Control */
  14. Mssr = 10, /* Gb Status */
  15. Esr = 15, /* Extended Status */
  16. /* 88e1116-specific paged registers */
  17. Scr = 16, /* special control register */
  18. Ssr = 17, /* special status register */
  19. Ier = 18, /* interrupt enable reg */
  20. Isr = 19, /* interrupt status reg */
  21. Escr = 20, /* extended special control reg */
  22. Recr = 21, /* RX error counter reg */
  23. Eadr = 22, /* extended address reg (page select) */
  24. Globsts = 23, /* global status */
  25. Impover = 24, /* RGMII output impedance override (page 2) */
  26. Imptarg = 25, /* RGMII output impedance target (page 2) */
  27. Scr2 = 26, /* special control register 2 */
  28. NMiiPhyr = 32,
  29. NMiiPhy = 32,
  30. };
  31. enum { /* Bmcr */
  32. BmcrSs1 = 0x0040, /* Speed Select[1] */
  33. BmcrCte = 0x0080, /* Collision Test Enable */
  34. BmcrDm = 0x0100, /* Duplex Mode */
  35. BmcrRan = 0x0200, /* Restart Auto-Negotiation */
  36. BmcrI = 0x0400, /* Isolate */
  37. BmcrPd = 0x0800, /* Power Down */
  38. BmcrAne = 0x1000, /* Auto-Negotiation Enable */
  39. BmcrSs0 = 0x2000, /* Speed Select[0] */
  40. BmcrLe = 0x4000, /* Loopback Enable */
  41. BmcrR = 0x8000, /* Reset */
  42. };
  43. enum { /* Bmsr */
  44. BmsrEc = 0x0001, /* Extended Capability */
  45. BmsrJd = 0x0002, /* Jabber Detect */
  46. BmsrLs = 0x0004, /* Link Status */
  47. BmsrAna = 0x0008, /* Auto-Negotiation Ability */
  48. BmsrRf = 0x0010, /* Remote Fault */
  49. BmsrAnc = 0x0020, /* Auto-Negotiation Complete */
  50. BmsrPs = 0x0040, /* Preamble Suppression Capable */
  51. BmsrEs = 0x0100, /* Extended Status */
  52. Bmsr100T2HD = 0x0200, /* 100BASE-T2 HD Capable */
  53. Bmsr100T2FD = 0x0400, /* 100BASE-T2 FD Capable */
  54. Bmsr10THD = 0x0800, /* 10BASE-T HD Capable */
  55. Bmsr10TFD = 0x1000, /* 10BASE-T FD Capable */
  56. Bmsr100TXHD = 0x2000, /* 100BASE-TX HD Capable */
  57. Bmsr100TXFD = 0x4000, /* 100BASE-TX FD Capable */
  58. Bmsr100T4 = 0x8000, /* 100BASE-T4 Capable */
  59. };
  60. enum { /* Anar/Anlpar */
  61. Ana10HD = 0x0020, /* Advertise 10BASE-T */
  62. Ana10FD = 0x0040, /* Advertise 10BASE-T FD */
  63. AnaTXHD = 0x0080, /* Advertise 100BASE-TX */
  64. AnaTXFD = 0x0100, /* Advertise 100BASE-TX FD */
  65. AnaT4 = 0x0200, /* Advertise 100BASE-T4 */
  66. AnaP = 0x0400, /* Pause */
  67. AnaAP = 0x0800, /* Asymmetrical Pause */
  68. AnaRf = 0x2000, /* Remote Fault */
  69. AnaAck = 0x4000, /* Acknowledge */
  70. AnaNp = 0x8000, /* Next Page Indication */
  71. };
  72. enum { /* Mscr */
  73. Mscr1000THD = 0x0100, /* Advertise 1000BASE-T HD */
  74. Mscr1000TFD = 0x0200, /* Advertise 1000BASE-T FD */
  75. };
  76. enum { /* Mssr */
  77. Mssr1000THD = 0x0400, /* Link Partner 1000BASE-T HD able */
  78. Mssr1000TFD = 0x0800, /* Link Partner 1000BASE-T FD able */
  79. };
  80. enum { /* Esr */
  81. Esr1000THD = 0x1000, /* 1000BASE-T HD Capable */
  82. Esr1000TFD = 0x2000, /* 1000BASE-T FD Capable */
  83. Esr1000XHD = 0x4000, /* 1000BASE-X HD Capable */
  84. Esr1000XFD = 0x8000, /* 1000BASE-X FD Capable */
  85. };
  86. enum { /* Scr page 0 */
  87. Pwrdown = 0x0004, /* power down */
  88. Mdix = 0x0060, /* MDI crossover mode */
  89. Endetect = 0x0300, /* energy detect */
  90. };
  91. enum { /* Scr page 2 */
  92. Rgmiipwrup = 0x0008, /* RGMII power up: must sw reset after */
  93. };
  94. enum { /* Recr page 2 */
  95. Txtiming = 1<<4,
  96. Rxtiming = 1<<5,
  97. };
  98. typedef struct Mii {
  99. Lock;
  100. int nphy;
  101. int mask;
  102. MiiPhy* phy[NMiiPhy];
  103. MiiPhy* curphy;
  104. void* ctlr;
  105. int (*mir)(Mii*, int, int);
  106. int (*miw)(Mii*, int, int, int);
  107. } Mii;
  108. typedef struct MiiPhy {
  109. Mii* mii;
  110. int oui;
  111. int phyno;
  112. int anar;
  113. int fc;
  114. int mscr;
  115. int link;
  116. int speed;
  117. int fd;
  118. int rfc;
  119. int tfc;
  120. };
  121. extern int mii(Mii*, int);
  122. extern int miiane(Mii*, int, int, int);
  123. extern int miimir(Mii*, int);
  124. extern int miimiw(Mii*, int, int);
  125. extern int miireset(Mii*);
  126. extern int miistatus(Mii*);