encoding.h 46 KB

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  1. /*
  2. * Copyright (c) 2016, The Regents of the University of California (Regents).
  3. * All Rights Reserved.
  4. *
  5. * Redistribution and use in source and binary forms, with or without
  6. * modification, are permitted provided that the following conditions are met:
  7. * 1. Redistributions of source code must retain the above copyright
  8. * notice, this list of conditions and the following disclaimer.
  9. * 2. Redistributions in binary form must reproduce the above copyright
  10. * notice, this list of conditions and the following disclaimer in the
  11. * documentation and/or other materials provided with the distribution.
  12. * 3. Neither the name of the Regents nor the
  13. * names of its contributors may be used to endorse or promote products
  14. * derived from this software without specific prior written permission.
  15. *
  16. * IN NO EVENT SHALL REGENTS BE LIABLE TO ANY PARTY FOR DIRECT, INDIRECT,
  17. * SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, INCLUDING LOST PROFITS, ARISING
  18. * OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF REGENTS HAS
  19. * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  20. *
  21. * REGENTS SPECIFICALLY DISCLAIMS ANY WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
  22. * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
  23. * PURPOSE. THE SOFTWARE AND ACCOMPANYING DOCUMENTATION, IF ANY, PROVIDED
  24. * HEREUNDER IS PROVIDED "AS IS". REGENTS HAS NO OBLIGATION TO PROVIDE
  25. * MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS.
  26. */
  27. #define MSTATUS_UIE 0x00000001
  28. #define MSTATUS_SIE 0x00000002
  29. #define MSTATUS_HIE 0x00000004
  30. #define MSTATUS_MIE 0x00000008
  31. #define MSTATUS_UPIE 0x00000010
  32. #define MSTATUS_SPIE 0x00000020
  33. #define MSTATUS_HPIE 0x00000040
  34. #define MSTATUS_MPIE 0x00000080
  35. #define MSTATUS_SPP 0x00000100
  36. #define MSTATUS_HPP 0x00000600
  37. #define MSTATUS_MPP 0x00001800
  38. #define MSTATUS_FS 0x00006000
  39. #define MSTATUS_XS 0x00018000
  40. #define MSTATUS_MPRV 0x00020000
  41. #define MSTATUS_PUM 0x00040000
  42. #define MSTATUS_MXR 0x00080000
  43. #define MSTATUS_VM 0x1F000000
  44. #define MSTATUS32_SD 0x80000000
  45. #define MSTATUS64_SD 0x8000000000000000
  46. #define SSTATUS_UIE 0x00000001
  47. #define SSTATUS_SIE 0x00000002
  48. #define SSTATUS_UPIE 0x00000010
  49. #define SSTATUS_SPIE 0x00000020
  50. #define SSTATUS_SPP 0x00000100
  51. #define SSTATUS_FS 0x00006000
  52. #define SSTATUS_XS 0x00018000
  53. #define SSTATUS_PUM 0x00040000
  54. #define SSTATUS32_SD 0x80000000
  55. #define SSTATUS64_SD 0x8000000000000000
  56. #define DCSR_XDEBUGVER (3U<<30)
  57. #define DCSR_NDRESET (1<<29)
  58. #define DCSR_FULLRESET (1<<28)
  59. #define DCSR_EBREAKM (1<<15)
  60. #define DCSR_EBREAKH (1<<14)
  61. #define DCSR_EBREAKS (1<<13)
  62. #define DCSR_EBREAKU (1<<12)
  63. #define DCSR_STOPCYCLE (1<<10)
  64. #define DCSR_STOPTIME (1<<9)
  65. #define DCSR_CAUSE (7<<6)
  66. #define DCSR_DEBUGINT (1<<5)
  67. #define DCSR_HALT (1<<3)
  68. #define DCSR_STEP (1<<2)
  69. #define DCSR_PRV (3<<0)
  70. #define DCSR_CAUSE_NONE 0
  71. #define DCSR_CAUSE_SWBP 1
  72. #define DCSR_CAUSE_HWBP 2
  73. #define DCSR_CAUSE_DEBUGINT 3
  74. #define DCSR_CAUSE_STEP 4
  75. #define DCSR_CAUSE_HALT 5
  76. #define MCONTROL_TYPE(xlen) (0xfULL<<((xlen)-4))
  77. #define MCONTROL_DMODE(xlen) (1ULL<<((xlen)-5))
  78. #define MCONTROL_MASKMAX(xlen) (0x3fULL<<((xlen)-11))
  79. #define MCONTROL_SELECT (1<<19)
  80. #define MCONTROL_TIMING (1<<18)
  81. #define MCONTROL_ACTION (0x3f<<12)
  82. #define MCONTROL_CHAIN (1<<11)
  83. #define MCONTROL_MATCH (0xf<<7)
  84. #define MCONTROL_M (1<<6)
  85. #define MCONTROL_H (1<<5)
  86. #define MCONTROL_S (1<<4)
  87. #define MCONTROL_U (1<<3)
  88. #define MCONTROL_EXECUTE (1<<2)
  89. #define MCONTROL_STORE (1<<1)
  90. #define MCONTROL_LOAD (1<<0)
  91. #define MCONTROL_TYPE_NONE 0
  92. #define MCONTROL_TYPE_MATCH 2
  93. #define MCONTROL_ACTION_DEBUG_EXCEPTION 0
  94. #define MCONTROL_ACTION_DEBUG_MODE 1
  95. #define MCONTROL_ACTION_TRACE_START 2
  96. #define MCONTROL_ACTION_TRACE_STOP 3
  97. #define MCONTROL_ACTION_TRACE_EMIT 4
  98. #define MCONTROL_MATCH_EQUAL 0
  99. #define MCONTROL_MATCH_NAPOT 1
  100. #define MCONTROL_MATCH_GE 2
  101. #define MCONTROL_MATCH_LT 3
  102. #define MCONTROL_MATCH_MASK_LOW 4
  103. #define MCONTROL_MATCH_MASK_HIGH 5
  104. #define MIP_SSIP (1 << IRQ_S_SOFT)
  105. #define MIP_HSIP (1 << IRQ_H_SOFT)
  106. #define MIP_MSIP (1 << IRQ_M_SOFT)
  107. #define MIP_STIP (1 << IRQ_S_TIMER)
  108. #define MIP_HTIP (1 << IRQ_H_TIMER)
  109. #define MIP_MTIP (1 << IRQ_M_TIMER)
  110. #define MIP_SEIP (1 << IRQ_S_EXT)
  111. #define MIP_HEIP (1 << IRQ_H_EXT)
  112. #define MIP_MEIP (1 << IRQ_M_EXT)
  113. #define SIP_SSIP MIP_SSIP
  114. #define SIP_STIP MIP_STIP
  115. #define PRV_U 0
  116. #define PRV_S 1
  117. #define PRV_H 2
  118. #define PRV_M 3
  119. #define VM_MBARE 0
  120. #define VM_MBB 1
  121. #define VM_MBBID 2
  122. #define VM_SV32 8
  123. #define VM_SV39 9
  124. #define VM_SV48 10
  125. #define IRQ_S_SOFT 1
  126. #define IRQ_H_SOFT 2
  127. #define IRQ_M_SOFT 3
  128. #define IRQ_S_TIMER 5
  129. #define IRQ_H_TIMER 6
  130. #define IRQ_M_TIMER 7
  131. #define IRQ_S_EXT 9
  132. #define IRQ_H_EXT 10
  133. #define IRQ_M_EXT 11
  134. #define IRQ_COP 12
  135. #define IRQ_HOST 13
  136. #define DEFAULT_RSTVEC 0x00001000
  137. #define DEFAULT_NMIVEC 0x00001004
  138. #define DEFAULT_MTVEC 0x00001010
  139. #define CONFIG_STRING_ADDR 0x0000100C
  140. #define EXT_IO_BASE 0x40000000
  141. #define DRAM_BASE 0x80000000
  142. // page table entry (PTE) fields
  143. #define PTE_V 0x001 // Valid
  144. #define PTE_R 0x002 // Read
  145. #define PTE_W 0x004 // Write
  146. #define PTE_X 0x008 // Execute
  147. #define PTE_U 0x010 // User
  148. #define PTE_G 0x020 // Global
  149. #define PTE_A 0x040 // Accessed
  150. #define PTE_D 0x080 // Dirty
  151. #define PTE_SOFT 0x300 // Reserved for Software
  152. #define PTE_PPN_SHIFT 10
  153. #define PTE_TABLE(PTE) (((PTE) & (PTE_V | PTE_R | PTE_W | PTE_X)) == PTE_V)
  154. #ifdef __riscv
  155. #ifdef __riscv64
  156. # define MSTATUS_SD MSTATUS64_SD
  157. # define SSTATUS_SD SSTATUS64_SD
  158. # define RISCV_PGLEVEL_BITS 9
  159. #else
  160. # define MSTATUS_SD MSTATUS32_SD
  161. # define SSTATUS_SD SSTATUS32_SD
  162. # define RISCV_PGLEVEL_BITS 10
  163. #endif
  164. #define RISCV_PGSHIFT 12
  165. #define RISCV_PGSIZE (1 << RISCV_PGSHIFT)
  166. #ifndef __ASSEMBLER__
  167. #ifdef __GNUC__
  168. #define read_csr(reg) ({ unsigned long __tmp; \
  169. asm volatile ("csrr %0, " #reg : "=r"(__tmp)); \
  170. __tmp; })
  171. #define write_csr(reg, val) ({ \
  172. if (__builtin_constant_p(val) && (unsigned long)(val) < 32) \
  173. asm volatile ("csrw " #reg ", %0" :: "i"(val)); \
  174. else \
  175. asm volatile ("csrw " #reg ", %0" :: "r"(val)); })
  176. #define swap_csr(reg, val) ({ unsigned long __tmp; \
  177. if (__builtin_constant_p(val) && (unsigned long)(val) < 32) \
  178. asm volatile ("csrrw %0, " #reg ", %1" : "=r"(__tmp) : "i"(val)); \
  179. else \
  180. asm volatile ("csrrw %0, " #reg ", %1" : "=r"(__tmp) : "r"(val)); \
  181. __tmp; })
  182. #define set_csr(reg, bit) ({ unsigned long __tmp; \
  183. if (__builtin_constant_p(bit) && (unsigned long)(bit) < 32) \
  184. asm volatile ("csrrs %0, " #reg ", %1" : "=r"(__tmp) : "i"(bit)); \
  185. else \
  186. asm volatile ("csrrs %0, " #reg ", %1" : "=r"(__tmp) : "r"(bit)); \
  187. __tmp; })
  188. #define clear_csr(reg, bit) ({ unsigned long __tmp; \
  189. if (__builtin_constant_p(bit) && (unsigned long)(bit) < 32) \
  190. asm volatile ("csrrc %0, " #reg ", %1" : "=r"(__tmp) : "i"(bit)); \
  191. else \
  192. asm volatile ("csrrc %0, " #reg ", %1" : "=r"(__tmp) : "r"(bit)); \
  193. __tmp; })
  194. #define rdtime() read_csr(time)
  195. #define rdcycle() read_csr(cycle)
  196. #define rdinstret() read_csr(instret)
  197. #endif
  198. #endif
  199. #endif
  200. /* Automatically generated by parse-opcodes */
  201. #ifndef RISCV_ENCODING_H
  202. #define RISCV_ENCODING_H
  203. #define MATCH_BEQ 0x63
  204. #define MASK_BEQ 0x707f
  205. #define MATCH_BNE 0x1063
  206. #define MASK_BNE 0x707f
  207. #define MATCH_BLT 0x4063
  208. #define MASK_BLT 0x707f
  209. #define MATCH_BGE 0x5063
  210. #define MASK_BGE 0x707f
  211. #define MATCH_BLTU 0x6063
  212. #define MASK_BLTU 0x707f
  213. #define MATCH_BGEU 0x7063
  214. #define MASK_BGEU 0x707f
  215. #define MATCH_JALR 0x67
  216. #define MASK_JALR 0x707f
  217. #define MATCH_JAL 0x6f
  218. #define MASK_JAL 0x7f
  219. #define MATCH_LUI 0x37
  220. #define MASK_LUI 0x7f
  221. #define MATCH_AUIPC 0x17
  222. #define MASK_AUIPC 0x7f
  223. #define MATCH_ADDI 0x13
  224. #define MASK_ADDI 0x707f
  225. #define MATCH_SLLI 0x1013
  226. #define MASK_SLLI 0xfc00707f
  227. #define MATCH_SLTI 0x2013
  228. #define MASK_SLTI 0x707f
  229. #define MATCH_SLTIU 0x3013
  230. #define MASK_SLTIU 0x707f
  231. #define MATCH_XORI 0x4013
  232. #define MASK_XORI 0x707f
  233. #define MATCH_SRLI 0x5013
  234. #define MASK_SRLI 0xfc00707f
  235. #define MATCH_SRAI 0x40005013
  236. #define MASK_SRAI 0xfc00707f
  237. #define MATCH_ORI 0x6013
  238. #define MASK_ORI 0x707f
  239. #define MATCH_ANDI 0x7013
  240. #define MASK_ANDI 0x707f
  241. #define MATCH_ADD 0x33
  242. #define MASK_ADD 0xfe00707f
  243. #define MATCH_SUB 0x40000033
  244. #define MASK_SUB 0xfe00707f
  245. #define MATCH_SLL 0x1033
  246. #define MASK_SLL 0xfe00707f
  247. #define MATCH_SLT 0x2033
  248. #define MASK_SLT 0xfe00707f
  249. #define MATCH_SLTU 0x3033
  250. #define MASK_SLTU 0xfe00707f
  251. #define MATCH_XOR 0x4033
  252. #define MASK_XOR 0xfe00707f
  253. #define MATCH_SRL 0x5033
  254. #define MASK_SRL 0xfe00707f
  255. #define MATCH_SRA 0x40005033
  256. #define MASK_SRA 0xfe00707f
  257. #define MATCH_OR 0x6033
  258. #define MASK_OR 0xfe00707f
  259. #define MATCH_AND 0x7033
  260. #define MASK_AND 0xfe00707f
  261. #define MATCH_ADDIW 0x1b
  262. #define MASK_ADDIW 0x707f
  263. #define MATCH_SLLIW 0x101b
  264. #define MASK_SLLIW 0xfe00707f
  265. #define MATCH_SRLIW 0x501b
  266. #define MASK_SRLIW 0xfe00707f
  267. #define MATCH_SRAIW 0x4000501b
  268. #define MASK_SRAIW 0xfe00707f
  269. #define MATCH_ADDW 0x3b
  270. #define MASK_ADDW 0xfe00707f
  271. #define MATCH_SUBW 0x4000003b
  272. #define MASK_SUBW 0xfe00707f
  273. #define MATCH_SLLW 0x103b
  274. #define MASK_SLLW 0xfe00707f
  275. #define MATCH_SRLW 0x503b
  276. #define MASK_SRLW 0xfe00707f
  277. #define MATCH_SRAW 0x4000503b
  278. #define MASK_SRAW 0xfe00707f
  279. #define MATCH_LB 0x3
  280. #define MASK_LB 0x707f
  281. #define MATCH_LH 0x1003
  282. #define MASK_LH 0x707f
  283. #define MATCH_LW 0x2003
  284. #define MASK_LW 0x707f
  285. #define MATCH_LD 0x3003
  286. #define MASK_LD 0x707f
  287. #define MATCH_LBU 0x4003
  288. #define MASK_LBU 0x707f
  289. #define MATCH_LHU 0x5003
  290. #define MASK_LHU 0x707f
  291. #define MATCH_LWU 0x6003
  292. #define MASK_LWU 0x707f
  293. #define MATCH_SB 0x23
  294. #define MASK_SB 0x707f
  295. #define MATCH_SH 0x1023
  296. #define MASK_SH 0x707f
  297. #define MATCH_SW 0x2023
  298. #define MASK_SW 0x707f
  299. #define MATCH_SD 0x3023
  300. #define MASK_SD 0x707f
  301. #define MATCH_FENCE 0xf
  302. #define MASK_FENCE 0x707f
  303. #define MATCH_FENCE_I 0x100f
  304. #define MASK_FENCE_I 0x707f
  305. #define MATCH_MUL 0x2000033
  306. #define MASK_MUL 0xfe00707f
  307. #define MATCH_MULH 0x2001033
  308. #define MASK_MULH 0xfe00707f
  309. #define MATCH_MULHSU 0x2002033
  310. #define MASK_MULHSU 0xfe00707f
  311. #define MATCH_MULHU 0x2003033
  312. #define MASK_MULHU 0xfe00707f
  313. #define MATCH_DIV 0x2004033
  314. #define MASK_DIV 0xfe00707f
  315. #define MATCH_DIVU 0x2005033
  316. #define MASK_DIVU 0xfe00707f
  317. #define MATCH_REM 0x2006033
  318. #define MASK_REM 0xfe00707f
  319. #define MATCH_REMU 0x2007033
  320. #define MASK_REMU 0xfe00707f
  321. #define MATCH_MULW 0x200003b
  322. #define MASK_MULW 0xfe00707f
  323. #define MATCH_DIVW 0x200403b
  324. #define MASK_DIVW 0xfe00707f
  325. #define MATCH_DIVUW 0x200503b
  326. #define MASK_DIVUW 0xfe00707f
  327. #define MATCH_REMW 0x200603b
  328. #define MASK_REMW 0xfe00707f
  329. #define MATCH_REMUW 0x200703b
  330. #define MASK_REMUW 0xfe00707f
  331. #define MATCH_AMOADD_W 0x202f
  332. #define MASK_AMOADD_W 0xf800707f
  333. #define MATCH_AMOXOR_W 0x2000202f
  334. #define MASK_AMOXOR_W 0xf800707f
  335. #define MATCH_AMOOR_W 0x4000202f
  336. #define MASK_AMOOR_W 0xf800707f
  337. #define MATCH_AMOAND_W 0x6000202f
  338. #define MASK_AMOAND_W 0xf800707f
  339. #define MATCH_AMOMIN_W 0x8000202f
  340. #define MASK_AMOMIN_W 0xf800707f
  341. #define MATCH_AMOMAX_W 0xa000202f
  342. #define MASK_AMOMAX_W 0xf800707f
  343. #define MATCH_AMOMINU_W 0xc000202f
  344. #define MASK_AMOMINU_W 0xf800707f
  345. #define MATCH_AMOMAXU_W 0xe000202f
  346. #define MASK_AMOMAXU_W 0xf800707f
  347. #define MATCH_AMOSWAP_W 0x800202f
  348. #define MASK_AMOSWAP_W 0xf800707f
  349. #define MATCH_LR_W 0x1000202f
  350. #define MASK_LR_W 0xf9f0707f
  351. #define MATCH_SC_W 0x1800202f
  352. #define MASK_SC_W 0xf800707f
  353. #define MATCH_AMOADD_D 0x302f
  354. #define MASK_AMOADD_D 0xf800707f
  355. #define MATCH_AMOXOR_D 0x2000302f
  356. #define MASK_AMOXOR_D 0xf800707f
  357. #define MATCH_AMOOR_D 0x4000302f
  358. #define MASK_AMOOR_D 0xf800707f
  359. #define MATCH_AMOAND_D 0x6000302f
  360. #define MASK_AMOAND_D 0xf800707f
  361. #define MATCH_AMOMIN_D 0x8000302f
  362. #define MASK_AMOMIN_D 0xf800707f
  363. #define MATCH_AMOMAX_D 0xa000302f
  364. #define MASK_AMOMAX_D 0xf800707f
  365. #define MATCH_AMOMINU_D 0xc000302f
  366. #define MASK_AMOMINU_D 0xf800707f
  367. #define MATCH_AMOMAXU_D 0xe000302f
  368. #define MASK_AMOMAXU_D 0xf800707f
  369. #define MATCH_AMOSWAP_D 0x800302f
  370. #define MASK_AMOSWAP_D 0xf800707f
  371. #define MATCH_LR_D 0x1000302f
  372. #define MASK_LR_D 0xf9f0707f
  373. #define MATCH_SC_D 0x1800302f
  374. #define MASK_SC_D 0xf800707f
  375. #define MATCH_ECALL 0x73
  376. #define MASK_ECALL 0xffffffff
  377. #define MATCH_EBREAK 0x100073
  378. #define MASK_EBREAK 0xffffffff
  379. #define MATCH_URET 0x200073
  380. #define MASK_URET 0xffffffff
  381. #define MATCH_SRET 0x10200073
  382. #define MASK_SRET 0xffffffff
  383. #define MATCH_HRET 0x20200073
  384. #define MASK_HRET 0xffffffff
  385. #define MATCH_MRET 0x30200073
  386. #define MASK_MRET 0xffffffff
  387. #define MATCH_DRET 0x7b200073
  388. #define MASK_DRET 0xffffffff
  389. #define MATCH_SFENCE_VM 0x10400073
  390. #define MASK_SFENCE_VM 0xfff07fff
  391. #define MATCH_WFI 0x10500073
  392. #define MASK_WFI 0xffffffff
  393. #define MATCH_CSRRW 0x1073
  394. #define MASK_CSRRW 0x707f
  395. #define MATCH_CSRRS 0x2073
  396. #define MASK_CSRRS 0x707f
  397. #define MATCH_CSRRC 0x3073
  398. #define MASK_CSRRC 0x707f
  399. #define MATCH_CSRRWI 0x5073
  400. #define MASK_CSRRWI 0x707f
  401. #define MATCH_CSRRSI 0x6073
  402. #define MASK_CSRRSI 0x707f
  403. #define MATCH_CSRRCI 0x7073
  404. #define MASK_CSRRCI 0x707f
  405. #define MATCH_FADD_S 0x53
  406. #define MASK_FADD_S 0xfe00007f
  407. #define MATCH_FSUB_S 0x8000053
  408. #define MASK_FSUB_S 0xfe00007f
  409. #define MATCH_FMUL_S 0x10000053
  410. #define MASK_FMUL_S 0xfe00007f
  411. #define MATCH_FDIV_S 0x18000053
  412. #define MASK_FDIV_S 0xfe00007f
  413. #define MATCH_FSGNJ_S 0x20000053
  414. #define MASK_FSGNJ_S 0xfe00707f
  415. #define MATCH_FSGNJN_S 0x20001053
  416. #define MASK_FSGNJN_S 0xfe00707f
  417. #define MATCH_FSGNJX_S 0x20002053
  418. #define MASK_FSGNJX_S 0xfe00707f
  419. #define MATCH_FMIN_S 0x28000053
  420. #define MASK_FMIN_S 0xfe00707f
  421. #define MATCH_FMAX_S 0x28001053
  422. #define MASK_FMAX_S 0xfe00707f
  423. #define MATCH_FSQRT_S 0x58000053
  424. #define MASK_FSQRT_S 0xfff0007f
  425. #define MATCH_FADD_D 0x2000053
  426. #define MASK_FADD_D 0xfe00007f
  427. #define MATCH_FSUB_D 0xa000053
  428. #define MASK_FSUB_D 0xfe00007f
  429. #define MATCH_FMUL_D 0x12000053
  430. #define MASK_FMUL_D 0xfe00007f
  431. #define MATCH_FDIV_D 0x1a000053
  432. #define MASK_FDIV_D 0xfe00007f
  433. #define MATCH_FSGNJ_D 0x22000053
  434. #define MASK_FSGNJ_D 0xfe00707f
  435. #define MATCH_FSGNJN_D 0x22001053
  436. #define MASK_FSGNJN_D 0xfe00707f
  437. #define MATCH_FSGNJX_D 0x22002053
  438. #define MASK_FSGNJX_D 0xfe00707f
  439. #define MATCH_FMIN_D 0x2a000053
  440. #define MASK_FMIN_D 0xfe00707f
  441. #define MATCH_FMAX_D 0x2a001053
  442. #define MASK_FMAX_D 0xfe00707f
  443. #define MATCH_FCVT_S_D 0x40100053
  444. #define MASK_FCVT_S_D 0xfff0007f
  445. #define MATCH_FCVT_D_S 0x42000053
  446. #define MASK_FCVT_D_S 0xfff0007f
  447. #define MATCH_FSQRT_D 0x5a000053
  448. #define MASK_FSQRT_D 0xfff0007f
  449. #define MATCH_FLE_S 0xa0000053
  450. #define MASK_FLE_S 0xfe00707f
  451. #define MATCH_FLT_S 0xa0001053
  452. #define MASK_FLT_S 0xfe00707f
  453. #define MATCH_FEQ_S 0xa0002053
  454. #define MASK_FEQ_S 0xfe00707f
  455. #define MATCH_FLE_D 0xa2000053
  456. #define MASK_FLE_D 0xfe00707f
  457. #define MATCH_FLT_D 0xa2001053
  458. #define MASK_FLT_D 0xfe00707f
  459. #define MATCH_FEQ_D 0xa2002053
  460. #define MASK_FEQ_D 0xfe00707f
  461. #define MATCH_FCVT_W_S 0xc0000053
  462. #define MASK_FCVT_W_S 0xfff0007f
  463. #define MATCH_FCVT_WU_S 0xc0100053
  464. #define MASK_FCVT_WU_S 0xfff0007f
  465. #define MATCH_FCVT_L_S 0xc0200053
  466. #define MASK_FCVT_L_S 0xfff0007f
  467. #define MATCH_FCVT_LU_S 0xc0300053
  468. #define MASK_FCVT_LU_S 0xfff0007f
  469. #define MATCH_FMV_X_S 0xe0000053
  470. #define MASK_FMV_X_S 0xfff0707f
  471. #define MATCH_FCLASS_S 0xe0001053
  472. #define MASK_FCLASS_S 0xfff0707f
  473. #define MATCH_FCVT_W_D 0xc2000053
  474. #define MASK_FCVT_W_D 0xfff0007f
  475. #define MATCH_FCVT_WU_D 0xc2100053
  476. #define MASK_FCVT_WU_D 0xfff0007f
  477. #define MATCH_FCVT_L_D 0xc2200053
  478. #define MASK_FCVT_L_D 0xfff0007f
  479. #define MATCH_FCVT_LU_D 0xc2300053
  480. #define MASK_FCVT_LU_D 0xfff0007f
  481. #define MATCH_FMV_X_D 0xe2000053
  482. #define MASK_FMV_X_D 0xfff0707f
  483. #define MATCH_FCLASS_D 0xe2001053
  484. #define MASK_FCLASS_D 0xfff0707f
  485. #define MATCH_FCVT_S_W 0xd0000053
  486. #define MASK_FCVT_S_W 0xfff0007f
  487. #define MATCH_FCVT_S_WU 0xd0100053
  488. #define MASK_FCVT_S_WU 0xfff0007f
  489. #define MATCH_FCVT_S_L 0xd0200053
  490. #define MASK_FCVT_S_L 0xfff0007f
  491. #define MATCH_FCVT_S_LU 0xd0300053
  492. #define MASK_FCVT_S_LU 0xfff0007f
  493. #define MATCH_FMV_S_X 0xf0000053
  494. #define MASK_FMV_S_X 0xfff0707f
  495. #define MATCH_FCVT_D_W 0xd2000053
  496. #define MASK_FCVT_D_W 0xfff0007f
  497. #define MATCH_FCVT_D_WU 0xd2100053
  498. #define MASK_FCVT_D_WU 0xfff0007f
  499. #define MATCH_FCVT_D_L 0xd2200053
  500. #define MASK_FCVT_D_L 0xfff0007f
  501. #define MATCH_FCVT_D_LU 0xd2300053
  502. #define MASK_FCVT_D_LU 0xfff0007f
  503. #define MATCH_FMV_D_X 0xf2000053
  504. #define MASK_FMV_D_X 0xfff0707f
  505. #define MATCH_FLW 0x2007
  506. #define MASK_FLW 0x707f
  507. #define MATCH_FLD 0x3007
  508. #define MASK_FLD 0x707f
  509. #define MATCH_FSW 0x2027
  510. #define MASK_FSW 0x707f
  511. #define MATCH_FSD 0x3027
  512. #define MASK_FSD 0x707f
  513. #define MATCH_FMADD_S 0x43
  514. #define MASK_FMADD_S 0x600007f
  515. #define MATCH_FMSUB_S 0x47
  516. #define MASK_FMSUB_S 0x600007f
  517. #define MATCH_FNMSUB_S 0x4b
  518. #define MASK_FNMSUB_S 0x600007f
  519. #define MATCH_FNMADD_S 0x4f
  520. #define MASK_FNMADD_S 0x600007f
  521. #define MATCH_FMADD_D 0x2000043
  522. #define MASK_FMADD_D 0x600007f
  523. #define MATCH_FMSUB_D 0x2000047
  524. #define MASK_FMSUB_D 0x600007f
  525. #define MATCH_FNMSUB_D 0x200004b
  526. #define MASK_FNMSUB_D 0x600007f
  527. #define MATCH_FNMADD_D 0x200004f
  528. #define MASK_FNMADD_D 0x600007f
  529. #define MATCH_C_NOP 0x1
  530. #define MASK_C_NOP 0xffff
  531. #define MATCH_C_ADDI16SP 0x6101
  532. #define MASK_C_ADDI16SP 0xef83
  533. #define MATCH_C_JR 0x8002
  534. #define MASK_C_JR 0xf07f
  535. #define MATCH_C_JALR 0x9002
  536. #define MASK_C_JALR 0xf07f
  537. #define MATCH_C_EBREAK 0x9002
  538. #define MASK_C_EBREAK 0xffff
  539. #define MATCH_C_LD 0x6000
  540. #define MASK_C_LD 0xe003
  541. #define MATCH_C_SD 0xe000
  542. #define MASK_C_SD 0xe003
  543. #define MATCH_C_ADDIW 0x2001
  544. #define MASK_C_ADDIW 0xe003
  545. #define MATCH_C_LDSP 0x6002
  546. #define MASK_C_LDSP 0xe003
  547. #define MATCH_C_SDSP 0xe002
  548. #define MASK_C_SDSP 0xe003
  549. #define MATCH_C_ADDI4SPN 0x0
  550. #define MASK_C_ADDI4SPN 0xe003
  551. #define MATCH_C_FLD 0x2000
  552. #define MASK_C_FLD 0xe003
  553. #define MATCH_C_LW 0x4000
  554. #define MASK_C_LW 0xe003
  555. #define MATCH_C_FLW 0x6000
  556. #define MASK_C_FLW 0xe003
  557. #define MATCH_C_FSD 0xa000
  558. #define MASK_C_FSD 0xe003
  559. #define MATCH_C_SW 0xc000
  560. #define MASK_C_SW 0xe003
  561. #define MATCH_C_FSW 0xe000
  562. #define MASK_C_FSW 0xe003
  563. #define MATCH_C_ADDI 0x1
  564. #define MASK_C_ADDI 0xe003
  565. #define MATCH_C_JAL 0x2001
  566. #define MASK_C_JAL 0xe003
  567. #define MATCH_C_LI 0x4001
  568. #define MASK_C_LI 0xe003
  569. #define MATCH_C_LUI 0x6001
  570. #define MASK_C_LUI 0xe003
  571. #define MATCH_C_SRLI 0x8001
  572. #define MASK_C_SRLI 0xec03
  573. #define MATCH_C_SRAI 0x8401
  574. #define MASK_C_SRAI 0xec03
  575. #define MATCH_C_ANDI 0x8801
  576. #define MASK_C_ANDI 0xec03
  577. #define MATCH_C_SUB 0x8c01
  578. #define MASK_C_SUB 0xfc63
  579. #define MATCH_C_XOR 0x8c21
  580. #define MASK_C_XOR 0xfc63
  581. #define MATCH_C_OR 0x8c41
  582. #define MASK_C_OR 0xfc63
  583. #define MATCH_C_AND 0x8c61
  584. #define MASK_C_AND 0xfc63
  585. #define MATCH_C_SUBW 0x9c01
  586. #define MASK_C_SUBW 0xfc63
  587. #define MATCH_C_ADDW 0x9c21
  588. #define MASK_C_ADDW 0xfc63
  589. #define MATCH_C_J 0xa001
  590. #define MASK_C_J 0xe003
  591. #define MATCH_C_BEQZ 0xc001
  592. #define MASK_C_BEQZ 0xe003
  593. #define MATCH_C_BNEZ 0xe001
  594. #define MASK_C_BNEZ 0xe003
  595. #define MATCH_C_SLLI 0x2
  596. #define MASK_C_SLLI 0xe003
  597. #define MATCH_C_FLDSP 0x2002
  598. #define MASK_C_FLDSP 0xe003
  599. #define MATCH_C_LWSP 0x4002
  600. #define MASK_C_LWSP 0xe003
  601. #define MATCH_C_FLWSP 0x6002
  602. #define MASK_C_FLWSP 0xe003
  603. #define MATCH_C_MV 0x8002
  604. #define MASK_C_MV 0xf003
  605. #define MATCH_C_ADD 0x9002
  606. #define MASK_C_ADD 0xf003
  607. #define MATCH_C_FSDSP 0xa002
  608. #define MASK_C_FSDSP 0xe003
  609. #define MATCH_C_SWSP 0xc002
  610. #define MASK_C_SWSP 0xe003
  611. #define MATCH_C_FSWSP 0xe002
  612. #define MASK_C_FSWSP 0xe003
  613. #define MATCH_CUSTOM0 0xb
  614. #define MASK_CUSTOM0 0x707f
  615. #define MATCH_CUSTOM0_RS1 0x200b
  616. #define MASK_CUSTOM0_RS1 0x707f
  617. #define MATCH_CUSTOM0_RS1_RS2 0x300b
  618. #define MASK_CUSTOM0_RS1_RS2 0x707f
  619. #define MATCH_CUSTOM0_RD 0x400b
  620. #define MASK_CUSTOM0_RD 0x707f
  621. #define MATCH_CUSTOM0_RD_RS1 0x600b
  622. #define MASK_CUSTOM0_RD_RS1 0x707f
  623. #define MATCH_CUSTOM0_RD_RS1_RS2 0x700b
  624. #define MASK_CUSTOM0_RD_RS1_RS2 0x707f
  625. #define MATCH_CUSTOM1 0x2b
  626. #define MASK_CUSTOM1 0x707f
  627. #define MATCH_CUSTOM1_RS1 0x202b
  628. #define MASK_CUSTOM1_RS1 0x707f
  629. #define MATCH_CUSTOM1_RS1_RS2 0x302b
  630. #define MASK_CUSTOM1_RS1_RS2 0x707f
  631. #define MATCH_CUSTOM1_RD 0x402b
  632. #define MASK_CUSTOM1_RD 0x707f
  633. #define MATCH_CUSTOM1_RD_RS1 0x602b
  634. #define MASK_CUSTOM1_RD_RS1 0x707f
  635. #define MATCH_CUSTOM1_RD_RS1_RS2 0x702b
  636. #define MASK_CUSTOM1_RD_RS1_RS2 0x707f
  637. #define MATCH_CUSTOM2 0x5b
  638. #define MASK_CUSTOM2 0x707f
  639. #define MATCH_CUSTOM2_RS1 0x205b
  640. #define MASK_CUSTOM2_RS1 0x707f
  641. #define MATCH_CUSTOM2_RS1_RS2 0x305b
  642. #define MASK_CUSTOM2_RS1_RS2 0x707f
  643. #define MATCH_CUSTOM2_RD 0x405b
  644. #define MASK_CUSTOM2_RD 0x707f
  645. #define MATCH_CUSTOM2_RD_RS1 0x605b
  646. #define MASK_CUSTOM2_RD_RS1 0x707f
  647. #define MATCH_CUSTOM2_RD_RS1_RS2 0x705b
  648. #define MASK_CUSTOM2_RD_RS1_RS2 0x707f
  649. #define MATCH_CUSTOM3 0x7b
  650. #define MASK_CUSTOM3 0x707f
  651. #define MATCH_CUSTOM3_RS1 0x207b
  652. #define MASK_CUSTOM3_RS1 0x707f
  653. #define MATCH_CUSTOM3_RS1_RS2 0x307b
  654. #define MASK_CUSTOM3_RS1_RS2 0x707f
  655. #define MATCH_CUSTOM3_RD 0x407b
  656. #define MASK_CUSTOM3_RD 0x707f
  657. #define MATCH_CUSTOM3_RD_RS1 0x607b
  658. #define MASK_CUSTOM3_RD_RS1 0x707f
  659. #define MATCH_CUSTOM3_RD_RS1_RS2 0x707b
  660. #define MASK_CUSTOM3_RD_RS1_RS2 0x707f
  661. #define CSR_FFLAGS 0x1
  662. #define CSR_FRM 0x2
  663. #define CSR_FCSR 0x3
  664. #define CSR_CYCLE 0xc00
  665. #define CSR_TIME 0xc01
  666. #define CSR_INSTRET 0xc02
  667. #define CSR_HPMCOUNTER3 0xc03
  668. #define CSR_HPMCOUNTER4 0xc04
  669. #define CSR_HPMCOUNTER5 0xc05
  670. #define CSR_HPMCOUNTER6 0xc06
  671. #define CSR_HPMCOUNTER7 0xc07
  672. #define CSR_HPMCOUNTER8 0xc08
  673. #define CSR_HPMCOUNTER9 0xc09
  674. #define CSR_HPMCOUNTER10 0xc0a
  675. #define CSR_HPMCOUNTER11 0xc0b
  676. #define CSR_HPMCOUNTER12 0xc0c
  677. #define CSR_HPMCOUNTER13 0xc0d
  678. #define CSR_HPMCOUNTER14 0xc0e
  679. #define CSR_HPMCOUNTER15 0xc0f
  680. #define CSR_HPMCOUNTER16 0xc10
  681. #define CSR_HPMCOUNTER17 0xc11
  682. #define CSR_HPMCOUNTER18 0xc12
  683. #define CSR_HPMCOUNTER19 0xc13
  684. #define CSR_HPMCOUNTER20 0xc14
  685. #define CSR_HPMCOUNTER21 0xc15
  686. #define CSR_HPMCOUNTER22 0xc16
  687. #define CSR_HPMCOUNTER23 0xc17
  688. #define CSR_HPMCOUNTER24 0xc18
  689. #define CSR_HPMCOUNTER25 0xc19
  690. #define CSR_HPMCOUNTER26 0xc1a
  691. #define CSR_HPMCOUNTER27 0xc1b
  692. #define CSR_HPMCOUNTER28 0xc1c
  693. #define CSR_HPMCOUNTER29 0xc1d
  694. #define CSR_HPMCOUNTER30 0xc1e
  695. #define CSR_HPMCOUNTER31 0xc1f
  696. #define CSR_SSTATUS 0x100
  697. #define CSR_SIE 0x104
  698. #define CSR_STVEC 0x105
  699. #define CSR_SSCRATCH 0x140
  700. #define CSR_SEPC 0x141
  701. #define CSR_SCAUSE 0x142
  702. #define CSR_SBADADDR 0x143
  703. #define CSR_SIP 0x144
  704. #define CSR_SPTBR 0x180
  705. #define CSR_MSTATUS 0x300
  706. #define CSR_MISA 0x301
  707. #define CSR_MEDELEG 0x302
  708. #define CSR_MIDELEG 0x303
  709. #define CSR_MIE 0x304
  710. #define CSR_MTVEC 0x305
  711. #define CSR_MSCRATCH 0x340
  712. #define CSR_MEPC 0x341
  713. #define CSR_MCAUSE 0x342
  714. #define CSR_MBADADDR 0x343
  715. #define CSR_MIP 0x344
  716. #define CSR_TSELECT 0x7a0
  717. #define CSR_TDATA1 0x7a1
  718. #define CSR_TDATA2 0x7a2
  719. #define CSR_TDATA3 0x7a3
  720. #define CSR_DCSR 0x7b0
  721. #define CSR_DPC 0x7b1
  722. #define CSR_DSCRATCH 0x7b2
  723. #define CSR_MCYCLE 0xb00
  724. #define CSR_MINSTRET 0xb02
  725. #define CSR_MHPMCOUNTER3 0xb03
  726. #define CSR_MHPMCOUNTER4 0xb04
  727. #define CSR_MHPMCOUNTER5 0xb05
  728. #define CSR_MHPMCOUNTER6 0xb06
  729. #define CSR_MHPMCOUNTER7 0xb07
  730. #define CSR_MHPMCOUNTER8 0xb08
  731. #define CSR_MHPMCOUNTER9 0xb09
  732. #define CSR_MHPMCOUNTER10 0xb0a
  733. #define CSR_MHPMCOUNTER11 0xb0b
  734. #define CSR_MHPMCOUNTER12 0xb0c
  735. #define CSR_MHPMCOUNTER13 0xb0d
  736. #define CSR_MHPMCOUNTER14 0xb0e
  737. #define CSR_MHPMCOUNTER15 0xb0f
  738. #define CSR_MHPMCOUNTER16 0xb10
  739. #define CSR_MHPMCOUNTER17 0xb11
  740. #define CSR_MHPMCOUNTER18 0xb12
  741. #define CSR_MHPMCOUNTER19 0xb13
  742. #define CSR_MHPMCOUNTER20 0xb14
  743. #define CSR_MHPMCOUNTER21 0xb15
  744. #define CSR_MHPMCOUNTER22 0xb16
  745. #define CSR_MHPMCOUNTER23 0xb17
  746. #define CSR_MHPMCOUNTER24 0xb18
  747. #define CSR_MHPMCOUNTER25 0xb19
  748. #define CSR_MHPMCOUNTER26 0xb1a
  749. #define CSR_MHPMCOUNTER27 0xb1b
  750. #define CSR_MHPMCOUNTER28 0xb1c
  751. #define CSR_MHPMCOUNTER29 0xb1d
  752. #define CSR_MHPMCOUNTER30 0xb1e
  753. #define CSR_MHPMCOUNTER31 0xb1f
  754. #define CSR_MUCOUNTEREN 0x320
  755. #define CSR_MSCOUNTEREN 0x321
  756. #define CSR_MHPMEVENT3 0x323
  757. #define CSR_MHPMEVENT4 0x324
  758. #define CSR_MHPMEVENT5 0x325
  759. #define CSR_MHPMEVENT6 0x326
  760. #define CSR_MHPMEVENT7 0x327
  761. #define CSR_MHPMEVENT8 0x328
  762. #define CSR_MHPMEVENT9 0x329
  763. #define CSR_MHPMEVENT10 0x32a
  764. #define CSR_MHPMEVENT11 0x32b
  765. #define CSR_MHPMEVENT12 0x32c
  766. #define CSR_MHPMEVENT13 0x32d
  767. #define CSR_MHPMEVENT14 0x32e
  768. #define CSR_MHPMEVENT15 0x32f
  769. #define CSR_MHPMEVENT16 0x330
  770. #define CSR_MHPMEVENT17 0x331
  771. #define CSR_MHPMEVENT18 0x332
  772. #define CSR_MHPMEVENT19 0x333
  773. #define CSR_MHPMEVENT20 0x334
  774. #define CSR_MHPMEVENT21 0x335
  775. #define CSR_MHPMEVENT22 0x336
  776. #define CSR_MHPMEVENT23 0x337
  777. #define CSR_MHPMEVENT24 0x338
  778. #define CSR_MHPMEVENT25 0x339
  779. #define CSR_MHPMEVENT26 0x33a
  780. #define CSR_MHPMEVENT27 0x33b
  781. #define CSR_MHPMEVENT28 0x33c
  782. #define CSR_MHPMEVENT29 0x33d
  783. #define CSR_MHPMEVENT30 0x33e
  784. #define CSR_MHPMEVENT31 0x33f
  785. #define CSR_MVENDORID 0xf11
  786. #define CSR_MARCHID 0xf12
  787. #define CSR_MIMPID 0xf13
  788. #define CSR_MHARTID 0xf14
  789. #define CSR_CYCLEH 0xc80
  790. #define CSR_TIMEH 0xc81
  791. #define CSR_INSTRETH 0xc82
  792. #define CSR_HPMCOUNTER3H 0xc83
  793. #define CSR_HPMCOUNTER4H 0xc84
  794. #define CSR_HPMCOUNTER5H 0xc85
  795. #define CSR_HPMCOUNTER6H 0xc86
  796. #define CSR_HPMCOUNTER7H 0xc87
  797. #define CSR_HPMCOUNTER8H 0xc88
  798. #define CSR_HPMCOUNTER9H 0xc89
  799. #define CSR_HPMCOUNTER10H 0xc8a
  800. #define CSR_HPMCOUNTER11H 0xc8b
  801. #define CSR_HPMCOUNTER12H 0xc8c
  802. #define CSR_HPMCOUNTER13H 0xc8d
  803. #define CSR_HPMCOUNTER14H 0xc8e
  804. #define CSR_HPMCOUNTER15H 0xc8f
  805. #define CSR_HPMCOUNTER16H 0xc90
  806. #define CSR_HPMCOUNTER17H 0xc91
  807. #define CSR_HPMCOUNTER18H 0xc92
  808. #define CSR_HPMCOUNTER19H 0xc93
  809. #define CSR_HPMCOUNTER20H 0xc94
  810. #define CSR_HPMCOUNTER21H 0xc95
  811. #define CSR_HPMCOUNTER22H 0xc96
  812. #define CSR_HPMCOUNTER23H 0xc97
  813. #define CSR_HPMCOUNTER24H 0xc98
  814. #define CSR_HPMCOUNTER25H 0xc99
  815. #define CSR_HPMCOUNTER26H 0xc9a
  816. #define CSR_HPMCOUNTER27H 0xc9b
  817. #define CSR_HPMCOUNTER28H 0xc9c
  818. #define CSR_HPMCOUNTER29H 0xc9d
  819. #define CSR_HPMCOUNTER30H 0xc9e
  820. #define CSR_HPMCOUNTER31H 0xc9f
  821. #define CSR_MCYCLEH 0xb80
  822. #define CSR_MINSTRETH 0xb82
  823. #define CSR_MHPMCOUNTER3H 0xb83
  824. #define CSR_MHPMCOUNTER4H 0xb84
  825. #define CSR_MHPMCOUNTER5H 0xb85
  826. #define CSR_MHPMCOUNTER6H 0xb86
  827. #define CSR_MHPMCOUNTER7H 0xb87
  828. #define CSR_MHPMCOUNTER8H 0xb88
  829. #define CSR_MHPMCOUNTER9H 0xb89
  830. #define CSR_MHPMCOUNTER10H 0xb8a
  831. #define CSR_MHPMCOUNTER11H 0xb8b
  832. #define CSR_MHPMCOUNTER12H 0xb8c
  833. #define CSR_MHPMCOUNTER13H 0xb8d
  834. #define CSR_MHPMCOUNTER14H 0xb8e
  835. #define CSR_MHPMCOUNTER15H 0xb8f
  836. #define CSR_MHPMCOUNTER16H 0xb90
  837. #define CSR_MHPMCOUNTER17H 0xb91
  838. #define CSR_MHPMCOUNTER18H 0xb92
  839. #define CSR_MHPMCOUNTER19H 0xb93
  840. #define CSR_MHPMCOUNTER20H 0xb94
  841. #define CSR_MHPMCOUNTER21H 0xb95
  842. #define CSR_MHPMCOUNTER22H 0xb96
  843. #define CSR_MHPMCOUNTER23H 0xb97
  844. #define CSR_MHPMCOUNTER24H 0xb98
  845. #define CSR_MHPMCOUNTER25H 0xb99
  846. #define CSR_MHPMCOUNTER26H 0xb9a
  847. #define CSR_MHPMCOUNTER27H 0xb9b
  848. #define CSR_MHPMCOUNTER28H 0xb9c
  849. #define CSR_MHPMCOUNTER29H 0xb9d
  850. #define CSR_MHPMCOUNTER30H 0xb9e
  851. #define CSR_MHPMCOUNTER31H 0xb9f
  852. #define CAUSE_MISALIGNED_FETCH 0x0
  853. #define CAUSE_FAULT_FETCH 0x1
  854. #define CAUSE_ILLEGAL_INSTRUCTION 0x2
  855. #define CAUSE_BREAKPOINT 0x3
  856. #define CAUSE_MISALIGNED_LOAD 0x4
  857. #define CAUSE_FAULT_LOAD 0x5
  858. #define CAUSE_MISALIGNED_STORE 0x6
  859. #define CAUSE_FAULT_STORE 0x7
  860. #define CAUSE_USER_ECALL 0x8
  861. #define CAUSE_SUPERVISOR_ECALL 0x9
  862. #define CAUSE_HYPERVISOR_ECALL 0xa
  863. #define CAUSE_MACHINE_ECALL 0xb
  864. #endif
  865. #ifdef DECLARE_INSN
  866. DECLARE_INSN(beq, MATCH_BEQ, MASK_BEQ)
  867. DECLARE_INSN(bne, MATCH_BNE, MASK_BNE)
  868. DECLARE_INSN(blt, MATCH_BLT, MASK_BLT)
  869. DECLARE_INSN(bge, MATCH_BGE, MASK_BGE)
  870. DECLARE_INSN(bltu, MATCH_BLTU, MASK_BLTU)
  871. DECLARE_INSN(bgeu, MATCH_BGEU, MASK_BGEU)
  872. DECLARE_INSN(jalr, MATCH_JALR, MASK_JALR)
  873. DECLARE_INSN(jal, MATCH_JAL, MASK_JAL)
  874. DECLARE_INSN(lui, MATCH_LUI, MASK_LUI)
  875. DECLARE_INSN(auipc, MATCH_AUIPC, MASK_AUIPC)
  876. DECLARE_INSN(addi, MATCH_ADDI, MASK_ADDI)
  877. DECLARE_INSN(slli, MATCH_SLLI, MASK_SLLI)
  878. DECLARE_INSN(slti, MATCH_SLTI, MASK_SLTI)
  879. DECLARE_INSN(sltiu, MATCH_SLTIU, MASK_SLTIU)
  880. DECLARE_INSN(xori, MATCH_XORI, MASK_XORI)
  881. DECLARE_INSN(srli, MATCH_SRLI, MASK_SRLI)
  882. DECLARE_INSN(srai, MATCH_SRAI, MASK_SRAI)
  883. DECLARE_INSN(ori, MATCH_ORI, MASK_ORI)
  884. DECLARE_INSN(andi, MATCH_ANDI, MASK_ANDI)
  885. DECLARE_INSN(add, MATCH_ADD, MASK_ADD)
  886. DECLARE_INSN(sub, MATCH_SUB, MASK_SUB)
  887. DECLARE_INSN(sll, MATCH_SLL, MASK_SLL)
  888. DECLARE_INSN(slt, MATCH_SLT, MASK_SLT)
  889. DECLARE_INSN(sltu, MATCH_SLTU, MASK_SLTU)
  890. DECLARE_INSN(xor, MATCH_XOR, MASK_XOR)
  891. DECLARE_INSN(srl, MATCH_SRL, MASK_SRL)
  892. DECLARE_INSN(sra, MATCH_SRA, MASK_SRA)
  893. DECLARE_INSN(or, MATCH_OR, MASK_OR)
  894. DECLARE_INSN(and, MATCH_AND, MASK_AND)
  895. DECLARE_INSN(addiw, MATCH_ADDIW, MASK_ADDIW)
  896. DECLARE_INSN(slliw, MATCH_SLLIW, MASK_SLLIW)
  897. DECLARE_INSN(srliw, MATCH_SRLIW, MASK_SRLIW)
  898. DECLARE_INSN(sraiw, MATCH_SRAIW, MASK_SRAIW)
  899. DECLARE_INSN(addw, MATCH_ADDW, MASK_ADDW)
  900. DECLARE_INSN(subw, MATCH_SUBW, MASK_SUBW)
  901. DECLARE_INSN(sllw, MATCH_SLLW, MASK_SLLW)
  902. DECLARE_INSN(srlw, MATCH_SRLW, MASK_SRLW)
  903. DECLARE_INSN(sraw, MATCH_SRAW, MASK_SRAW)
  904. DECLARE_INSN(lb, MATCH_LB, MASK_LB)
  905. DECLARE_INSN(lh, MATCH_LH, MASK_LH)
  906. DECLARE_INSN(lw, MATCH_LW, MASK_LW)
  907. DECLARE_INSN(ld, MATCH_LD, MASK_LD)
  908. DECLARE_INSN(lbu, MATCH_LBU, MASK_LBU)
  909. DECLARE_INSN(lhu, MATCH_LHU, MASK_LHU)
  910. DECLARE_INSN(lwu, MATCH_LWU, MASK_LWU)
  911. DECLARE_INSN(sb, MATCH_SB, MASK_SB)
  912. DECLARE_INSN(sh, MATCH_SH, MASK_SH)
  913. DECLARE_INSN(sw, MATCH_SW, MASK_SW)
  914. DECLARE_INSN(sd, MATCH_SD, MASK_SD)
  915. DECLARE_INSN(fence, MATCH_FENCE, MASK_FENCE)
  916. DECLARE_INSN(fence_i, MATCH_FENCE_I, MASK_FENCE_I)
  917. DECLARE_INSN(mul, MATCH_MUL, MASK_MUL)
  918. DECLARE_INSN(mulh, MATCH_MULH, MASK_MULH)
  919. DECLARE_INSN(mulhsu, MATCH_MULHSU, MASK_MULHSU)
  920. DECLARE_INSN(mulhu, MATCH_MULHU, MASK_MULHU)
  921. DECLARE_INSN(div, MATCH_DIV, MASK_DIV)
  922. DECLARE_INSN(divu, MATCH_DIVU, MASK_DIVU)
  923. DECLARE_INSN(rem, MATCH_REM, MASK_REM)
  924. DECLARE_INSN(remu, MATCH_REMU, MASK_REMU)
  925. DECLARE_INSN(mulw, MATCH_MULW, MASK_MULW)
  926. DECLARE_INSN(divw, MATCH_DIVW, MASK_DIVW)
  927. DECLARE_INSN(divuw, MATCH_DIVUW, MASK_DIVUW)
  928. DECLARE_INSN(remw, MATCH_REMW, MASK_REMW)
  929. DECLARE_INSN(remuw, MATCH_REMUW, MASK_REMUW)
  930. DECLARE_INSN(amoadd_w, MATCH_AMOADD_W, MASK_AMOADD_W)
  931. DECLARE_INSN(amoxor_w, MATCH_AMOXOR_W, MASK_AMOXOR_W)
  932. DECLARE_INSN(amoor_w, MATCH_AMOOR_W, MASK_AMOOR_W)
  933. DECLARE_INSN(amoand_w, MATCH_AMOAND_W, MASK_AMOAND_W)
  934. DECLARE_INSN(amomin_w, MATCH_AMOMIN_W, MASK_AMOMIN_W)
  935. DECLARE_INSN(amomax_w, MATCH_AMOMAX_W, MASK_AMOMAX_W)
  936. DECLARE_INSN(amominu_w, MATCH_AMOMINU_W, MASK_AMOMINU_W)
  937. DECLARE_INSN(amomaxu_w, MATCH_AMOMAXU_W, MASK_AMOMAXU_W)
  938. DECLARE_INSN(amoswap_w, MATCH_AMOSWAP_W, MASK_AMOSWAP_W)
  939. DECLARE_INSN(lr_w, MATCH_LR_W, MASK_LR_W)
  940. DECLARE_INSN(sc_w, MATCH_SC_W, MASK_SC_W)
  941. DECLARE_INSN(amoadd_d, MATCH_AMOADD_D, MASK_AMOADD_D)
  942. DECLARE_INSN(amoxor_d, MATCH_AMOXOR_D, MASK_AMOXOR_D)
  943. DECLARE_INSN(amoor_d, MATCH_AMOOR_D, MASK_AMOOR_D)
  944. DECLARE_INSN(amoand_d, MATCH_AMOAND_D, MASK_AMOAND_D)
  945. DECLARE_INSN(amomin_d, MATCH_AMOMIN_D, MASK_AMOMIN_D)
  946. DECLARE_INSN(amomax_d, MATCH_AMOMAX_D, MASK_AMOMAX_D)
  947. DECLARE_INSN(amominu_d, MATCH_AMOMINU_D, MASK_AMOMINU_D)
  948. DECLARE_INSN(amomaxu_d, MATCH_AMOMAXU_D, MASK_AMOMAXU_D)
  949. DECLARE_INSN(amoswap_d, MATCH_AMOSWAP_D, MASK_AMOSWAP_D)
  950. DECLARE_INSN(lr_d, MATCH_LR_D, MASK_LR_D)
  951. DECLARE_INSN(sc_d, MATCH_SC_D, MASK_SC_D)
  952. DECLARE_INSN(ecall, MATCH_ECALL, MASK_ECALL)
  953. DECLARE_INSN(ebreak, MATCH_EBREAK, MASK_EBREAK)
  954. DECLARE_INSN(uret, MATCH_URET, MASK_URET)
  955. DECLARE_INSN(sret, MATCH_SRET, MASK_SRET)
  956. DECLARE_INSN(hret, MATCH_HRET, MASK_HRET)
  957. DECLARE_INSN(mret, MATCH_MRET, MASK_MRET)
  958. DECLARE_INSN(dret, MATCH_DRET, MASK_DRET)
  959. DECLARE_INSN(sfence_vm, MATCH_SFENCE_VM, MASK_SFENCE_VM)
  960. DECLARE_INSN(wfi, MATCH_WFI, MASK_WFI)
  961. DECLARE_INSN(csrrw, MATCH_CSRRW, MASK_CSRRW)
  962. DECLARE_INSN(csrrs, MATCH_CSRRS, MASK_CSRRS)
  963. DECLARE_INSN(csrrc, MATCH_CSRRC, MASK_CSRRC)
  964. DECLARE_INSN(csrrwi, MATCH_CSRRWI, MASK_CSRRWI)
  965. DECLARE_INSN(csrrsi, MATCH_CSRRSI, MASK_CSRRSI)
  966. DECLARE_INSN(csrrci, MATCH_CSRRCI, MASK_CSRRCI)
  967. DECLARE_INSN(fadd_s, MATCH_FADD_S, MASK_FADD_S)
  968. DECLARE_INSN(fsub_s, MATCH_FSUB_S, MASK_FSUB_S)
  969. DECLARE_INSN(fmul_s, MATCH_FMUL_S, MASK_FMUL_S)
  970. DECLARE_INSN(fdiv_s, MATCH_FDIV_S, MASK_FDIV_S)
  971. DECLARE_INSN(fsgnj_s, MATCH_FSGNJ_S, MASK_FSGNJ_S)
  972. DECLARE_INSN(fsgnjn_s, MATCH_FSGNJN_S, MASK_FSGNJN_S)
  973. DECLARE_INSN(fsgnjx_s, MATCH_FSGNJX_S, MASK_FSGNJX_S)
  974. DECLARE_INSN(fmin_s, MATCH_FMIN_S, MASK_FMIN_S)
  975. DECLARE_INSN(fmax_s, MATCH_FMAX_S, MASK_FMAX_S)
  976. DECLARE_INSN(fsqrt_s, MATCH_FSQRT_S, MASK_FSQRT_S)
  977. DECLARE_INSN(fadd_d, MATCH_FADD_D, MASK_FADD_D)
  978. DECLARE_INSN(fsub_d, MATCH_FSUB_D, MASK_FSUB_D)
  979. DECLARE_INSN(fmul_d, MATCH_FMUL_D, MASK_FMUL_D)
  980. DECLARE_INSN(fdiv_d, MATCH_FDIV_D, MASK_FDIV_D)
  981. DECLARE_INSN(fsgnj_d, MATCH_FSGNJ_D, MASK_FSGNJ_D)
  982. DECLARE_INSN(fsgnjn_d, MATCH_FSGNJN_D, MASK_FSGNJN_D)
  983. DECLARE_INSN(fsgnjx_d, MATCH_FSGNJX_D, MASK_FSGNJX_D)
  984. DECLARE_INSN(fmin_d, MATCH_FMIN_D, MASK_FMIN_D)
  985. DECLARE_INSN(fmax_d, MATCH_FMAX_D, MASK_FMAX_D)
  986. DECLARE_INSN(fcvt_s_d, MATCH_FCVT_S_D, MASK_FCVT_S_D)
  987. DECLARE_INSN(fcvt_d_s, MATCH_FCVT_D_S, MASK_FCVT_D_S)
  988. DECLARE_INSN(fsqrt_d, MATCH_FSQRT_D, MASK_FSQRT_D)
  989. DECLARE_INSN(fle_s, MATCH_FLE_S, MASK_FLE_S)
  990. DECLARE_INSN(flt_s, MATCH_FLT_S, MASK_FLT_S)
  991. DECLARE_INSN(feq_s, MATCH_FEQ_S, MASK_FEQ_S)
  992. DECLARE_INSN(fle_d, MATCH_FLE_D, MASK_FLE_D)
  993. DECLARE_INSN(flt_d, MATCH_FLT_D, MASK_FLT_D)
  994. DECLARE_INSN(feq_d, MATCH_FEQ_D, MASK_FEQ_D)
  995. DECLARE_INSN(fcvt_w_s, MATCH_FCVT_W_S, MASK_FCVT_W_S)
  996. DECLARE_INSN(fcvt_wu_s, MATCH_FCVT_WU_S, MASK_FCVT_WU_S)
  997. DECLARE_INSN(fcvt_l_s, MATCH_FCVT_L_S, MASK_FCVT_L_S)
  998. DECLARE_INSN(fcvt_lu_s, MATCH_FCVT_LU_S, MASK_FCVT_LU_S)
  999. DECLARE_INSN(fmv_x_s, MATCH_FMV_X_S, MASK_FMV_X_S)
  1000. DECLARE_INSN(fclass_s, MATCH_FCLASS_S, MASK_FCLASS_S)
  1001. DECLARE_INSN(fcvt_w_d, MATCH_FCVT_W_D, MASK_FCVT_W_D)
  1002. DECLARE_INSN(fcvt_wu_d, MATCH_FCVT_WU_D, MASK_FCVT_WU_D)
  1003. DECLARE_INSN(fcvt_l_d, MATCH_FCVT_L_D, MASK_FCVT_L_D)
  1004. DECLARE_INSN(fcvt_lu_d, MATCH_FCVT_LU_D, MASK_FCVT_LU_D)
  1005. DECLARE_INSN(fmv_x_d, MATCH_FMV_X_D, MASK_FMV_X_D)
  1006. DECLARE_INSN(fclass_d, MATCH_FCLASS_D, MASK_FCLASS_D)
  1007. DECLARE_INSN(fcvt_s_w, MATCH_FCVT_S_W, MASK_FCVT_S_W)
  1008. DECLARE_INSN(fcvt_s_wu, MATCH_FCVT_S_WU, MASK_FCVT_S_WU)
  1009. DECLARE_INSN(fcvt_s_l, MATCH_FCVT_S_L, MASK_FCVT_S_L)
  1010. DECLARE_INSN(fcvt_s_lu, MATCH_FCVT_S_LU, MASK_FCVT_S_LU)
  1011. DECLARE_INSN(fmv_s_x, MATCH_FMV_S_X, MASK_FMV_S_X)
  1012. DECLARE_INSN(fcvt_d_w, MATCH_FCVT_D_W, MASK_FCVT_D_W)
  1013. DECLARE_INSN(fcvt_d_wu, MATCH_FCVT_D_WU, MASK_FCVT_D_WU)
  1014. DECLARE_INSN(fcvt_d_l, MATCH_FCVT_D_L, MASK_FCVT_D_L)
  1015. DECLARE_INSN(fcvt_d_lu, MATCH_FCVT_D_LU, MASK_FCVT_D_LU)
  1016. DECLARE_INSN(fmv_d_x, MATCH_FMV_D_X, MASK_FMV_D_X)
  1017. DECLARE_INSN(flw, MATCH_FLW, MASK_FLW)
  1018. DECLARE_INSN(fld, MATCH_FLD, MASK_FLD)
  1019. DECLARE_INSN(fsw, MATCH_FSW, MASK_FSW)
  1020. DECLARE_INSN(fsd, MATCH_FSD, MASK_FSD)
  1021. DECLARE_INSN(fmadd_s, MATCH_FMADD_S, MASK_FMADD_S)
  1022. DECLARE_INSN(fmsub_s, MATCH_FMSUB_S, MASK_FMSUB_S)
  1023. DECLARE_INSN(fnmsub_s, MATCH_FNMSUB_S, MASK_FNMSUB_S)
  1024. DECLARE_INSN(fnmadd_s, MATCH_FNMADD_S, MASK_FNMADD_S)
  1025. DECLARE_INSN(fmadd_d, MATCH_FMADD_D, MASK_FMADD_D)
  1026. DECLARE_INSN(fmsub_d, MATCH_FMSUB_D, MASK_FMSUB_D)
  1027. DECLARE_INSN(fnmsub_d, MATCH_FNMSUB_D, MASK_FNMSUB_D)
  1028. DECLARE_INSN(fnmadd_d, MATCH_FNMADD_D, MASK_FNMADD_D)
  1029. DECLARE_INSN(c_nop, MATCH_C_NOP, MASK_C_NOP)
  1030. DECLARE_INSN(c_addi16sp, MATCH_C_ADDI16SP, MASK_C_ADDI16SP)
  1031. DECLARE_INSN(c_jr, MATCH_C_JR, MASK_C_JR)
  1032. DECLARE_INSN(c_jalr, MATCH_C_JALR, MASK_C_JALR)
  1033. DECLARE_INSN(c_ebreak, MATCH_C_EBREAK, MASK_C_EBREAK)
  1034. DECLARE_INSN(c_ld, MATCH_C_LD, MASK_C_LD)
  1035. DECLARE_INSN(c_sd, MATCH_C_SD, MASK_C_SD)
  1036. DECLARE_INSN(c_addiw, MATCH_C_ADDIW, MASK_C_ADDIW)
  1037. DECLARE_INSN(c_ldsp, MATCH_C_LDSP, MASK_C_LDSP)
  1038. DECLARE_INSN(c_sdsp, MATCH_C_SDSP, MASK_C_SDSP)
  1039. DECLARE_INSN(c_addi4spn, MATCH_C_ADDI4SPN, MASK_C_ADDI4SPN)
  1040. DECLARE_INSN(c_fld, MATCH_C_FLD, MASK_C_FLD)
  1041. DECLARE_INSN(c_lw, MATCH_C_LW, MASK_C_LW)
  1042. DECLARE_INSN(c_flw, MATCH_C_FLW, MASK_C_FLW)
  1043. DECLARE_INSN(c_fsd, MATCH_C_FSD, MASK_C_FSD)
  1044. DECLARE_INSN(c_sw, MATCH_C_SW, MASK_C_SW)
  1045. DECLARE_INSN(c_fsw, MATCH_C_FSW, MASK_C_FSW)
  1046. DECLARE_INSN(c_addi, MATCH_C_ADDI, MASK_C_ADDI)
  1047. DECLARE_INSN(c_jal, MATCH_C_JAL, MASK_C_JAL)
  1048. DECLARE_INSN(c_li, MATCH_C_LI, MASK_C_LI)
  1049. DECLARE_INSN(c_lui, MATCH_C_LUI, MASK_C_LUI)
  1050. DECLARE_INSN(c_srli, MATCH_C_SRLI, MASK_C_SRLI)
  1051. DECLARE_INSN(c_srai, MATCH_C_SRAI, MASK_C_SRAI)
  1052. DECLARE_INSN(c_andi, MATCH_C_ANDI, MASK_C_ANDI)
  1053. DECLARE_INSN(c_sub, MATCH_C_SUB, MASK_C_SUB)
  1054. DECLARE_INSN(c_xor, MATCH_C_XOR, MASK_C_XOR)
  1055. DECLARE_INSN(c_or, MATCH_C_OR, MASK_C_OR)
  1056. DECLARE_INSN(c_and, MATCH_C_AND, MASK_C_AND)
  1057. DECLARE_INSN(c_subw, MATCH_C_SUBW, MASK_C_SUBW)
  1058. DECLARE_INSN(c_addw, MATCH_C_ADDW, MASK_C_ADDW)
  1059. DECLARE_INSN(c_j, MATCH_C_J, MASK_C_J)
  1060. DECLARE_INSN(c_beqz, MATCH_C_BEQZ, MASK_C_BEQZ)
  1061. DECLARE_INSN(c_bnez, MATCH_C_BNEZ, MASK_C_BNEZ)
  1062. DECLARE_INSN(c_slli, MATCH_C_SLLI, MASK_C_SLLI)
  1063. DECLARE_INSN(c_fldsp, MATCH_C_FLDSP, MASK_C_FLDSP)
  1064. DECLARE_INSN(c_lwsp, MATCH_C_LWSP, MASK_C_LWSP)
  1065. DECLARE_INSN(c_flwsp, MATCH_C_FLWSP, MASK_C_FLWSP)
  1066. DECLARE_INSN(c_mv, MATCH_C_MV, MASK_C_MV)
  1067. DECLARE_INSN(c_add, MATCH_C_ADD, MASK_C_ADD)
  1068. DECLARE_INSN(c_fsdsp, MATCH_C_FSDSP, MASK_C_FSDSP)
  1069. DECLARE_INSN(c_swsp, MATCH_C_SWSP, MASK_C_SWSP)
  1070. DECLARE_INSN(c_fswsp, MATCH_C_FSWSP, MASK_C_FSWSP)
  1071. DECLARE_INSN(custom0, MATCH_CUSTOM0, MASK_CUSTOM0)
  1072. DECLARE_INSN(custom0_rs1, MATCH_CUSTOM0_RS1, MASK_CUSTOM0_RS1)
  1073. DECLARE_INSN(custom0_rs1_rs2, MATCH_CUSTOM0_RS1_RS2, MASK_CUSTOM0_RS1_RS2)
  1074. DECLARE_INSN(custom0_rd, MATCH_CUSTOM0_RD, MASK_CUSTOM0_RD)
  1075. DECLARE_INSN(custom0_rd_rs1, MATCH_CUSTOM0_RD_RS1, MASK_CUSTOM0_RD_RS1)
  1076. DECLARE_INSN(custom0_rd_rs1_rs2, MATCH_CUSTOM0_RD_RS1_RS2, MASK_CUSTOM0_RD_RS1_RS2)
  1077. DECLARE_INSN(custom1, MATCH_CUSTOM1, MASK_CUSTOM1)
  1078. DECLARE_INSN(custom1_rs1, MATCH_CUSTOM1_RS1, MASK_CUSTOM1_RS1)
  1079. DECLARE_INSN(custom1_rs1_rs2, MATCH_CUSTOM1_RS1_RS2, MASK_CUSTOM1_RS1_RS2)
  1080. DECLARE_INSN(custom1_rd, MATCH_CUSTOM1_RD, MASK_CUSTOM1_RD)
  1081. DECLARE_INSN(custom1_rd_rs1, MATCH_CUSTOM1_RD_RS1, MASK_CUSTOM1_RD_RS1)
  1082. DECLARE_INSN(custom1_rd_rs1_rs2, MATCH_CUSTOM1_RD_RS1_RS2, MASK_CUSTOM1_RD_RS1_RS2)
  1083. DECLARE_INSN(custom2, MATCH_CUSTOM2, MASK_CUSTOM2)
  1084. DECLARE_INSN(custom2_rs1, MATCH_CUSTOM2_RS1, MASK_CUSTOM2_RS1)
  1085. DECLARE_INSN(custom2_rs1_rs2, MATCH_CUSTOM2_RS1_RS2, MASK_CUSTOM2_RS1_RS2)
  1086. DECLARE_INSN(custom2_rd, MATCH_CUSTOM2_RD, MASK_CUSTOM2_RD)
  1087. DECLARE_INSN(custom2_rd_rs1, MATCH_CUSTOM2_RD_RS1, MASK_CUSTOM2_RD_RS1)
  1088. DECLARE_INSN(custom2_rd_rs1_rs2, MATCH_CUSTOM2_RD_RS1_RS2, MASK_CUSTOM2_RD_RS1_RS2)
  1089. DECLARE_INSN(custom3, MATCH_CUSTOM3, MASK_CUSTOM3)
  1090. DECLARE_INSN(custom3_rs1, MATCH_CUSTOM3_RS1, MASK_CUSTOM3_RS1)
  1091. DECLARE_INSN(custom3_rs1_rs2, MATCH_CUSTOM3_RS1_RS2, MASK_CUSTOM3_RS1_RS2)
  1092. DECLARE_INSN(custom3_rd, MATCH_CUSTOM3_RD, MASK_CUSTOM3_RD)
  1093. DECLARE_INSN(custom3_rd_rs1, MATCH_CUSTOM3_RD_RS1, MASK_CUSTOM3_RD_RS1)
  1094. DECLARE_INSN(custom3_rd_rs1_rs2, MATCH_CUSTOM3_RD_RS1_RS2, MASK_CUSTOM3_RD_RS1_RS2)
  1095. #endif
  1096. #ifdef DECLARE_CSR
  1097. DECLARE_CSR(fflags, CSR_FFLAGS)
  1098. DECLARE_CSR(frm, CSR_FRM)
  1099. DECLARE_CSR(fcsr, CSR_FCSR)
  1100. DECLARE_CSR(cycle, CSR_CYCLE)
  1101. DECLARE_CSR(time, CSR_TIME)
  1102. DECLARE_CSR(instret, CSR_INSTRET)
  1103. DECLARE_CSR(hpmcounter3, CSR_HPMCOUNTER3)
  1104. DECLARE_CSR(hpmcounter4, CSR_HPMCOUNTER4)
  1105. DECLARE_CSR(hpmcounter5, CSR_HPMCOUNTER5)
  1106. DECLARE_CSR(hpmcounter6, CSR_HPMCOUNTER6)
  1107. DECLARE_CSR(hpmcounter7, CSR_HPMCOUNTER7)
  1108. DECLARE_CSR(hpmcounter8, CSR_HPMCOUNTER8)
  1109. DECLARE_CSR(hpmcounter9, CSR_HPMCOUNTER9)
  1110. DECLARE_CSR(hpmcounter10, CSR_HPMCOUNTER10)
  1111. DECLARE_CSR(hpmcounter11, CSR_HPMCOUNTER11)
  1112. DECLARE_CSR(hpmcounter12, CSR_HPMCOUNTER12)
  1113. DECLARE_CSR(hpmcounter13, CSR_HPMCOUNTER13)
  1114. DECLARE_CSR(hpmcounter14, CSR_HPMCOUNTER14)
  1115. DECLARE_CSR(hpmcounter15, CSR_HPMCOUNTER15)
  1116. DECLARE_CSR(hpmcounter16, CSR_HPMCOUNTER16)
  1117. DECLARE_CSR(hpmcounter17, CSR_HPMCOUNTER17)
  1118. DECLARE_CSR(hpmcounter18, CSR_HPMCOUNTER18)
  1119. DECLARE_CSR(hpmcounter19, CSR_HPMCOUNTER19)
  1120. DECLARE_CSR(hpmcounter20, CSR_HPMCOUNTER20)
  1121. DECLARE_CSR(hpmcounter21, CSR_HPMCOUNTER21)
  1122. DECLARE_CSR(hpmcounter22, CSR_HPMCOUNTER22)
  1123. DECLARE_CSR(hpmcounter23, CSR_HPMCOUNTER23)
  1124. DECLARE_CSR(hpmcounter24, CSR_HPMCOUNTER24)
  1125. DECLARE_CSR(hpmcounter25, CSR_HPMCOUNTER25)
  1126. DECLARE_CSR(hpmcounter26, CSR_HPMCOUNTER26)
  1127. DECLARE_CSR(hpmcounter27, CSR_HPMCOUNTER27)
  1128. DECLARE_CSR(hpmcounter28, CSR_HPMCOUNTER28)
  1129. DECLARE_CSR(hpmcounter29, CSR_HPMCOUNTER29)
  1130. DECLARE_CSR(hpmcounter30, CSR_HPMCOUNTER30)
  1131. DECLARE_CSR(hpmcounter31, CSR_HPMCOUNTER31)
  1132. DECLARE_CSR(sstatus, CSR_SSTATUS)
  1133. DECLARE_CSR(sie, CSR_SIE)
  1134. DECLARE_CSR(stvec, CSR_STVEC)
  1135. DECLARE_CSR(sscratch, CSR_SSCRATCH)
  1136. DECLARE_CSR(sepc, CSR_SEPC)
  1137. DECLARE_CSR(scause, CSR_SCAUSE)
  1138. DECLARE_CSR(sbadaddr, CSR_SBADADDR)
  1139. DECLARE_CSR(sip, CSR_SIP)
  1140. DECLARE_CSR(sptbr, CSR_SPTBR)
  1141. DECLARE_CSR(mstatus, CSR_MSTATUS)
  1142. DECLARE_CSR(misa, CSR_MISA)
  1143. DECLARE_CSR(medeleg, CSR_MEDELEG)
  1144. DECLARE_CSR(mideleg, CSR_MIDELEG)
  1145. DECLARE_CSR(mie, CSR_MIE)
  1146. DECLARE_CSR(mtvec, CSR_MTVEC)
  1147. DECLARE_CSR(mscratch, CSR_MSCRATCH)
  1148. DECLARE_CSR(mepc, CSR_MEPC)
  1149. DECLARE_CSR(mcause, CSR_MCAUSE)
  1150. DECLARE_CSR(mbadaddr, CSR_MBADADDR)
  1151. DECLARE_CSR(mip, CSR_MIP)
  1152. DECLARE_CSR(tselect, CSR_TSELECT)
  1153. DECLARE_CSR(tdata1, CSR_TDATA1)
  1154. DECLARE_CSR(tdata2, CSR_TDATA2)
  1155. DECLARE_CSR(tdata3, CSR_TDATA3)
  1156. DECLARE_CSR(dcsr, CSR_DCSR)
  1157. DECLARE_CSR(dpc, CSR_DPC)
  1158. DECLARE_CSR(dscratch, CSR_DSCRATCH)
  1159. DECLARE_CSR(mcycle, CSR_MCYCLE)
  1160. DECLARE_CSR(minstret, CSR_MINSTRET)
  1161. DECLARE_CSR(mhpmcounter3, CSR_MHPMCOUNTER3)
  1162. DECLARE_CSR(mhpmcounter4, CSR_MHPMCOUNTER4)
  1163. DECLARE_CSR(mhpmcounter5, CSR_MHPMCOUNTER5)
  1164. DECLARE_CSR(mhpmcounter6, CSR_MHPMCOUNTER6)
  1165. DECLARE_CSR(mhpmcounter7, CSR_MHPMCOUNTER7)
  1166. DECLARE_CSR(mhpmcounter8, CSR_MHPMCOUNTER8)
  1167. DECLARE_CSR(mhpmcounter9, CSR_MHPMCOUNTER9)
  1168. DECLARE_CSR(mhpmcounter10, CSR_MHPMCOUNTER10)
  1169. DECLARE_CSR(mhpmcounter11, CSR_MHPMCOUNTER11)
  1170. DECLARE_CSR(mhpmcounter12, CSR_MHPMCOUNTER12)
  1171. DECLARE_CSR(mhpmcounter13, CSR_MHPMCOUNTER13)
  1172. DECLARE_CSR(mhpmcounter14, CSR_MHPMCOUNTER14)
  1173. DECLARE_CSR(mhpmcounter15, CSR_MHPMCOUNTER15)
  1174. DECLARE_CSR(mhpmcounter16, CSR_MHPMCOUNTER16)
  1175. DECLARE_CSR(mhpmcounter17, CSR_MHPMCOUNTER17)
  1176. DECLARE_CSR(mhpmcounter18, CSR_MHPMCOUNTER18)
  1177. DECLARE_CSR(mhpmcounter19, CSR_MHPMCOUNTER19)
  1178. DECLARE_CSR(mhpmcounter20, CSR_MHPMCOUNTER20)
  1179. DECLARE_CSR(mhpmcounter21, CSR_MHPMCOUNTER21)
  1180. DECLARE_CSR(mhpmcounter22, CSR_MHPMCOUNTER22)
  1181. DECLARE_CSR(mhpmcounter23, CSR_MHPMCOUNTER23)
  1182. DECLARE_CSR(mhpmcounter24, CSR_MHPMCOUNTER24)
  1183. DECLARE_CSR(mhpmcounter25, CSR_MHPMCOUNTER25)
  1184. DECLARE_CSR(mhpmcounter26, CSR_MHPMCOUNTER26)
  1185. DECLARE_CSR(mhpmcounter27, CSR_MHPMCOUNTER27)
  1186. DECLARE_CSR(mhpmcounter28, CSR_MHPMCOUNTER28)
  1187. DECLARE_CSR(mhpmcounter29, CSR_MHPMCOUNTER29)
  1188. DECLARE_CSR(mhpmcounter30, CSR_MHPMCOUNTER30)
  1189. DECLARE_CSR(mhpmcounter31, CSR_MHPMCOUNTER31)
  1190. DECLARE_CSR(mucounteren, CSR_MUCOUNTEREN)
  1191. DECLARE_CSR(mscounteren, CSR_MSCOUNTEREN)
  1192. DECLARE_CSR(mhpmevent3, CSR_MHPMEVENT3)
  1193. DECLARE_CSR(mhpmevent4, CSR_MHPMEVENT4)
  1194. DECLARE_CSR(mhpmevent5, CSR_MHPMEVENT5)
  1195. DECLARE_CSR(mhpmevent6, CSR_MHPMEVENT6)
  1196. DECLARE_CSR(mhpmevent7, CSR_MHPMEVENT7)
  1197. DECLARE_CSR(mhpmevent8, CSR_MHPMEVENT8)
  1198. DECLARE_CSR(mhpmevent9, CSR_MHPMEVENT9)
  1199. DECLARE_CSR(mhpmevent10, CSR_MHPMEVENT10)
  1200. DECLARE_CSR(mhpmevent11, CSR_MHPMEVENT11)
  1201. DECLARE_CSR(mhpmevent12, CSR_MHPMEVENT12)
  1202. DECLARE_CSR(mhpmevent13, CSR_MHPMEVENT13)
  1203. DECLARE_CSR(mhpmevent14, CSR_MHPMEVENT14)
  1204. DECLARE_CSR(mhpmevent15, CSR_MHPMEVENT15)
  1205. DECLARE_CSR(mhpmevent16, CSR_MHPMEVENT16)
  1206. DECLARE_CSR(mhpmevent17, CSR_MHPMEVENT17)
  1207. DECLARE_CSR(mhpmevent18, CSR_MHPMEVENT18)
  1208. DECLARE_CSR(mhpmevent19, CSR_MHPMEVENT19)
  1209. DECLARE_CSR(mhpmevent20, CSR_MHPMEVENT20)
  1210. DECLARE_CSR(mhpmevent21, CSR_MHPMEVENT21)
  1211. DECLARE_CSR(mhpmevent22, CSR_MHPMEVENT22)
  1212. DECLARE_CSR(mhpmevent23, CSR_MHPMEVENT23)
  1213. DECLARE_CSR(mhpmevent24, CSR_MHPMEVENT24)
  1214. DECLARE_CSR(mhpmevent25, CSR_MHPMEVENT25)
  1215. DECLARE_CSR(mhpmevent26, CSR_MHPMEVENT26)
  1216. DECLARE_CSR(mhpmevent27, CSR_MHPMEVENT27)
  1217. DECLARE_CSR(mhpmevent28, CSR_MHPMEVENT28)
  1218. DECLARE_CSR(mhpmevent29, CSR_MHPMEVENT29)
  1219. DECLARE_CSR(mhpmevent30, CSR_MHPMEVENT30)
  1220. DECLARE_CSR(mhpmevent31, CSR_MHPMEVENT31)
  1221. DECLARE_CSR(mvendorid, CSR_MVENDORID)
  1222. DECLARE_CSR(marchid, CSR_MARCHID)
  1223. DECLARE_CSR(mimpid, CSR_MIMPID)
  1224. DECLARE_CSR(mhartid, CSR_MHARTID)
  1225. DECLARE_CSR(cycleh, CSR_CYCLEH)
  1226. DECLARE_CSR(timeh, CSR_TIMEH)
  1227. DECLARE_CSR(instreth, CSR_INSTRETH)
  1228. DECLARE_CSR(hpmcounter3h, CSR_HPMCOUNTER3H)
  1229. DECLARE_CSR(hpmcounter4h, CSR_HPMCOUNTER4H)
  1230. DECLARE_CSR(hpmcounter5h, CSR_HPMCOUNTER5H)
  1231. DECLARE_CSR(hpmcounter6h, CSR_HPMCOUNTER6H)
  1232. DECLARE_CSR(hpmcounter7h, CSR_HPMCOUNTER7H)
  1233. DECLARE_CSR(hpmcounter8h, CSR_HPMCOUNTER8H)
  1234. DECLARE_CSR(hpmcounter9h, CSR_HPMCOUNTER9H)
  1235. DECLARE_CSR(hpmcounter10h, CSR_HPMCOUNTER10H)
  1236. DECLARE_CSR(hpmcounter11h, CSR_HPMCOUNTER11H)
  1237. DECLARE_CSR(hpmcounter12h, CSR_HPMCOUNTER12H)
  1238. DECLARE_CSR(hpmcounter13h, CSR_HPMCOUNTER13H)
  1239. DECLARE_CSR(hpmcounter14h, CSR_HPMCOUNTER14H)
  1240. DECLARE_CSR(hpmcounter15h, CSR_HPMCOUNTER15H)
  1241. DECLARE_CSR(hpmcounter16h, CSR_HPMCOUNTER16H)
  1242. DECLARE_CSR(hpmcounter17h, CSR_HPMCOUNTER17H)
  1243. DECLARE_CSR(hpmcounter18h, CSR_HPMCOUNTER18H)
  1244. DECLARE_CSR(hpmcounter19h, CSR_HPMCOUNTER19H)
  1245. DECLARE_CSR(hpmcounter20h, CSR_HPMCOUNTER20H)
  1246. DECLARE_CSR(hpmcounter21h, CSR_HPMCOUNTER21H)
  1247. DECLARE_CSR(hpmcounter22h, CSR_HPMCOUNTER22H)
  1248. DECLARE_CSR(hpmcounter23h, CSR_HPMCOUNTER23H)
  1249. DECLARE_CSR(hpmcounter24h, CSR_HPMCOUNTER24H)
  1250. DECLARE_CSR(hpmcounter25h, CSR_HPMCOUNTER25H)
  1251. DECLARE_CSR(hpmcounter26h, CSR_HPMCOUNTER26H)
  1252. DECLARE_CSR(hpmcounter27h, CSR_HPMCOUNTER27H)
  1253. DECLARE_CSR(hpmcounter28h, CSR_HPMCOUNTER28H)
  1254. DECLARE_CSR(hpmcounter29h, CSR_HPMCOUNTER29H)
  1255. DECLARE_CSR(hpmcounter30h, CSR_HPMCOUNTER30H)
  1256. DECLARE_CSR(hpmcounter31h, CSR_HPMCOUNTER31H)
  1257. DECLARE_CSR(mcycleh, CSR_MCYCLEH)
  1258. DECLARE_CSR(minstreth, CSR_MINSTRETH)
  1259. DECLARE_CSR(mhpmcounter3h, CSR_MHPMCOUNTER3H)
  1260. DECLARE_CSR(mhpmcounter4h, CSR_MHPMCOUNTER4H)
  1261. DECLARE_CSR(mhpmcounter5h, CSR_MHPMCOUNTER5H)
  1262. DECLARE_CSR(mhpmcounter6h, CSR_MHPMCOUNTER6H)
  1263. DECLARE_CSR(mhpmcounter7h, CSR_MHPMCOUNTER7H)
  1264. DECLARE_CSR(mhpmcounter8h, CSR_MHPMCOUNTER8H)
  1265. DECLARE_CSR(mhpmcounter9h, CSR_MHPMCOUNTER9H)
  1266. DECLARE_CSR(mhpmcounter10h, CSR_MHPMCOUNTER10H)
  1267. DECLARE_CSR(mhpmcounter11h, CSR_MHPMCOUNTER11H)
  1268. DECLARE_CSR(mhpmcounter12h, CSR_MHPMCOUNTER12H)
  1269. DECLARE_CSR(mhpmcounter13h, CSR_MHPMCOUNTER13H)
  1270. DECLARE_CSR(mhpmcounter14h, CSR_MHPMCOUNTER14H)
  1271. DECLARE_CSR(mhpmcounter15h, CSR_MHPMCOUNTER15H)
  1272. DECLARE_CSR(mhpmcounter16h, CSR_MHPMCOUNTER16H)
  1273. DECLARE_CSR(mhpmcounter17h, CSR_MHPMCOUNTER17H)
  1274. DECLARE_CSR(mhpmcounter18h, CSR_MHPMCOUNTER18H)
  1275. DECLARE_CSR(mhpmcounter19h, CSR_MHPMCOUNTER19H)
  1276. DECLARE_CSR(mhpmcounter20h, CSR_MHPMCOUNTER20H)
  1277. DECLARE_CSR(mhpmcounter21h, CSR_MHPMCOUNTER21H)
  1278. DECLARE_CSR(mhpmcounter22h, CSR_MHPMCOUNTER22H)
  1279. DECLARE_CSR(mhpmcounter23h, CSR_MHPMCOUNTER23H)
  1280. DECLARE_CSR(mhpmcounter24h, CSR_MHPMCOUNTER24H)
  1281. DECLARE_CSR(mhpmcounter25h, CSR_MHPMCOUNTER25H)
  1282. DECLARE_CSR(mhpmcounter26h, CSR_MHPMCOUNTER26H)
  1283. DECLARE_CSR(mhpmcounter27h, CSR_MHPMCOUNTER27H)
  1284. DECLARE_CSR(mhpmcounter28h, CSR_MHPMCOUNTER28H)
  1285. DECLARE_CSR(mhpmcounter29h, CSR_MHPMCOUNTER29H)
  1286. DECLARE_CSR(mhpmcounter30h, CSR_MHPMCOUNTER30H)
  1287. DECLARE_CSR(mhpmcounter31h, CSR_MHPMCOUNTER31H)
  1288. #endif
  1289. #ifdef DECLARE_CAUSE
  1290. DECLARE_CAUSE("misaligned fetch", CAUSE_MISALIGNED_FETCH)
  1291. DECLARE_CAUSE("fault fetch", CAUSE_FAULT_FETCH)
  1292. DECLARE_CAUSE("illegal instruction", CAUSE_ILLEGAL_INSTRUCTION)
  1293. DECLARE_CAUSE("breakpoint", CAUSE_BREAKPOINT)
  1294. DECLARE_CAUSE("misaligned load", CAUSE_MISALIGNED_LOAD)
  1295. DECLARE_CAUSE("fault load", CAUSE_FAULT_LOAD)
  1296. DECLARE_CAUSE("misaligned store", CAUSE_MISALIGNED_STORE)
  1297. DECLARE_CAUSE("fault store", CAUSE_FAULT_STORE)
  1298. DECLARE_CAUSE("user_ecall", CAUSE_USER_ECALL)
  1299. DECLARE_CAUSE("supervisor_ecall", CAUSE_SUPERVISOR_ECALL)
  1300. DECLARE_CAUSE("hypervisor_ecall", CAUSE_HYPERVISOR_ECALL)
  1301. DECLARE_CAUSE("machine_ecall", CAUSE_MACHINE_ECALL)
  1302. #endif