raven.c 2.5 KB

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  1. /*
  2. * ``Nevermore!''
  3. */
  4. #include "u.h"
  5. #include "../port/lib.h"
  6. #include "mem.h"
  7. #include "dat.h"
  8. #include "fns.h"
  9. #include "io.h"
  10. typedef struct Raven Raven;
  11. struct Raven
  12. {
  13. ushort vid;
  14. ushort did;
  15. uchar _pad4;
  16. uchar rev;
  17. uchar _pad6[2];
  18. ushort gcsr;
  19. ushort feat;
  20. uchar _padC[7];
  21. uchar padj;
  22. uchar _pad14[12];
  23. ushort errtst;
  24. ushort erren;
  25. uchar _pad24[3];
  26. uchar errst;
  27. ulong errad;
  28. uchar _pad2C[2];
  29. ushort errat;
  30. ulong piack;
  31. uchar _pad34[12];
  32. struct {
  33. ushort start;
  34. ushort end;
  35. ushort off;
  36. uchar _pad;
  37. uchar attr;
  38. } map[4];
  39. struct {
  40. ulong cntl;
  41. uchar _pad[3];
  42. uchar stat;
  43. } wdt[2];
  44. ulong gpr[4];
  45. };
  46. enum {
  47. /* map[] attr bits */
  48. Iom = (1<<0),
  49. Mem = (1<<1),
  50. Wpen = (1<<4),
  51. Wen = (1<<6),
  52. Ren = (1<<7),
  53. };
  54. static Raven *raven = (Raven*)RAVEN;
  55. static ulong mpic;
  56. static void
  57. setmap(int i, ulong addr, ulong len, ulong busaddr, int attr)
  58. {
  59. raven->map[i].start = addr>>16;
  60. raven->map[i].end = (addr+len-1)>>16;
  61. raven->map[i].off = (busaddr-addr)>>16;
  62. raven->map[i].attr = attr;
  63. }
  64. static ulong
  65. swap32(ulong x)
  66. {
  67. return (x>>24)|((x>>8)&0xff00)|((x<<8)&0xff0000)|(x<<24);
  68. }
  69. static ulong
  70. mpic32r(int rno)
  71. {
  72. return swap32(*(ulong*)(mpic+rno));
  73. }
  74. static void
  75. mpic32w(int rno, ulong x)
  76. {
  77. *(ulong*)(mpic+rno) = swap32(x);
  78. eieio();
  79. }
  80. void
  81. raveninit(void)
  82. {
  83. int i;
  84. Pcidev *p;
  85. if(raven->vid != 0x1057 || raven->did !=0x4801)
  86. panic("raven not found");
  87. /* set up a sensible hardware memory/IO map */
  88. setmap(0, PCIMEM0, PCISIZE0, 0, Wen|Ren|Mem);
  89. setmap(1, KZERO, IOSIZE, 0, Wen|Ren); /* keeps PPCbug happy */
  90. setmap(2, PCIMEM1, PCISIZE1, PCISIZE0, Wen|Ren|Mem);
  91. setmap(3, IOMEM, IOSIZE, 0, Wen|Ren); /* I/O must be slot 3 for PCI cfg space */
  92. p = pcimatch(nil, 0x1057, 0x4801);
  93. if(p == nil)
  94. panic("raven PCI regs not found");
  95. mpic = (p->mem[1].bar+PCIMEM0);
  96. /* ensure all interrupts are off, and routed to cpu 0 */
  97. for(i = 0; i < 16; i++) {
  98. mpic32w(0x10000+0x20*i, (1<<31)); /* mask */
  99. mpic32w(0x10010+0x20*i, 1); /* route to cpu 0 */
  100. }
  101. mpic32w(0x20080, 1); /* cpu 0 task pri */
  102. // mpic32w(0x21080, 1); /* cpu 1 task pri */
  103. mpic32w(0x1020, (1<<29)); /* Mixed mode (8259 & Raven intrs both available) */
  104. }
  105. void
  106. mpicenable(int vec, Vctl *v)
  107. {
  108. ulong x;
  109. x = (1<<22)|(15<<16)|vec;
  110. if(vec == 0)
  111. x |= (1<<23);
  112. mpic32w(0x10000+0x20*vec, x);
  113. if(vec != 0)
  114. v->eoi = mpiceoi;
  115. }
  116. void
  117. mpicdisable(int vec)
  118. {
  119. mpic32w(0x10000+0x20*vec, (1<<31));
  120. }
  121. int
  122. mpicintack(void)
  123. {
  124. return mpic32r(0x200A0 + (m->machno<<12));
  125. }
  126. int
  127. mpiceoi(int vec)
  128. {
  129. USED(vec);
  130. mpic32w(0x200B0 + (m->machno<<12), 0);
  131. return 0;
  132. }