apic.c 8.8 KB

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  1. #include "u.h"
  2. #include "../port/lib.h"
  3. #include "mem.h"
  4. #include "dat.h"
  5. #include "fns.h"
  6. #include "io.h"
  7. #include "mp.h"
  8. enum { /* Local APIC registers */
  9. LapicID = 0x0020, /* ID */
  10. LapicVER = 0x0030, /* Version */
  11. LapicTPR = 0x0080, /* Task Priority */
  12. LapicAPR = 0x0090, /* Arbitration Priority */
  13. LapicPPR = 0x00A0, /* Processor Priority */
  14. LapicEOI = 0x00B0, /* EOI */
  15. LapicLDR = 0x00D0, /* Logical Destination */
  16. LapicDFR = 0x00E0, /* Destination Format */
  17. LapicSVR = 0x00F0, /* Spurious Interrupt Vector */
  18. LapicISR = 0x0100, /* Interrupt Status (8 registers) */
  19. LapicTMR = 0x0180, /* Trigger Mode (8 registers) */
  20. LapicIRR = 0x0200, /* Interrupt Request (8 registers) */
  21. LapicESR = 0x0280, /* Error Status */
  22. LapicICRLO = 0x0300, /* Interrupt Command */
  23. LapicICRHI = 0x0310, /* Interrupt Command [63:32] */
  24. LapicTIMER = 0x0320, /* Local Vector Table 0 (TIMER) */
  25. LapicPCINT = 0x0340, /* Performance Counter LVT */
  26. LapicLINT0 = 0x0350, /* Local Vector Table 1 (LINT0) */
  27. LapicLINT1 = 0x0360, /* Local Vector Table 2 (LINT1) */
  28. LapicERROR = 0x0370, /* Local Vector Table 3 (ERROR) */
  29. LapicTICR = 0x0380, /* Timer Initial Count */
  30. LapicTCCR = 0x0390, /* Timer Current Count */
  31. LapicTDCR = 0x03E0, /* Timer Divide Configuration */
  32. };
  33. enum { /* LapicSVR */
  34. LapicENABLE = 0x00000100, /* Unit Enable */
  35. LapicFOCUS = 0x00000200, /* Focus Processor Checking Disable */
  36. };
  37. enum { /* LapicICRLO */
  38. /* [14] IPI Trigger Mode Level (RW) */
  39. LapicDEASSERT = 0x00000000, /* Deassert level-sensitive interrupt */
  40. LapicASSERT = 0x00004000, /* Assert level-sensitive interrupt */
  41. /* [17:16] Remote Read Status */
  42. LapicINVALID = 0x00000000, /* Invalid */
  43. LapicWAIT = 0x00010000, /* In-Progress */
  44. LapicVALID = 0x00020000, /* Valid */
  45. /* [19:18] Destination Shorthand */
  46. LapicFIELD = 0x00000000, /* No shorthand */
  47. LapicSELF = 0x00040000, /* Self is single destination */
  48. LapicALLINC = 0x00080000, /* All including self */
  49. LapicALLEXC = 0x000C0000, /* All Excluding self */
  50. };
  51. enum { /* LapicESR */
  52. LapicSENDCS = 0x00000001, /* Send CS Error */
  53. LapicRCVCS = 0x00000002, /* Receive CS Error */
  54. LapicSENDACCEPT = 0x00000004, /* Send Accept Error */
  55. LapicRCVACCEPT = 0x00000008, /* Receive Accept Error */
  56. LapicSENDVECTOR = 0x00000020, /* Send Illegal Vector */
  57. LapicRCVVECTOR = 0x00000040, /* Receive Illegal Vector */
  58. LapicREGISTER = 0x00000080, /* Illegal Register Address */
  59. };
  60. enum { /* LapicTIMER */
  61. /* [17] Timer Mode (RW) */
  62. LapicONESHOT = 0x00000000, /* One-shot */
  63. LapicPERIODIC = 0x00020000, /* Periodic */
  64. /* [19:18] Timer Base (RW) */
  65. LapicCLKIN = 0x00000000, /* use CLKIN as input */
  66. LapicTMBASE = 0x00040000, /* use TMBASE */
  67. LapicDIVIDER = 0x00080000, /* use output of the divider */
  68. };
  69. enum { /* LapicTDCR */
  70. LapicX2 = 0x00000000, /* divide by 2 */
  71. LapicX4 = 0x00000001, /* divide by 4 */
  72. LapicX8 = 0x00000002, /* divide by 8 */
  73. LapicX16 = 0x00000003, /* divide by 16 */
  74. LapicX32 = 0x00000008, /* divide by 32 */
  75. LapicX64 = 0x00000009, /* divide by 64 */
  76. LapicX128 = 0x0000000A, /* divide by 128 */
  77. LapicX1 = 0x0000000B, /* divide by 1 */
  78. };
  79. static ulong* lapicbase;
  80. struct
  81. {
  82. uvlong hz;
  83. ulong max;
  84. ulong min;
  85. ulong div;
  86. } lapictimer;
  87. static ulong
  88. lapicr(int r)
  89. {
  90. return *(lapicbase+(r/sizeof(*lapicbase)));
  91. }
  92. static void
  93. lapicw(int r, ulong data)
  94. {
  95. *(lapicbase+(r/sizeof(*lapicbase))) = data;
  96. data = *(lapicbase+(LapicID/sizeof(*lapicbase)));
  97. USED(data);
  98. }
  99. void
  100. lapiconline(void)
  101. {
  102. /*
  103. * Reload the timer to de-synchronise the processors,
  104. * then lower the task priority to allow interrupts to be
  105. * accepted by the APIC.
  106. */
  107. microdelay((TK2MS(1)*1000/conf.nmach) * m->machno);
  108. lapicw(LapicTICR, lapictimer.max);
  109. lapicw(LapicTIMER, LapicCLKIN|LapicPERIODIC|(VectorPIC+IrqTIMER));
  110. lapicw(LapicTPR, 0);
  111. }
  112. /*
  113. * use the i8253 clock to figure out our lapic timer rate.
  114. */
  115. static void
  116. lapictimerinit(void)
  117. {
  118. uvlong x, v, hz;
  119. v = m->cpuhz/1000;
  120. lapicw(LapicTDCR, LapicX1);
  121. lapicw(LapicTIMER, ApicIMASK|LapicCLKIN|LapicONESHOT|(VectorPIC+IrqTIMER));
  122. if(lapictimer.hz == 0ULL){
  123. x = fastticks(&hz);
  124. x += hz/10;
  125. lapicw(LapicTICR, 0xffffffff);
  126. do{
  127. v = fastticks(nil);
  128. }while(v < x);
  129. lapictimer.hz = (0xffffffffUL-lapicr(LapicTCCR))*10;
  130. lapictimer.max = lapictimer.hz/HZ;
  131. lapictimer.min = lapictimer.hz/(100*HZ);
  132. if(lapictimer.hz > hz-(hz/10)){
  133. if(lapictimer.hz > hz+(hz/10))
  134. panic("lapic clock %lld > cpu clock > %lld\n",
  135. lapictimer.hz, hz);
  136. lapictimer.hz = hz;
  137. }
  138. lapictimer.div = hz/lapictimer.hz;
  139. }
  140. }
  141. void
  142. lapicinit(Apic* apic)
  143. {
  144. ulong r, lvt;
  145. if(lapicbase == 0)
  146. lapicbase = apic->addr;
  147. lapicw(LapicDFR, 0xFFFFFFFF);
  148. r = (lapicr(LapicID)>>24) & 0xFF;
  149. lapicw(LapicLDR, (1<<r)<<24);
  150. lapicw(LapicTPR, 0xFF);
  151. lapicw(LapicSVR, LapicENABLE|(VectorPIC+IrqSPURIOUS));
  152. lapictimerinit();
  153. /*
  154. * Some Pentium revisions have a bug whereby spurious
  155. * interrupts are generated in the through-local mode.
  156. */
  157. switch(m->cpuidax & 0xFFF){
  158. case 0x526: /* stepping cB1 */
  159. case 0x52B: /* stepping E0 */
  160. case 0x52C: /* stepping cC0 */
  161. wrmsr(0x0E, 1<<14); /* TR12 */
  162. break;
  163. }
  164. /*
  165. * Set the local interrupts. It's likely these should just be
  166. * masked off for SMP mode as some Pentium Pros have problems if
  167. * LINT[01] are set to ExtINT.
  168. * Acknowledge any outstanding interrupts.
  169. lapicw(LapicLINT0, apic->lintr[0]);
  170. lapicw(LapicLINT1, apic->lintr[1]);
  171. */
  172. lapiceoi(0);
  173. lvt = (lapicr(LapicVER)>>16) & 0xFF;
  174. if(lvt >= 4)
  175. lapicw(LapicPCINT, ApicIMASK);
  176. lapicw(LapicERROR, VectorPIC+IrqERROR);
  177. lapicw(LapicESR, 0);
  178. lapicr(LapicESR);
  179. /*
  180. * Issue an INIT Level De-Assert to synchronise arbitration ID's.
  181. */
  182. lapicw(LapicICRHI, 0);
  183. lapicw(LapicICRLO, LapicALLINC|ApicLEVEL|LapicDEASSERT|ApicINIT);
  184. while(lapicr(LapicICRLO) & ApicDELIVS)
  185. ;
  186. /*
  187. * Do not allow acceptance of interrupts until all initialisation
  188. * for this processor is done. For the bootstrap processor this can be
  189. * early duing initialisation. For the application processors this should
  190. * be after the bootstrap processor has lowered priority and is accepting
  191. * interrupts.
  192. lapicw(LapicTPR, 0);
  193. */
  194. }
  195. void
  196. lapicstartap(Apic* apic, int v)
  197. {
  198. int i;
  199. ulong crhi;
  200. crhi = apic->apicno<<24;
  201. lapicw(LapicICRHI, crhi);
  202. lapicw(LapicICRLO, LapicFIELD|ApicLEVEL|LapicASSERT|ApicINIT);
  203. microdelay(200);
  204. lapicw(LapicICRLO, LapicFIELD|ApicLEVEL|LapicDEASSERT|ApicINIT);
  205. delay(10);
  206. for(i = 0; i < 2; i++){
  207. lapicw(LapicICRHI, crhi);
  208. lapicw(LapicICRLO, LapicFIELD|ApicEDGE|ApicSTARTUP|(v/BY2PG));
  209. microdelay(200);
  210. }
  211. }
  212. void
  213. lapicerror(Ureg*, void*)
  214. {
  215. ulong esr;
  216. lapicw(LapicESR, 0);
  217. esr = lapicr(LapicESR);
  218. switch(m->cpuidax & 0xFFF){
  219. case 0x526: /* stepping cB1 */
  220. case 0x52B: /* stepping E0 */
  221. case 0x52C: /* stepping cC0 */
  222. return;
  223. }
  224. print("cpu%d: lapicerror: 0x%8.8luX\n", m->machno, esr);
  225. }
  226. void
  227. lapicspurious(Ureg*, void*)
  228. {
  229. print("cpu%d: lapicspurious\n", m->machno);
  230. }
  231. int
  232. lapicisr(int v)
  233. {
  234. ulong isr;
  235. isr = lapicr(LapicISR + (v/32));
  236. return isr & (1<<(v%32));
  237. }
  238. int
  239. lapiceoi(int v)
  240. {
  241. lapicw(LapicEOI, 0);
  242. return v;
  243. }
  244. void
  245. lapicicrw(ulong hi, ulong lo)
  246. {
  247. lapicw(LapicICRHI, hi);
  248. lapicw(LapicICRLO, lo);
  249. }
  250. void
  251. ioapicrdtr(Apic* apic, int sel, int* hi, int* lo)
  252. {
  253. ulong *iowin;
  254. iowin = apic->addr+(0x10/sizeof(ulong));
  255. sel = IoapicRDT + 2*sel;
  256. lock(apic);
  257. *apic->addr = sel+1;
  258. if(hi)
  259. *hi = *iowin;
  260. *apic->addr = sel;
  261. if(lo)
  262. *lo = *iowin;
  263. unlock(apic);
  264. }
  265. void
  266. ioapicrdtw(Apic* apic, int sel, int hi, int lo)
  267. {
  268. ulong *iowin;
  269. iowin = apic->addr+(0x10/sizeof(ulong));
  270. sel = IoapicRDT + 2*sel;
  271. lock(apic);
  272. *apic->addr = sel+1;
  273. *iowin = hi;
  274. *apic->addr = sel;
  275. *iowin = lo;
  276. unlock(apic);
  277. }
  278. void
  279. ioapicinit(Apic* apic, int apicno)
  280. {
  281. int hi, lo, v;
  282. ulong *iowin;
  283. /*
  284. * Initialise the I/O APIC.
  285. * The MultiProcessor Specification says it is the responsibility
  286. * of the O/S to set the APIC id.
  287. * Make sure interrupts are all masked off for now.
  288. */
  289. iowin = apic->addr+(0x10/sizeof(ulong));
  290. lock(apic);
  291. *apic->addr = IoapicVER;
  292. apic->mre = (*iowin>>16) & 0xFF;
  293. *apic->addr = IoapicID;
  294. *iowin = apicno<<24;
  295. unlock(apic);
  296. hi = 0;
  297. lo = ApicIMASK;
  298. for(v = 0; v <= apic->mre; v++)
  299. ioapicrdtw(apic, v, hi, lo);
  300. }
  301. void
  302. lapictimerset(uvlong next)
  303. {
  304. vlong period;
  305. int x;
  306. x = splhi();
  307. lock(&m->apictimerlock);
  308. period = lapictimer.max;
  309. if(next != 0){
  310. period = next - fastticks(nil);
  311. period /= lapictimer.div;
  312. if(period < lapictimer.min)
  313. period = lapictimer.min;
  314. else if(period > lapictimer.max - lapictimer.min)
  315. period = lapictimer.max;
  316. }
  317. lapicw(LapicTICR, period);
  318. unlock(&m->apictimerlock);
  319. splx(x);
  320. }
  321. void
  322. lapicclock(Ureg *u, void*)
  323. {
  324. timerintr(u, 0);
  325. }
  326. void
  327. lapicintron(void)
  328. {
  329. lapicw(LapicTPR, 0);
  330. }
  331. void
  332. lapicintroff(void)
  333. {
  334. lapicw(LapicTPR, 0xFF);
  335. }
  336. void
  337. lapicnmienable(void)
  338. {
  339. lapicw(LapicPCINT, ApicNMI);
  340. }
  341. void
  342. lapicnmidisable(void)
  343. {
  344. lapicw(LapicPCINT, ApicIMASK);
  345. }