ethermii.h 3.2 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116
  1. typedef struct Mii Mii;
  2. typedef struct MiiPhy MiiPhy;
  3. enum { /* registers */
  4. Bmcr = 0x00, /* Basic Mode Control */
  5. Bmsr = 0x01, /* Basic Mode Status */
  6. Phyidr1 = 0x02, /* PHY Identifier #1 */
  7. Phyidr2 = 0x03, /* PHY Identifier #2 */
  8. Anar = 0x04, /* Auto-Negotiation Advertisement */
  9. Anlpar = 0x05, /* AN Link Partner Ability */
  10. Aner = 0x06, /* AN Expansion */
  11. Annptr = 0x07, /* AN Next Page TX */
  12. Annprr = 0x08, /* AN Next Page RX */
  13. Mscr = 0x09, /* MASTER-SLAVE Control */
  14. Mssr = 0x0A, /* MASTER-SLAVE Status */
  15. Esr = 0x0F, /* Extended Status */
  16. NMiiPhyr = 32,
  17. NMiiPhy = 32,
  18. };
  19. enum { /* Bmcr */
  20. BmcrSs1 = 0x0040, /* Speed Select[1] */
  21. BmcrCte = 0x0080, /* Collision Test Enable */
  22. BmcrDm = 0x0100, /* Duplex Mode */
  23. BmcrRan = 0x0200, /* Restart Auto-Negotiation */
  24. BmcrI = 0x0400, /* Isolate */
  25. BmcrPd = 0x0800, /* Power Down */
  26. BmcrAne = 0x1000, /* Auto-Negotiation Enable */
  27. BmcrSs0 = 0x2000, /* Speed Select[0] */
  28. BmcrLe = 0x4000, /* Loopback Enable */
  29. BmcrR = 0x8000, /* Reset */
  30. };
  31. enum { /* Bmsr */
  32. BmsrEc = 0x0001, /* Extended Capability */
  33. BmsrJd = 0x0002, /* Jabber Detect */
  34. BmsrLs = 0x0004, /* Link Status */
  35. BmsrAna = 0x0008, /* Auto-Negotiation Ability */
  36. BmsrRf = 0x0010, /* Remote Fault */
  37. BmsrAnc = 0x0020, /* Auto-Negotiation Complete */
  38. BmsrPs = 0x0040, /* Preamble Suppression Capable */
  39. BmsrEs = 0x0100, /* Extended Status */
  40. Bmsr100T2HD = 0x0200, /* 100BASE-T2 HD Capable */
  41. Bmsr100T2FD = 0x0400, /* 100BASE-T2 FD Capable */
  42. Bmsr10THD = 0x0800, /* 10BASE-T HD Capable */
  43. Bmsr10TFD = 0x1000, /* 10BASE-T FD Capable */
  44. Bmsr100TXHD = 0x2000, /* 100BASE-TX HD Capable */
  45. Bmsr100TXFD = 0x4000, /* 100BASE-TX FD Capable */
  46. Bmsr100T4 = 0x8000, /* 100BASE-T4 Capable */
  47. };
  48. enum { /* Anar/Anlpar */
  49. Ana10HD = 0x0020, /* Advertise 10BASE-T */
  50. Ana10FD = 0x0040, /* Advertise 10BASE-T FD */
  51. AnaTXHD = 0x0080, /* Advertise 100BASE-TX */
  52. AnaTXFD = 0x0100, /* Advertise 100BASE-TX FD */
  53. AnaT4 = 0x0200, /* Advertise 100BASE-T4 */
  54. AnaP = 0x0400, /* Pause */
  55. AnaAP = 0x0800, /* Asymmetrical Pause */
  56. AnaRf = 0x2000, /* Remote Fault */
  57. AnaAck = 0x4000, /* Acknowledge */
  58. AnaNp = 0x8000, /* Next Page Indication */
  59. };
  60. enum { /* Mscr */
  61. Mscr1000THD = 0x0100, /* Advertise 1000BASE-T HD */
  62. Mscr1000TFD = 0x0200, /* Advertise 1000BASE-T FD */
  63. };
  64. enum { /* Mssr */
  65. Mssr1000THD = 0x0400, /* Link Partner 1000BASE-T HD able */
  66. Mssr1000TFD = 0x0800, /* Link Partner 1000BASE-T FD able */
  67. };
  68. enum { /* Esr */
  69. Esr1000THD = 0x1000, /* 1000BASE-T HD Capable */
  70. Esr1000TFD = 0x2000, /* 1000BASE-T FD Capable */
  71. Esr1000XHD = 0x4000, /* 1000BASE-X HD Capable */
  72. Esr1000XFD = 0x8000, /* 1000BASE-X FD Capable */
  73. };
  74. typedef struct Mii {
  75. Lock;
  76. int nphy;
  77. int mask;
  78. MiiPhy* phy[NMiiPhy];
  79. MiiPhy* curphy;
  80. void* ctlr;
  81. int (*mir)(Mii*, int, int);
  82. int (*miw)(Mii*, int, int, int);
  83. } Mii;
  84. typedef struct MiiPhy {
  85. Mii* mii;
  86. int oui;
  87. int phyno;
  88. int anar;
  89. int fc;
  90. int mscr;
  91. int link;
  92. int speed;
  93. int fd;
  94. int rfc;
  95. int tfc;
  96. };
  97. extern int mii(Mii*, int);
  98. extern int miiane(Mii*, int, int, int);
  99. extern int miimir(Mii*, int);
  100. extern int miimiw(Mii*, int, int);
  101. extern int miireset(Mii*);
  102. extern int miistatus(Mii*);