dat.h 6.1 KB

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  1. typedef struct Conf Conf;
  2. typedef struct FPsave FPsave;
  3. typedef struct ISAConf ISAConf;
  4. typedef struct Label Label;
  5. typedef struct Lock Lock;
  6. typedef struct MMU MMU;
  7. typedef struct Mach Mach;
  8. typedef struct Notsave Notsave;
  9. typedef struct PCArch PCArch;
  10. typedef struct Pcidev Pcidev;
  11. typedef struct PCMmap PCMmap;
  12. typedef struct PCMslot PCMslot;
  13. typedef struct Page Page;
  14. typedef struct PMMU PMMU;
  15. typedef struct Proc Proc;
  16. typedef struct Segdesc Segdesc;
  17. typedef struct Ureg Ureg;
  18. typedef struct Vctl Vctl;
  19. #pragma incomplete Ureg
  20. #define MAXSYSARG 5 /* for mount(fd, afd, mpt, flag, arg) */
  21. /*
  22. * parameters for sysproc.c
  23. */
  24. #define AOUT_MAGIC (I_MAGIC)
  25. struct Lock
  26. {
  27. ulong key;
  28. ulong sr;
  29. ulong pc;
  30. Proc *p;
  31. ushort isilock;
  32. };
  33. struct Label
  34. {
  35. ulong sp;
  36. ulong pc;
  37. };
  38. /*
  39. * FPsave.status
  40. */
  41. enum
  42. {
  43. /* this is a state */
  44. FPinit= 0,
  45. FPactive= 1,
  46. FPinactive= 2,
  47. /* the following is a bit that can be or'd into the state */
  48. FPillegal= 0x100,
  49. };
  50. struct FPsave
  51. {
  52. ushort control;
  53. ushort r1;
  54. ushort status;
  55. ushort r2;
  56. ushort tag;
  57. ushort r3;
  58. ulong pc;
  59. ushort selector;
  60. ushort r4;
  61. ulong operand;
  62. ushort oselector;
  63. ushort r5;
  64. uchar regs[80]; /* floating point registers */
  65. };
  66. struct Conf
  67. {
  68. ulong nmach; /* processors */
  69. ulong nproc; /* processes */
  70. ulong monitor; /* has monitor? */
  71. ulong npage0; /* total physical pages of memory */
  72. ulong npage1; /* total physical pages of memory */
  73. ulong npage; /* total physical pages of memory */
  74. ulong upages; /* user page pool */
  75. ulong nimage; /* number of page cache image headers */
  76. ulong nswap; /* number of swap pages */
  77. int nswppo; /* max # of pageouts per segment pass */
  78. ulong base0; /* base of bank 0 */
  79. ulong base1; /* base of bank 1 */
  80. ulong copymode; /* 0 is copy on write, 1 is copy on reference */
  81. ulong ialloc; /* max interrupt time allocation in bytes */
  82. ulong pipeqsize; /* size in bytes of pipe queues */
  83. int nuart; /* number of uart devices */
  84. };
  85. /*
  86. * MMU stuff in proc
  87. */
  88. #define NCOLOR 1
  89. struct PMMU
  90. {
  91. Page* mmupdb; /* page directory base */
  92. Page* mmufree; /* unused page table pages */
  93. Page* mmuused; /* used page table pages */
  94. };
  95. /*
  96. * things saved in the Proc structure during a notify
  97. */
  98. struct Notsave
  99. {
  100. ulong svflags;
  101. ulong svcs;
  102. ulong svss;
  103. };
  104. #include "../port/portdat.h"
  105. typedef struct {
  106. ulong link; /* link (old TSS selector) */
  107. ulong esp0; /* privilege level 0 stack pointer */
  108. ulong ss0; /* privilege level 0 stack selector */
  109. ulong esp1; /* privilege level 1 stack pointer */
  110. ulong ss1; /* privilege level 1 stack selector */
  111. ulong esp2; /* privilege level 2 stack pointer */
  112. ulong ss2; /* privilege level 2 stack selector */
  113. ulong cr3; /* page directory base register */
  114. ulong eip; /* instruction pointer */
  115. ulong eflags; /* flags register */
  116. ulong eax; /* general registers */
  117. ulong ecx;
  118. ulong edx;
  119. ulong ebx;
  120. ulong esp;
  121. ulong ebp;
  122. ulong esi;
  123. ulong edi;
  124. ulong es; /* segment selectors */
  125. ulong cs;
  126. ulong ss;
  127. ulong ds;
  128. ulong fs;
  129. ulong gs;
  130. ulong ldt; /* selector for task's LDT */
  131. ulong iomap; /* I/O map base address + T-bit */
  132. } Tss;
  133. struct Segdesc
  134. {
  135. ulong d0;
  136. ulong d1;
  137. };
  138. struct Mach
  139. {
  140. int machno; /* physical id of processor (KNOWN TO ASSEMBLY) */
  141. ulong splpc; /* pc of last caller to splhi */
  142. ulong* pdb; /* page directory base for this processor (va) */
  143. Tss* tss; /* tss for this processor */
  144. Segdesc *gdt; /* gdt for this processor */
  145. Proc* proc; /* current process on this processor */
  146. Proc* externup; /* extern register Proc *up */
  147. Page* pdbpool;
  148. int pdbcnt;
  149. ulong ticks; /* of the clock since boot time */
  150. Label sched; /* scheduler wakeup */
  151. Lock alarmlock; /* access to alarm list */
  152. void* alarm; /* alarms bound to this clock */
  153. int inclockintr;
  154. Proc* readied; /* for runproc */
  155. ulong schedticks; /* next forced context switch */
  156. int tlbfault;
  157. int tlbpurge;
  158. int pfault;
  159. int cs;
  160. int syscall;
  161. int load;
  162. int intr;
  163. int flushmmu; /* make current proc flush it's mmu state */
  164. int ilockdepth;
  165. Perf perf; /* performance counters */
  166. ulong spuriousintr;
  167. int lastintr;
  168. int loopconst;
  169. Lock apictimerlock;
  170. int cpumhz;
  171. uvlong cyclefreq; /* Frequency of user readable cycle counter */
  172. uvlong cpuhz;
  173. int cpuidax;
  174. int cpuiddx;
  175. char cpuidid[16];
  176. char* cpuidtype;
  177. int havetsc;
  178. int havepge;
  179. uvlong tscticks;
  180. vlong mtrrcap;
  181. vlong mtrrdef;
  182. vlong mtrrfix[11];
  183. vlong mtrrvar[32]; /* 256 max. */
  184. int stack[1];
  185. };
  186. /*
  187. * Fake kmap
  188. */
  189. typedef void KMap;
  190. #define VA(k) ((ulong)(k))
  191. #define kmap(p) (KMap*)((p)->pa|KZERO)
  192. #define kunmap(k)
  193. struct
  194. {
  195. Lock;
  196. int machs; /* bitmap of active CPUs */
  197. int exiting; /* shutdown */
  198. int ispanic; /* shutdown in response to a panic */
  199. int thunderbirdsarego; /* lets the added processors continue to schedinit */
  200. }active;
  201. /*
  202. * routines for things outside the PC model, like power management
  203. */
  204. struct PCArch
  205. {
  206. char* id;
  207. int (*ident)(void); /* this should be in the model */
  208. void (*reset)(void); /* this should be in the model */
  209. int (*serialpower)(int); /* 1 == on, 0 == off */
  210. int (*modempower)(int); /* 1 == on, 0 == off */
  211. void (*intrinit)(void);
  212. int (*intrenable)(Vctl*);
  213. int (*intrvecno)(int);
  214. int (*intrdisable)(int);
  215. void (*clockenable)(void);
  216. uvlong (*fastclock)(uvlong*);
  217. void (*timerset)(uvlong);
  218. };
  219. /*
  220. * a parsed plan9.ini line
  221. */
  222. #define NISAOPT 8
  223. struct ISAConf {
  224. char *type;
  225. ulong port;
  226. int irq;
  227. ulong dma;
  228. ulong mem;
  229. ulong size;
  230. ulong freq;
  231. int nopt;
  232. char *opt[NISAOPT];
  233. };
  234. extern PCArch *arch; /* PC architecture */
  235. /*
  236. * Each processor sees its own Mach structure at address MACHADDR.
  237. * However, the Mach structures must also be available via the per-processor
  238. * MMU information array machp, mainly for disambiguation and access to
  239. * the clock which is only maintained by the bootstrap processor (0).
  240. */
  241. Mach* machp[MAXMACH];
  242. #define MACHP(n) (machp[n])
  243. extern Mach *m;
  244. #define up (((Mach*)MACHADDR)->externup)
  245. /*
  246. * hardware info about a device
  247. */
  248. typedef struct {
  249. ulong port;
  250. int size;
  251. } Devport;
  252. struct DevConf
  253. {
  254. ulong intnum; /* interrupt number */
  255. char *type; /* card type, malloced */
  256. int nports; /* Number of ports */
  257. Devport *ports; /* The ports themselves */
  258. };