mga4xx.c 35 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788899091929394959697989910010110210310410510610710810911011111211311411511611711811912012112212312412512612712812913013113213313413513613713813914014114214314414514614714814915015115215315415515615715815916016116216316416516616716816917017117217317417517617717817918018118218318418518618718818919019119219319419519619719819920020120220320420520620720820921021121221321421521621721821922022122222322422522622722822923023123223323423523623723823924024124224324424524624724824925025125225325425525625725825926026126226326426526626726826927027127227327427527627727827928028128228328428528628728828929029129229329429529629729829930030130230330430530630730830931031131231331431531631731831932032132232332432532632732832933033133233333433533633733833934034134234334434534634734834935035135235335435535635735835936036136236336436536636736836937037137237337437537637737837938038138238338438538638738838939039139239339439539639739839940040140240340440540640740840941041141241341441541641741841942042142242342442542642742842943043143243343443543643743843944044144244344444544644744844945045145245345445545645745845946046146246346446546646746846947047147247347447547647747847948048148248348448548648748848949049149249349449549649749849950050150250350450550650750850951051151251351451551651751851952052152252352452552652752852953053153253353453553653753853954054154254354454554654754854955055155255355455555655755855956056156256356456556656756856957057157257357457557657757857958058158258358458558658758858959059159259359459559659759859960060160260360460560660760860961061161261361461561661761861962062162262362462562662762862963063163263363463563663763863964064164264364464564664764864965065165265365465565665765865966066166266366466566666766866967067167267367467567667767867968068168268368468568668768868969069169269369469569669769869970070170270370470570670770870971071171271371471571671771871972072172272372472572672772872973073173273373473573673773873974074174274374474574674774874975075175275375475575675775875976076176276376476576676776876977077177277377477577677777877978078178278378478578678778878979079179279379479579679779879980080180280380480580680780880981081181281381481581681781881982082182282382482582682782882983083183283383483583683783883984084184284384484584684784884985085185285385485585685785885986086186286386486586686786886987087187287387487587687787887988088188288388488588688788888989089189289389489589689789889990090190290390490590690790890991091191291391491591691791891992092192292392492592692792892993093193293393493593693793893994094194294394494594694794894995095195295395495595695795895996096196296396496596696796896997097197297397497597697797897998098198298398498598698798898999099199299399499599699799899910001001100210031004100510061007100810091010101110121013101410151016101710181019102010211022102310241025102610271028102910301031103210331034103510361037103810391040104110421043104410451046104710481049105010511052105310541055105610571058105910601061106210631064106510661067106810691070107110721073107410751076107710781079108010811082108310841085108610871088108910901091109210931094109510961097109810991100110111021103110411051106110711081109111011111112111311141115111611171118111911201121112211231124112511261127112811291130113111321133113411351136113711381139114011411142114311441145114611471148114911501151115211531154115511561157115811591160116111621163116411651166116711681169117011711172117311741175117611771178117911801181118211831184118511861187118811891190119111921193119411951196119711981199120012011202120312041205120612071208120912101211121212131214121512161217121812191220122112221223122412251226122712281229123012311232123312341235123612371238123912401241124212431244124512461247124812491250125112521253125412551256125712581259126012611262126312641265126612671268126912701271127212731274127512761277127812791280128112821283128412851286128712881289129012911292129312941295129612971298129913001301130213031304130513061307130813091310131113121313131413151316131713181319132013211322132313241325132613271328132913301331133213331334133513361337133813391340134113421343134413451346134713481349135013511352135313541355135613571358135913601361136213631364136513661367136813691370137113721373137413751376137713781379138013811382138313841385138613871388138913901391139213931394139513961397139813991400140114021403140414051406140714081409141014111412141314141415141614171418141914201421142214231424142514261427142814291430143114321433143414351436143714381439144014411442144314441445144614471448144914501451145214531454145514561457145814591460146114621463146414651466146714681469147014711472147314741475147614771478147914801481148214831484148514861487148814891490149114921493149414951496149714981499150015011502150315041505150615071508150915101511151215131514151515161517151815191520152115221523152415251526152715281529153015311532153315341535153615371538153915401541154215431544154515461547154815491550155115521553155415551556155715581559156015611562156315641565156615671568156915701571157215731574157515761577157815791580158115821583158415851586158715881589159015911592159315941595159615971598159916001601160216031604160516061607160816091610161116121613161416151616161716181619162016211622162316241625162616271628162916301631163216331634
  1. /* Philippe Anel <philippe.anel@noos.fr>
  2. - 2001-08-12 : First release.
  3. - 2001-08-15 : Added G450, with source code "adapted from" from Xfree86 4.1.0
  4. - 2001-08-23 : Added 'palettedepth 8' and a few 'ultradebug' ...
  5. - 2001-08-24 : Removed a possible lock in initialization.
  6. - 2001-08-30 : Hey ! The 32 bits mode is PALETIZED (Gamma Control I presume) !
  7. And it seems plan9 assume the frame buffer is organized in
  8. Big Endian format ! (+ Fix for the palette init. )
  9. - 2001-09-06 : Added Full 2D Accel ! (see drivers in /sys/src/9/pc)
  10. - 2001-10-01 : Rid Fix.
  11. - 2006-04-01 : Add MGA550 support.
  12. Greets and Acknowledgements go to :
  13. - Sylvain Chipaux <a.k.a. asle>.
  14. - Nigel Roles.
  15. - Jean Mehat (the man who introduced me into the world of plan9).
  16. - Nicolas Stojanovic.
  17. ... and for those who wrote plan9 of course ... :)
  18. */
  19. #include <u.h>
  20. #include <libc.h>
  21. #include <bio.h>
  22. #include "pci.h"
  23. #include "vga.h"
  24. static int ultradebug = 0;
  25. /*
  26. * Matrox G4xx 3D graphics accelerators
  27. */
  28. enum {
  29. Kilo = 1024,
  30. Meg = 1024*1024,
  31. MATROX = 0x102B, /* pci chip manufacturer */
  32. MGA550 = 0x2527, /* pci chip device ids */
  33. MGA4XX = 0x0525,
  34. MGA200 = 0x0521,
  35. /* Pci configuration space mapping */
  36. PCfgMgaFBAA = 0x10, /* Frame buffer Aperture Address */
  37. PCfgMgaCAA = 0x14, /* Control Aperture Address base */
  38. PCfgMgaIAA = 0x18, /* ILOAD Aperture base Address */
  39. PCfgMgaOption1 = 0x40, /* Option Register 1 */
  40. PCfgMgaOption2 = 0x50, /* Option Register 2 */
  41. PCfgMgaOption3 = 0x54, /* Option Register 3 */
  42. PCfgMgaDevCtrl = 0x04, /* Device Control */
  43. /* control aperture offsets */
  44. DMAWIN = 0x0000, /* 7KByte Pseudo-DMA Window */
  45. STATUS0 = 0x1FC2, /* Input Status 0 */
  46. STATUS1 = 0x1FDA, /* Input Status 1 */
  47. SEQIDX = 0x1FC4, /* Sequencer Index */
  48. SEQDATA = 0x1FC5, /* Sequencer Data */
  49. MISC_W = 0x1FC2, /* Misc. WO */
  50. MISC_R = 0x1FCC, /* Misc. RO */
  51. GCTLIDX = 0x1FCE, /* Graphic Controler Index */
  52. GCTLDATA = 0x1FCF, /* Graphic Controler Data */
  53. CRTCIDX = 0x1FD4, /* CRTC Index */
  54. CRTCDATA = 0x1FD5, /* CRTC Data */
  55. CRTCEXTIDX = 0x1FDE, /* CRTC Extension Index */
  56. CRTCEXTDATA = 0x1FDF, /* CRTC Extension Data */
  57. RAMDACIDX = 0x3C00, /* RAMDAC registers Index */
  58. RAMDACDATA = 0x3C0A, /* RAMDAC Indexed Data */
  59. RAMDACPALDATA = 0x3C01,
  60. ATTRIDX = 0x1FC0, /* Attribute Index */
  61. ATTRDATA = 0x1FC1, /* Attribute Data */
  62. CACHEFLUSH = 0x1FFF,
  63. C2_CTL = 0X3C10,
  64. MGA_STATUS = 0X1E14,
  65. Z_DEPTH_ORG = 0X1C0C,
  66. /* ... */
  67. Seq_ClockingMode = 0x01,
  68. Dotmode = (1<<0),
  69. Shftldrt = (1<<2),
  70. Dotclkrt = (1<<3),
  71. Shiftfour = (1<<4),
  72. Scroff = (1<<5),
  73. CrtcExt_Horizontcount = 0x01,
  74. Htotal = (1<<0),
  75. Hblkstr = (1<<1),
  76. Hsyncstr = (1<<2),
  77. Hrsten = (1<<3),
  78. Hsyncoff = (1<<4),
  79. Vsyncoff = (1<<5),
  80. Hblkend = (1<<6),
  81. Vrsten = (1<<7),
  82. CrtcExt_Miscellaneous = 0x03,
  83. Mgamode = (1<<7),
  84. Dac_Xpixclkctrl = 0x1a,
  85. Pixclksl = (3<<0),
  86. Pixclkdis = (1<<2),
  87. Pixpllpdn = (1<<3),
  88. Dac_Xpixpllstat = 0x4f,
  89. Pixlock = (1<<6),
  90. Dac_Xpixpllan = 0x45,
  91. Dac_Xpixpllbn = 0x49,
  92. Dac_Xpixpllcn = 0x4d,
  93. Dac_Xpixpllam = 0x44,
  94. Dac_Xpixpllbm = 0x48,
  95. Dac_Xpixpllcm = 0x4c,
  96. Dac_Xpixpllap = 0x46,
  97. Dac_Xpixpllbp = 0x4a,
  98. Dac_Xpixpllcp = 0x4e,
  99. Dac_Xmulctrl = 0x19,
  100. ColorDepth = (7<<0),
  101. _8bitsPerPixel = 0,
  102. _15bitsPerPixel = 1,
  103. _16bitsPerPixel = 2,
  104. _24bitsPerPixel = 3,
  105. _32bitsPerPixelWithOv = 4,
  106. _32bitsPerPixel = 7,
  107. Dac_Xpanelmode = 0x1f,
  108. Dac_Xmiscctrl = 0x1e,
  109. Dacpdn = (1<<0),
  110. Mfcsel = (3<<1),
  111. Vga8dac = (1<<3),
  112. Ramcs = (1<<4),
  113. Vdoutsel = (7<<5),
  114. Dac_Xcurctrl = 0x06,
  115. CursorDis = 0,
  116. Cursor3Color = 1,
  117. CursorXGA = 2,
  118. CursorX11 = 3,
  119. Cursor16Color = 4,
  120. Dac_Xzoomctrl = 0x38,
  121. Misc_loaddsel = (1<<0),
  122. Misc_rammapen = (1<<1),
  123. Misc_clksel = (3<<2),
  124. Misc_videodis = (1<<4),
  125. Misc_hpgoddev = (1<<5),
  126. Misc_hsyncpol = (1<<6),
  127. Misc_vsyncpol = (1<<7),
  128. MNP_TABLE_SIZE = 64,
  129. TRUE = (1 == 1),
  130. FALSE = (1 == 0),
  131. };
  132. typedef struct {
  133. Pcidev* pci;
  134. int devid;
  135. int revid;
  136. uchar* mmio;
  137. uchar* mmfb;
  138. int fbsize;
  139. ulong iload;
  140. uchar syspll_m;
  141. uchar syspll_n;
  142. uchar syspll_p;
  143. uchar syspll_s;
  144. uchar pixpll_m;
  145. uchar pixpll_n;
  146. uchar pixpll_p;
  147. uchar pixpll_s;
  148. ulong option1;
  149. ulong option2;
  150. ulong option3;
  151. ulong Fneeded;
  152. /* From plan9.ini ... later */
  153. uchar sdram;
  154. uchar colorkey;
  155. uchar maskkey;
  156. ulong maxpclk;
  157. uchar graphics[9];
  158. uchar attribute[0x14];
  159. uchar sequencer[5];
  160. uchar crtc[0x19];
  161. uchar crtcext[9];
  162. ulong htotal;
  163. ulong hdispend;
  164. ulong hblkstr;
  165. ulong hblkend;
  166. ulong hsyncstr;
  167. ulong hsyncend;
  168. ulong vtotal;
  169. ulong vdispend;
  170. ulong vblkstr;
  171. ulong vblkend;
  172. ulong vsyncstr;
  173. ulong vsyncend;
  174. ulong linecomp;
  175. ulong hsyncsel;
  176. ulong startadd;
  177. ulong offset;
  178. ulong maxscan;
  179. ulong curloc;
  180. ulong prowscan;
  181. ulong currowstr;
  182. ulong currowend;
  183. ulong curoff;
  184. ulong undrow;
  185. ulong curskew;
  186. ulong conv2t4;
  187. ulong interlace;
  188. ulong hsyncdel;
  189. ulong hdispskew;
  190. ulong bytepan;
  191. ulong dotclkrt;
  192. ulong dword;
  193. ulong wbmode;
  194. ulong addwrap;
  195. ulong selrowscan;
  196. ulong cms;
  197. ulong csynccen;
  198. ulong hrsten;
  199. ulong vrsten;
  200. ulong vinten;
  201. ulong vintclr;
  202. ulong hsyncoff;
  203. ulong vsyncoff;
  204. ulong crtcrstN;
  205. ulong mgamode;
  206. ulong scale;
  207. ulong hiprilvl;
  208. ulong maxhipri;
  209. ulong c2hiprilvl;
  210. ulong c2maxhipri;
  211. ulong misc;
  212. ulong crtcprotect;
  213. ulong winsize;
  214. ulong winfreq;
  215. ulong mgaapsize;
  216. } Mga;
  217. static void
  218. mgawrite32(Mga* mga, int index, ulong val)
  219. {
  220. ((ulong*)mga->mmio)[index] = val;
  221. }
  222. static ulong
  223. mgaread32(Mga* mga, int index)
  224. {
  225. return ((ulong*)mga->mmio)[index];
  226. }
  227. static void
  228. mgawrite8(Mga* mga, int index, uchar val)
  229. {
  230. mga->mmio[index] = val;
  231. }
  232. static uchar
  233. mgaread8(Mga* mga, int index)
  234. {
  235. return mga->mmio[index];
  236. }
  237. static uchar
  238. seqget(Mga* mga, int index)
  239. {
  240. mgawrite8(mga, SEQIDX, index);
  241. return mgaread8(mga, SEQDATA);
  242. }
  243. static uchar
  244. seqset(Mga* mga, int index, uchar set, uchar clr)
  245. {
  246. uchar tmp;
  247. mgawrite8(mga, SEQIDX, index);
  248. tmp = mgaread8(mga, SEQDATA);
  249. mgawrite8(mga, SEQIDX, index);
  250. mgawrite8(mga, SEQDATA, (tmp & ~clr) | set);
  251. return tmp;
  252. }
  253. static uchar
  254. crtcget(Mga* mga, int index)
  255. {
  256. mgawrite8(mga, CRTCIDX, index);
  257. return mgaread8(mga, CRTCDATA);
  258. }
  259. static uchar
  260. crtcset(Mga* mga, int index, uchar set, uchar clr)
  261. {
  262. uchar tmp;
  263. mgawrite8(mga, CRTCIDX, index);
  264. tmp = mgaread8(mga, CRTCDATA);
  265. mgawrite8(mga, CRTCIDX, index);
  266. mgawrite8(mga, CRTCDATA, (tmp & ~clr) | set);
  267. return tmp;
  268. }
  269. static uchar
  270. crtcextget(Mga* mga, int index)
  271. {
  272. mgawrite8(mga, CRTCEXTIDX, index);
  273. return mgaread8(mga, CRTCEXTDATA);
  274. }
  275. static uchar
  276. crtcextset(Mga* mga, int index, uchar set, uchar clr)
  277. {
  278. uchar tmp;
  279. mgawrite8(mga, CRTCEXTIDX, index);
  280. tmp = mgaread8(mga, CRTCEXTDATA);
  281. mgawrite8(mga, CRTCEXTIDX, index);
  282. mgawrite8(mga, CRTCEXTDATA, (tmp & ~clr) | set);
  283. return tmp;
  284. }
  285. static uchar
  286. dacget(Mga* mga, int index)
  287. {
  288. mgawrite8(mga, RAMDACIDX, index);
  289. return mgaread8(mga, RAMDACDATA);
  290. }
  291. static uchar
  292. dacset(Mga* mga, int index, uchar set, uchar clr)
  293. {
  294. uchar tmp;
  295. mgawrite8(mga, RAMDACIDX, index);
  296. tmp = mgaread8(mga, RAMDACDATA);
  297. mgawrite8(mga, RAMDACIDX, index);
  298. mgawrite8(mga, RAMDACDATA, (tmp & ~clr) | set);
  299. return tmp;
  300. }
  301. static uchar
  302. gctlget(Mga* mga, int index)
  303. {
  304. mgawrite8(mga, GCTLIDX, index);
  305. return mgaread8(mga, GCTLDATA);
  306. }
  307. static uchar
  308. gctlset(Mga* mga, int index, uchar set, uchar clr)
  309. {
  310. uchar tmp;
  311. mgawrite8(mga, GCTLIDX, index);
  312. tmp = mgaread8(mga, GCTLDATA);
  313. mgawrite8(mga, GCTLIDX, index);
  314. mgawrite8(mga, GCTLDATA, (tmp & ~clr) | set);
  315. return tmp;
  316. }
  317. static uchar
  318. attrget(Mga* mga, int index)
  319. {
  320. mgawrite8(mga, ATTRIDX, index);
  321. return mgaread8(mga, ATTRDATA);
  322. }
  323. static uchar
  324. attrset(Mga* mga, int index, uchar set, uchar clr)
  325. {
  326. uchar tmp;
  327. mgawrite8(mga, ATTRIDX, index);
  328. tmp = mgaread8(mga, ATTRDATA);
  329. mgawrite8(mga, ATTRIDX, index);
  330. mgawrite8(mga, ATTRDATA, (tmp & ~clr) | set);
  331. return tmp;
  332. }
  333. static uchar
  334. miscget(Mga* mga)
  335. {
  336. return mgaread8(mga, MISC_R);
  337. }
  338. static uchar
  339. miscset(Mga* mga, uchar set, uchar clr)
  340. {
  341. uchar tmp;
  342. tmp = mgaread8(mga, MISC_R);
  343. mgawrite8(mga, MISC_W, (tmp & ~clr) | set);
  344. return tmp;
  345. }
  346. /* ************************************************************ */
  347. static void
  348. dump_all_regs(Mga* mga)
  349. {
  350. int i;
  351. for (i = 0; i < 25; i++)
  352. trace("crtc[%d] = 0x%x\n", i, crtcget(mga, i));
  353. for (i = 0; i < 9; i++)
  354. trace("crtcext[%d] = 0x%x\n", i, crtcextget(mga, i));
  355. for (i = 0; i < 5; i++)
  356. trace("seq[%d] = 0x%x\n", i, seqget(mga, i));
  357. for (i = 0; i < 9; i++)
  358. trace("gctl[%d] = 0x%x\n", i, gctlget(mga, i));
  359. trace("misc = 0x%x\n", mgaread8(mga, MISC_R));
  360. for (i = 0; i < 0x87; i++)
  361. trace("dac[%d] = 0x%x\n", i, dacget(mga, i));
  362. }
  363. /* ************************************************************ */
  364. static void
  365. dump(Vga* vga, Ctlr* ctlr)
  366. {
  367. dump_all_regs(vga->private);
  368. ctlr->flag |= Fdump;
  369. }
  370. static void
  371. setpalettedepth(int depth)
  372. {
  373. int fd;
  374. char *cmd = strdup("palettedepth X");
  375. if ((depth != 8) && (depth != 6) && (depth != 16))
  376. error("mga: invalid palette depth %d\n", depth);
  377. fd = open("#v/vgactl", OWRITE);
  378. if(fd < 0)
  379. error("mga: can't open vgactl\n");
  380. cmd[13] = '0' + depth;
  381. if(write(fd, cmd, 14) != 14)
  382. error("mga: can't set palette depth to %d\n", depth);
  383. close(fd);
  384. }
  385. static void
  386. mapmga4xx(Vga* vga, Ctlr* ctlr)
  387. {
  388. int f;
  389. uchar* m;
  390. Mga * mga;
  391. if(vga->private == nil)
  392. error("%s: g4xxio: no *mga4xx\n", ctlr->name);
  393. mga = vga->private;
  394. f = open("#v/vgactl", OWRITE);
  395. if(f < 0)
  396. error("%s: can't open vgactl\n", ctlr->name);
  397. if(write(f, "type mga4xx", 11) != 11)
  398. error("%s: can't set mga type\n", ctlr->name);
  399. m = segattach(0, "mga4xxmmio", 0, 16*Kilo);
  400. if(m == (void*)-1)
  401. error("%s: can't attach mga4xxmmio segment\n", ctlr->name);
  402. mga->mmio = m;
  403. trace("%s: mmio at %#p\n", ctlr->name, mga->mmio);
  404. m = segattach(0, "mga4xxscreen", 0, 32*Meg);
  405. if(m == (void*)-1) {
  406. mga->mgaapsize = 8*Meg;
  407. m = segattach(0, "mga4xxscreen", 0, 8*Meg);
  408. if(m == (void*)-1)
  409. error("%s: can't attach mga4xxscreen segment\n", ctlr->name);
  410. } else {
  411. mga->mgaapsize = 32*Meg;
  412. }
  413. mga->mmfb = m;
  414. trace("%s: frame buffer at %#p\n", ctlr->name, mga->mmfb);
  415. close(f);
  416. }
  417. static void
  418. snarf(Vga* vga, Ctlr* ctlr)
  419. {
  420. int i, k, n;
  421. uchar * p;
  422. uchar x[16];
  423. Pcidev * pci;
  424. Mga * mga;
  425. uchar crtcext3;
  426. uchar rid;
  427. trace("%s->snarf\n", ctlr->name);
  428. if(vga->private == nil) {
  429. pci = pcimatch(nil, MATROX, MGA4XX);
  430. if(pci == nil)
  431. pci = pcimatch(nil, MATROX, MGA550);
  432. if(pci == nil)
  433. pci = pcimatch(nil, MATROX, MGA200);
  434. if(pci == nil)
  435. error("%s: cannot find matrox adapter\n", ctlr->name);
  436. rid = pcicfgr8(pci, PciRID); // PciRID = 0x08
  437. trace("%s: G%d%d0 rev %d\n", ctlr->name,
  438. 2*(pci->did==MGA200)
  439. +4*(pci->did==MGA4XX)
  440. +5*(pci->did==MGA550),
  441. rid&0x80 ? 5 : 0,
  442. rid&~0x80);
  443. i = pcicfgr32(pci, PCfgMgaDevCtrl);
  444. if ((i & 2) != 2)
  445. error("%s: Memory Space not enabled ... Aborting ...\n", ctlr->name);
  446. vga->private = alloc(sizeof(Mga));
  447. mga = (Mga*)vga->private;
  448. mga->devid = pci->did;
  449. mga->revid = rid;
  450. mga->pci = pci;
  451. mapmga4xx(vga, ctlr);
  452. }
  453. else {
  454. mga = (Mga*)vga->private;
  455. }
  456. /* Find out how much memory is here, some multiple of 2Meg */
  457. /* First Set MGA Mode ... */
  458. crtcext3 = crtcextset(mga, 3, 0x80, 0x00);
  459. p = mga->mmfb;
  460. n = (mga->mgaapsize / Meg) / 2;
  461. for (i = 0; i < n; i++) {
  462. k = (2*i+1)*Meg;
  463. p[k] = 0;
  464. p[k] = i+1;
  465. *(mga->mmio + CACHEFLUSH) = 0;
  466. x[i] = p[k];
  467. trace("x[%d]=%d\n", i, x[i]);
  468. }
  469. for(i = 1; i < n; i++)
  470. if(x[i] != i+1)
  471. break;
  472. vga->vmz = mga->fbsize = 2*i*Meg;
  473. trace("probe found %d megabytes\n", 2*i);
  474. crtcextset(mga, 3, crtcext3, 0xff);
  475. ctlr->flag |= Fsnarf;
  476. }
  477. static void
  478. options(Vga* vga, Ctlr* ctlr)
  479. {
  480. if(vga->virtx & 127)
  481. vga->virtx = (vga->virtx+127)&~127;
  482. ctlr->flag |= Foptions;
  483. }
  484. /* ************************************************************ */
  485. static void
  486. G450ApplyPFactor(Mga*, uchar ucP, ulong *pulFIn)
  487. {
  488. if(!(ucP & 0x40))
  489. {
  490. *pulFIn = *pulFIn / (2L << (ucP & 3));
  491. }
  492. }
  493. static void
  494. G450RemovePFactor(Mga*, uchar ucP, ulong *pulFIn)
  495. {
  496. if(!(ucP & 0x40))
  497. {
  498. *pulFIn = *pulFIn * (2L << (ucP & 3));
  499. }
  500. }
  501. static void
  502. G450CalculVCO(Mga*, ulong ulMNP, ulong *pulF)
  503. {
  504. uchar ucM, ucN;
  505. ucM = (uchar)((ulMNP >> 16) & 0xff);
  506. ucN = (uchar)((ulMNP >> 8) & 0xff);
  507. *pulF = (27000 * (2 * (ucN + 2)) + ((ucM + 1) >> 1)) / (ucM + 1);
  508. trace("G450CalculVCO: ulMNP %lx, pulF %ld\n", ulMNP, *pulF);
  509. }
  510. static void
  511. G450CalculDeltaFreq(Mga*, ulong ulF1, ulong ulF2, ulong *pulDelta)
  512. {
  513. if(ulF2 < ulF1)
  514. {
  515. *pulDelta = ((ulF1 - ulF2) * 1000) / ulF1;
  516. }
  517. else
  518. {
  519. *pulDelta = ((ulF2 - ulF1) * 1000) / ulF1;
  520. }
  521. trace("G450CalculDeltaFreq: ulF1 %ld, ulF2 %ld, pulDelta %ld\n", ulF1, ulF2, *pulDelta);
  522. }
  523. static void
  524. G450FindNextPLLParam(Mga* mga, ulong ulFout, ulong *pulPLLMNP)
  525. {
  526. uchar ucM, ucN, ucP, ucS;
  527. ulong ulVCO, ulVCOMin;
  528. ucM = (uchar)((*pulPLLMNP >> 16) & 0xff);
  529. /* ucN = (uchar)((*pulPLLMNP >> 8) & 0xff); */
  530. ucP = (uchar)(*pulPLLMNP & 0x43);
  531. ulVCOMin = 256000;
  532. if(ulVCOMin >= (255L * 8000))
  533. {
  534. ulVCOMin = 230000;
  535. }
  536. if((ucM == 9) && (ucP & 0x40))
  537. {
  538. *pulPLLMNP = 0xffffffff;
  539. } else if (ucM == 9)
  540. {
  541. if(ucP)
  542. {
  543. ucP--;
  544. }
  545. else
  546. {
  547. ucP = 0x40;
  548. }
  549. ucM = 0;
  550. }
  551. else
  552. {
  553. ucM++;
  554. }
  555. ulVCO = ulFout;
  556. G450RemovePFactor(mga, ucP, &ulVCO);
  557. if(ulVCO < ulVCOMin)
  558. {
  559. *pulPLLMNP = 0xffffffff;
  560. }
  561. if(*pulPLLMNP != 0xffffffff)
  562. {
  563. ucN = (uchar)(((ulVCO * (ucM+1) + 27000)/(27000 * 2)) - 2);
  564. ucS = 5;
  565. if(ulVCO < 1300000) ucS = 4;
  566. if(ulVCO < 1100000) ucS = 3;
  567. if(ulVCO < 900000) ucS = 2;
  568. if(ulVCO < 700000) ucS = 1;
  569. if(ulVCO < 550000) ucS = 0;
  570. ucP |= (uchar)(ucS << 3);
  571. *pulPLLMNP &= 0xff000000;
  572. *pulPLLMNP |= (ulong)ucM << 16;
  573. *pulPLLMNP |= (ulong)ucN << 8;
  574. *pulPLLMNP |= (ulong)ucP;
  575. }
  576. }
  577. static void
  578. G450FindFirstPLLParam(Mga* mga, ulong ulFout, ulong *pulPLLMNP)
  579. {
  580. uchar ucP;
  581. ulong ulVCO;
  582. ulong ulVCOMax;
  583. /* Default value */
  584. ulVCOMax = 1300000;
  585. if(ulFout > (ulVCOMax/2))
  586. {
  587. ucP = 0x40;
  588. ulVCO = ulFout;
  589. }
  590. else
  591. {
  592. ucP = 3;
  593. ulVCO = ulFout;
  594. G450RemovePFactor(mga, ucP, &ulVCO);
  595. while(ucP && (ulVCO > ulVCOMax))
  596. {
  597. ucP--;
  598. ulVCO = ulFout;
  599. G450RemovePFactor(mga, ucP, &ulVCO);
  600. }
  601. }
  602. if(ulVCO > ulVCOMax)
  603. {
  604. *pulPLLMNP = 0xffffffff;
  605. }
  606. else
  607. {
  608. /* Pixel clock: 1 */
  609. *pulPLLMNP = (1 << 24) + 0xff0000 + ucP;
  610. G450FindNextPLLParam(mga, ulFout, pulPLLMNP);
  611. }
  612. }
  613. static void
  614. G450WriteMNP(Mga* mga, ulong ulMNP)
  615. {
  616. if (0) trace("G450WriteMNP : 0x%lx\n", ulMNP);
  617. dacset(mga, Dac_Xpixpllcm, (uchar)(ulMNP >> 16), 0xff);
  618. dacset(mga, Dac_Xpixpllcn, (uchar)(ulMNP >> 8), 0xff);
  619. dacset(mga, Dac_Xpixpllcp, (uchar)ulMNP, 0xff);
  620. }
  621. static void
  622. G450CompareMNP(Mga* mga, ulong ulFout, ulong ulMNP1,
  623. ulong ulMNP2, long *pulResult)
  624. {
  625. ulong ulFreq, ulDelta1, ulDelta2;
  626. G450CalculVCO(mga, ulMNP1, &ulFreq);
  627. G450ApplyPFactor(mga, (uchar) ulMNP1, &ulFreq);
  628. G450CalculDeltaFreq(mga, ulFout, ulFreq, &ulDelta1);
  629. G450CalculVCO(mga, ulMNP2, &ulFreq);
  630. G450ApplyPFactor(mga, (uchar) ulMNP2, &ulFreq);
  631. G450CalculDeltaFreq(mga, ulFout, ulFreq, &ulDelta2);
  632. if(ulDelta1 < ulDelta2)
  633. {
  634. *pulResult = -1;
  635. }
  636. else if(ulDelta1 > ulDelta2)
  637. {
  638. *pulResult = 1;
  639. }
  640. else
  641. {
  642. *pulResult = 0;
  643. }
  644. if((ulDelta1 <= 5) && (ulDelta2 <= 5))
  645. {
  646. if((ulMNP1 & 0xff0000) < (ulMNP2 & 0xff0000))
  647. {
  648. *pulResult = -1;
  649. }
  650. else if((ulMNP1 & 0xff0000) > (ulMNP2 & 0xff0000))
  651. {
  652. *pulResult = 1;
  653. }
  654. }
  655. }
  656. static void
  657. G450IsPllLocked(Mga* mga, int *lpbLocked)
  658. {
  659. ulong ulFallBackCounter, ulLockCount, ulCount;
  660. uchar ucPLLStatus;
  661. /* Pixel PLL */
  662. mgawrite8(mga, 0x3c00, 0x4f);
  663. ulFallBackCounter = 0;
  664. do
  665. {
  666. ucPLLStatus = mgaread8(mga, 0x3c0a);
  667. if (0) trace("ucPLLStatus[1] : 0x%x\n", ucPLLStatus);
  668. ulFallBackCounter++;
  669. } while(!(ucPLLStatus & 0x40) && (ulFallBackCounter < 1000));
  670. ulLockCount = 0;
  671. if(ulFallBackCounter < 1000)
  672. {
  673. for(ulCount = 0; ulCount < 100; ulCount++)
  674. {
  675. ucPLLStatus = mgaread8(mga, 0x3c0a);
  676. if (0) trace("ucPLLStatus[2] : 0x%x\n", ucPLLStatus);
  677. if(ucPLLStatus & 0x40)
  678. {
  679. ulLockCount++;
  680. }
  681. }
  682. }
  683. *lpbLocked = ulLockCount >= 90;
  684. }
  685. static void
  686. G450SetPLLFreq(Mga* mga, long f_out)
  687. {
  688. int bFoundValidPLL;
  689. int bLocked;
  690. ulong ulMaxIndex;
  691. ulong ulMNP;
  692. ulong ulMNPTable[MNP_TABLE_SIZE];
  693. ulong ulIndex;
  694. ulong ulTryMNP;
  695. long lCompareResult;
  696. trace("f_out : %ld\n", f_out);
  697. G450FindFirstPLLParam(mga, f_out, &ulMNP);
  698. ulMNPTable[0] = ulMNP;
  699. G450FindNextPLLParam(mga, f_out, &ulMNP);
  700. ulMaxIndex = 1;
  701. while(ulMNP != 0xffffffff)
  702. {
  703. int ulIndex;
  704. int bSkipValue;
  705. bSkipValue = FALSE;
  706. if(ulMaxIndex == MNP_TABLE_SIZE)
  707. {
  708. G450CompareMNP(mga, f_out, ulMNP, ulMNPTable[MNP_TABLE_SIZE - 1],
  709. &lCompareResult);
  710. if(lCompareResult > 0)
  711. {
  712. bSkipValue = TRUE;
  713. }
  714. else
  715. {
  716. ulMaxIndex--;
  717. }
  718. }
  719. if(!bSkipValue)
  720. {
  721. for(ulIndex = ulMaxIndex; !bSkipValue && (ulIndex > 0); ulIndex--)
  722. {
  723. G450CompareMNP(mga, f_out, ulMNP, ulMNPTable[ulIndex - 1],
  724. &lCompareResult);
  725. if(lCompareResult < 0)
  726. {
  727. ulMNPTable[ulIndex] = ulMNPTable[ulIndex - 1];
  728. }
  729. else
  730. {
  731. break;
  732. }
  733. }
  734. ulMNPTable[ulIndex] = ulMNP;
  735. ulMaxIndex++;
  736. }
  737. G450FindNextPLLParam(mga, f_out, &ulMNP);
  738. }
  739. bFoundValidPLL = FALSE;
  740. ulMNP = 0;
  741. for(ulIndex = 0; !bFoundValidPLL && (ulIndex < ulMaxIndex); ulIndex++)
  742. {
  743. ulTryMNP = ulMNPTable[ulIndex];
  744. {
  745. bLocked = TRUE;
  746. if((ulMNPTable[ulIndex] & 0xff00) < 0x300 ||
  747. (ulMNPTable[ulIndex] & 0xff00) > 0x7a00)
  748. {
  749. bLocked = FALSE;
  750. }
  751. if(bLocked)
  752. {
  753. G450WriteMNP(mga, ulTryMNP - 0x300);
  754. G450IsPllLocked(mga, &bLocked);
  755. }
  756. if(bLocked)
  757. {
  758. G450WriteMNP(mga, ulTryMNP + 0x300);
  759. G450IsPllLocked(mga, &bLocked);
  760. }
  761. if(bLocked)
  762. {
  763. G450WriteMNP(mga, ulTryMNP - 0x200);
  764. G450IsPllLocked(mga, &bLocked);
  765. }
  766. if(bLocked)
  767. {
  768. G450WriteMNP(mga, ulTryMNP + 0x200);
  769. G450IsPllLocked(mga, &bLocked);
  770. }
  771. if(bLocked)
  772. {
  773. G450WriteMNP(mga, ulTryMNP - 0x100);
  774. G450IsPllLocked(mga, &bLocked);
  775. }
  776. if(bLocked)
  777. {
  778. G450WriteMNP(mga, ulTryMNP + 0x100);
  779. G450IsPllLocked(mga, &bLocked);
  780. }
  781. if(bLocked)
  782. {
  783. G450WriteMNP(mga, ulTryMNP);
  784. G450IsPllLocked(mga, &bLocked);
  785. }
  786. else if(!ulMNP)
  787. {
  788. G450WriteMNP(mga, ulTryMNP);
  789. G450IsPllLocked(mga, &bLocked);
  790. if(bLocked)
  791. {
  792. ulMNP = ulMNPTable[ulIndex];
  793. }
  794. bLocked = FALSE;
  795. }
  796. if(bLocked)
  797. {
  798. bFoundValidPLL = TRUE;
  799. }
  800. }
  801. }
  802. if(!bFoundValidPLL)
  803. {
  804. if(ulMNP)
  805. {
  806. G450WriteMNP(mga, ulMNP);
  807. }
  808. else
  809. {
  810. G450WriteMNP(mga, ulMNPTable[0]);
  811. }
  812. }
  813. }
  814. /* ************************************************************ */
  815. /*
  816. calcclock - Calculate the PLL settings (m, n, p, s).
  817. */
  818. static double
  819. g400_calcclock(Mga* mga, long Fneeded)
  820. {
  821. double Fpll;
  822. double Fvco;
  823. double Fref;
  824. int pixpll_m_min;
  825. int pixpll_m_max;
  826. int pixpll_n_min;
  827. int pixpll_n_max;
  828. int pixpll_p_max;
  829. double Ferr, Fcalc;
  830. int m, n, p;
  831. if (mga->devid == MGA4XX || mga->devid == MGA550) {
  832. /* These values are taken from Matrox G400 Specification - p 4-91 */
  833. Fref = 27000000.0;
  834. pixpll_n_min = 7;
  835. pixpll_n_max = 127;
  836. pixpll_m_min = 1;
  837. pixpll_m_max = 31;
  838. pixpll_p_max = 7;
  839. } else { /* MGA200 */
  840. /* These values are taken from Matrox G200 Specification - p 4-77 */
  841. //Fref = 14318180.0;
  842. Fref = 27050500.0;
  843. pixpll_n_min = 7;
  844. pixpll_n_max = 127;
  845. pixpll_m_min = 1;
  846. pixpll_m_max = 6;
  847. pixpll_p_max = 7;
  848. }
  849. Fvco = ( double ) Fneeded;
  850. for (p = 0; p <= pixpll_p_max && Fvco < mga->maxpclk; p = p * 2 + 1, Fvco *= 2.0)
  851. ;
  852. mga->pixpll_p = p;
  853. Ferr = Fneeded;
  854. for ( m = pixpll_m_min ; m <= pixpll_m_max ; m++ )
  855. for ( n = pixpll_n_min; n <= pixpll_n_max; n++ )
  856. {
  857. Fcalc = Fref * (n + 1) / (m + 1) ;
  858. /*
  859. * Pick the closest frequency.
  860. */
  861. if ( labs(Fcalc - Fvco) < Ferr ) {
  862. Ferr = abs(Fcalc - Fvco);
  863. mga->pixpll_m = m;
  864. mga->pixpll_n = n;
  865. }
  866. }
  867. Fvco = Fref * (mga->pixpll_n + 1) / (mga->pixpll_m + 1);
  868. if (mga->devid == MGA4XX || mga->devid == MGA550) {
  869. if ( (50000000.0 <= Fvco) && (Fvco < 110000000.0) )
  870. mga->pixpll_p |= 0;
  871. if ( (110000000.0 <= Fvco) && (Fvco < 170000000.0) )
  872. mga->pixpll_p |= (1<<3);
  873. if ( (170000000.0 <= Fvco) && (Fvco < 240000000.0) )
  874. mga->pixpll_p |= (2<<3);
  875. if ( (300000000.0 <= Fvco) )
  876. mga->pixpll_p |= (3<<3);
  877. } else {
  878. if ( (50000000.0 <= Fvco) && (Fvco < 100000000.0) )
  879. mga->pixpll_p |= 0;
  880. if ( (100000000.0 <= Fvco) && (Fvco < 140000000.0) )
  881. mga->pixpll_p |= (1<<3);
  882. if ( (140000000.0 <= Fvco) && (Fvco < 180000000.0) )
  883. mga->pixpll_p |= (2<<3);
  884. if ( (250000000.0 <= Fvco) )
  885. mga->pixpll_p |= (3<<3);
  886. }
  887. Fpll = Fvco / (p + 1);
  888. return Fpll;
  889. }
  890. /* ************************************************************ */
  891. static void
  892. init(Vga* vga, Ctlr* ctlr)
  893. {
  894. Mode* mode;
  895. Mga* mga;
  896. double Fpll;
  897. Ctlr* c;
  898. int i;
  899. ulong t;
  900. mga = vga->private;
  901. mode = vga->mode;
  902. trace("mga mmio at %#p\n", mga->mmio);
  903. ctlr->flag |= Ulinear;
  904. if ((mode->z != 32) && (mode->z != 8))
  905. error("depth %d not supported !\n", mode->z);
  906. if (mode->interlace)
  907. error("interlaced mode not supported !\n");
  908. trace("%s: Initializing mode %dx%dx%d on %s\n", ctlr->name, mode->x, mode->y, mode->z, mode->type);
  909. trace("%s: Suggested Dot Clock : %d\n", ctlr->name, mode->frequency);
  910. trace("%s: Horizontal Total = %d\n", ctlr->name, mode->ht);
  911. trace("%s: Start Horizontal Blank = %d\n", ctlr->name, mode->shb);
  912. trace("%s: End Horizontal Blank = %d\n", ctlr->name, mode->ehb);
  913. trace("%s: Vertical Total = %d\n", ctlr->name, mode->vt);
  914. trace("%s: Vertical Retrace Start = %d\n", ctlr->name, mode->vrs);
  915. trace("%s: Vertical Retrace End = %d\n", ctlr->name, mode->vre);
  916. trace("%s: Start Horizontal Sync = %d\n", ctlr->name, mode->shs);
  917. trace("%s: End Horizontal Sync = %d\n", ctlr->name, mode->ehs);
  918. trace("%s: HSync = %c\n", ctlr->name, mode->hsync);
  919. trace("%s: VSync = %c\n", ctlr->name, mode->vsync);
  920. trace("%s: Interlace = %d\n", ctlr->name, mode->interlace);
  921. /* TODO : G400 Max : 360000000 */
  922. if (mga->devid == MGA4XX || mga->devid == MGA550)
  923. mga->maxpclk = 300000000;
  924. else
  925. mga->maxpclk = 250000000;
  926. if (mode->frequency < 50000)
  927. error("mga: Too little Frequency %d : Minimum supported by PLL is %d",
  928. mode->frequency, 50000);
  929. if (mode->frequency > mga->maxpclk)
  930. error("mga: Too big Frequency %d : Maximum supported by PLL is %ld",
  931. mode->frequency, mga->maxpclk);
  932. trace("mga: revision ID is %x\n", mga->revid);
  933. if ((mga->devid == MGA200) || ((mga->devid == MGA4XX) && (mga->revid & 0x80) == 0x00)) {
  934. /* Is it G200/G400 or G450 ? */
  935. Fpll = g400_calcclock(mga, mode->frequency);
  936. trace("Fpll set to %f\n", Fpll);
  937. trace("pixclks : n = %d m = %d p = %d\n", mga->pixpll_n, mga->pixpll_m, mga->pixpll_p & 0x7);
  938. } else
  939. mga->Fneeded = mode->frequency;
  940. trace("PCI Option1 = 0x%x\n", pcicfgr32(mga->pci, PCfgMgaOption1));
  941. trace("PCI Option2 = 0x%x\n", pcicfgr32(mga->pci, PCfgMgaOption2));
  942. trace("PCI Option3 = 0x%x\n", pcicfgr32(mga->pci, PCfgMgaOption3));
  943. mga->htotal = (mode->ht >> 3) - 5;
  944. mga->hdispend = (mode->x >> 3) - 1;
  945. mga->hblkstr = mga->hdispend; /* (mode->shb >> 3); */
  946. mga->hblkend = mga->htotal + 4; /* (mode->ehb >> 3); */
  947. mga->hsyncstr = (mode->shs >> 3) - 1; // Was (mode->shs >> 3);
  948. mga->hsyncend = (mode->ehs >> 3) - 1; // Was (mode->ehs >> 3);
  949. mga->hsyncdel = 0;
  950. mga->vtotal = mode->vt - 2;
  951. mga->vdispend = mode->y - 1;
  952. mga->vblkstr = mode->y - 1;
  953. mga->vblkend = mode->vt - 1;
  954. mga->vsyncstr = mode->vrs;
  955. mga->vsyncend = mode->vre;
  956. mga->linecomp = mode->y;
  957. mga->hsyncsel = 0; /* Do not double lines ... */
  958. mga->startadd = 0;
  959. mga->offset = (vga->virtx * mode->z) / 128;
  960. /* No Zoom */
  961. mga->maxscan = 0;
  962. /* Not used in Power Graphic mode */
  963. mga->curloc = 0;
  964. mga->prowscan = 0;
  965. mga->currowstr = 0;
  966. mga->currowend = 0;
  967. mga->curoff = 1;
  968. mga->undrow = 0;
  969. mga->curskew = 0;
  970. mga->conv2t4 = 0;
  971. mga->interlace = 0;
  972. mga->hdispskew = 0;
  973. mga->bytepan = 0;
  974. mga->dotclkrt = 0;
  975. mga->dword = 0;
  976. mga->wbmode = 1;
  977. mga->addwrap = 0; /* Not Used ! */
  978. mga->selrowscan = 1;
  979. mga->cms = 1;
  980. mga->csynccen = 0; /* Disable composite sync */
  981. /* VIDRST Pin */
  982. mga->hrsten = 0; // Was 1;
  983. mga->vrsten = 0; // Was 1;
  984. /* vertical interrupt control ... disabled */
  985. mga->vinten = 1;
  986. mga->vintclr = 0;
  987. /* Let [hv]sync run freely */
  988. mga->hsyncoff = 0;
  989. mga->vsyncoff = 0;
  990. mga->crtcrstN = 1;
  991. mga->mgamode = 1;
  992. mga->scale = (mode->z == 8) ? 0 : 3; /* 8 or 32 bits mode */
  993. mga->crtcprotect = 1;
  994. mga->winsize = 0;
  995. mga->winfreq = 0;
  996. if ((mga->htotal == 0)
  997. || (mga->hblkend <= (mga->hblkstr + 1))
  998. || ((mga->htotal - mga->hdispend) == 0)
  999. || ((mga->htotal - mga->bytepan + 2) <= mga->hdispend)
  1000. || (mga->hsyncstr <= (mga->hdispend + 2))
  1001. || (mga->vtotal == 0))
  1002. {
  1003. error("Invalid Power Graphic Mode :\n"
  1004. "mga->htotal = %ld\n"
  1005. "mga->hdispend = %ld\n"
  1006. "mga->hblkstr = %ld\n"
  1007. "mga->hblkend = %ld\n"
  1008. "mga->hsyncstr = %ld\n"
  1009. "mga->hsyncend = %ld\n"
  1010. "mga->hsyncdel = %ld\n"
  1011. "mga->vtotal = %ld\n"
  1012. "mga->vdispend = %ld\n"
  1013. "mga->vblkstr = %ld\n"
  1014. "mga->vblkend = %ld\n"
  1015. "mga->vsyncstr = %ld\n"
  1016. "mga->vsyncend = %ld\n"
  1017. "mga->linecomp = %ld\n",
  1018. mga->htotal,
  1019. mga->hdispend,
  1020. mga->hblkstr,
  1021. mga->hblkend,
  1022. mga->hsyncstr,
  1023. mga->hsyncend,
  1024. mga->hsyncdel,
  1025. mga->vtotal,
  1026. mga->vdispend,
  1027. mga->vblkstr,
  1028. mga->vblkend,
  1029. mga->vsyncstr,
  1030. mga->vsyncend,
  1031. mga->linecomp
  1032. );
  1033. }
  1034. mga->hiprilvl = 0;
  1035. mga->maxhipri = 0;
  1036. mga->c2hiprilvl = 0;
  1037. mga->c2maxhipri = 0;
  1038. mga->misc = ((mode->hsync != '-')?0:(1<<6)) | ((mode->vsync != '-')?0:(1<<7));
  1039. trace("mga->htotal = %ld\n"
  1040. "mga->hdispend = %ld\n"
  1041. "mga->hblkstr = %ld\n"
  1042. "mga->hblkend = %ld\n"
  1043. "mga->hsyncstr = %ld\n"
  1044. "mga->hsyncend = %ld\n"
  1045. "mga->hsyncdel = %ld\n"
  1046. "mga->vtotal = %ld\n"
  1047. "mga->vdispend = %ld\n"
  1048. "mga->vblkstr = %ld\n"
  1049. "mga->vblkend = %ld\n"
  1050. "mga->vsyncstr = %ld\n"
  1051. "mga->vsyncend = %ld\n"
  1052. "mga->linecomp = %ld\n",
  1053. mga->htotal,
  1054. mga->hdispend,
  1055. mga->hblkstr,
  1056. mga->hblkend,
  1057. mga->hsyncstr,
  1058. mga->hsyncend,
  1059. mga->hsyncdel,
  1060. mga->vtotal,
  1061. mga->vdispend,
  1062. mga->vblkstr,
  1063. mga->vblkend,
  1064. mga->vsyncstr,
  1065. mga->vsyncend,
  1066. mga->linecomp
  1067. );
  1068. mga->crtc[0x00] = 0xff & mga->htotal;
  1069. mga->crtc[0x01] = 0xff & mga->hdispend;
  1070. mga->crtc[0x02] = 0xff & mga->hblkstr;
  1071. mga->crtc[0x03] = (0x1f & mga->hblkend)
  1072. | ((0x03 & mga->hdispskew) << 5)
  1073. | 0x80 /* cf 3-304 */
  1074. ;
  1075. mga->crtc[0x04] = 0xff & mga->hsyncstr;
  1076. mga->crtc[0x05] = (0x1f & mga->hsyncend)
  1077. | ((0x03 & mga->hsyncdel) << 5)
  1078. | ((0x01 & (mga->hblkend >> 5)) << 7)
  1079. ;
  1080. mga->crtc[0x06] = 0xff & mga->vtotal;
  1081. t = ((0x01 & (mga->vtotal >> 8)) << 0)
  1082. | ((0x01 & (mga->vdispend >> 8)) << 1)
  1083. | ((0x01 & (mga->vsyncstr >> 8)) << 2)
  1084. | ((0x01 & (mga->vblkstr >> 8)) << 3)
  1085. | ((0x01 & (mga->linecomp >> 8)) << 4)
  1086. | ((0x01 & (mga->vtotal >> 9)) << 5)
  1087. | ((0x01 & (mga->vdispend >> 9)) << 6)
  1088. | ((0x01 & (mga->vsyncstr >> 9)) << 7)
  1089. ;
  1090. mga->crtc[0x07] = 0xff & t;
  1091. mga->crtc[0x08] = (0x1f & mga->prowscan)
  1092. | ((0x03 & mga->bytepan) << 5)
  1093. ;
  1094. mga->crtc[0x09] = (0x1f & mga->maxscan)
  1095. | ((0x01 & (mga->vblkstr >> 9)) << 5)
  1096. | ((0x01 & (mga->linecomp >> 9)) << 6)
  1097. | ((0x01 & mga->conv2t4) << 7)
  1098. ;
  1099. mga->crtc[0x0a] = (0x1f & mga->currowstr)
  1100. | ((0x01 & mga->curoff) << 5)
  1101. ;
  1102. mga->crtc[0x0b] = (0x1f & mga->currowend)
  1103. | ((0x03 & mga->curskew) << 5)
  1104. ;
  1105. mga->crtc[0x0c] = 0xff & (mga->startadd >> 8);
  1106. mga->crtc[0x0d] = 0xff & mga->startadd;
  1107. mga->crtc[0x0e] = 0xff & (mga->curloc >> 8);
  1108. mga->crtc[0x0f] = 0xff & mga->curloc;
  1109. mga->crtc[0x10] = 0xff & mga->vsyncstr;
  1110. mga->crtc[0x11] = (0x0f & mga->vsyncend)
  1111. | ((0x01 & mga->vintclr) << 4)
  1112. | ((0x01 & mga->vinten) << 5)
  1113. | ((0x01 & mga->crtcprotect) << 7)
  1114. ;
  1115. mga->crtc[0x12] = 0xff & mga->vdispend;
  1116. mga->crtc[0x13] = 0xff & mga->offset;
  1117. mga->crtc[0x14] = 0x1f & mga->undrow; /* vga only */
  1118. mga->crtc[0x15] = 0xff & mga->vblkstr;
  1119. mga->crtc[0x16] = 0xff & mga->vblkend;
  1120. mga->crtc[0x17] = ((0x01 & mga->cms) << 0)
  1121. | ((0x01 & mga->selrowscan) << 1)
  1122. | ((0x01 & mga->hsyncsel) << 2)
  1123. | ((0x01 & mga->addwrap) << 5)
  1124. | ((0x01 & mga->wbmode) << 6)
  1125. | ((0x01 & mga->crtcrstN) << 7)
  1126. ;
  1127. mga->crtc[0x18] = 0xff & mga->linecomp;
  1128. mga->crtcext[0] = (0x0f & (mga->startadd >> 16))
  1129. | ((0x03 & (mga->offset >> 8)) << 4)
  1130. | ((0x01 & (mga->startadd >> 20)) << 6)
  1131. | ((0x01 & mga->interlace) << 7)
  1132. ;
  1133. mga->crtcext[1] = ((0x01 & (mga->htotal >> 8)) << 0)
  1134. | ((0x01 & (mga->hblkstr >> 8)) << 1)
  1135. | ((0x01 & (mga->hsyncstr >> 8)) << 2)
  1136. | ((0x01 & mga->hrsten) << 3)
  1137. | ((0x01 & mga->hsyncoff) << 4)
  1138. | ((0x01 & mga->vsyncoff) << 5)
  1139. | ((0x01 & (mga->hblkend >> 6)) << 6)
  1140. | ((0x01 & mga->vrsten) << 7)
  1141. ;
  1142. mga->crtcext[2] = ((0x03 & (mga->vtotal >> 10)) << 0)
  1143. | ((0x01 & (mga->vdispend >> 10)) << 2)
  1144. | ((0x03 & (mga->vblkstr >> 10)) << 3)
  1145. | ((0x03 & (mga->vsyncstr >> 10)) << 5)
  1146. | ((0x01 & (mga->linecomp >> 10)) << 7)
  1147. ;
  1148. mga->crtcext[3] = ((0x07 & mga->scale) << 0)
  1149. | ((0x01 & mga->csynccen) << 6)
  1150. | ((0x01 & mga->mgamode) << 7)
  1151. ;
  1152. mga->crtcext[4] = 0; /* memory page ... not used in Power Graphic Mode */
  1153. mga->crtcext[5] = 0; /* Not used in non-interlaced mode */
  1154. mga->crtcext[6] = ((0x07 & mga->hiprilvl) << 0)
  1155. | ((0x07 & mga->maxhipri) << 4)
  1156. ;
  1157. mga->crtcext[7] = ((0x07 & mga->winsize) << 1)
  1158. | ((0x07 & mga->winfreq) << 5)
  1159. ;
  1160. mga->crtcext[8] = (0x01 & (mga->startadd >> 21)) << 0;
  1161. /* Initialize Sequencer */
  1162. mga->sequencer[0] = 0;
  1163. mga->sequencer[1] = 0;
  1164. mga->sequencer[2] = 0x03;
  1165. mga->sequencer[3] = 0;
  1166. mga->sequencer[4] = 0x02;
  1167. /* Graphic Control registers are ignored when not using 0xA0000 aperture */
  1168. for (i = 0; i < 9; i++)
  1169. mga->graphics[i] = 0;
  1170. /* The Attribute Controler is not available in Power Graphics mode */
  1171. for (i = 0; i < 0x15; i++)
  1172. mga->attribute[i] = i;
  1173. /* disable vga load (want to do fields in different order) */
  1174. for(c = vga->link; c; c = c->link)
  1175. if (strncmp(c->name, "vga", 3) == 0)
  1176. c->load = nil;
  1177. }
  1178. static void
  1179. load(Vga* vga, Ctlr* ctlr)
  1180. {
  1181. Mga* mga;
  1182. int i;
  1183. uchar* p;
  1184. Mode* mode;
  1185. uchar cursor;
  1186. mga = vga->private;
  1187. mode = vga->mode;
  1188. trace("mga: Loading ...\n");
  1189. dump_all_regs(mga);
  1190. if (mode->z == 8)
  1191. setpalettedepth(mode->z);
  1192. trace("mga mmio at %#p\n", mga->mmio);
  1193. trace("mga: loading vga registers ...\n" );
  1194. if (ultradebug) Bflush(&stdout);
  1195. /* Initialize Sequencer registers */
  1196. for(i = 0; i < 5; i++)
  1197. seqset(mga, i, mga->sequencer[i], 0xff);
  1198. /* Initialize Attribute register */
  1199. for(i = 0; i < 0x15; i++)
  1200. attrset(mga, i, mga->attribute[i], 0xff);
  1201. /* Initialize Graphic Control registers */
  1202. for(i = 0; i < 9; i++)
  1203. gctlset(mga, i, mga->graphics[i], 0xff);
  1204. /* Wait VSYNC */
  1205. while (mgaread8(mga, STATUS1) & 0x08);
  1206. while (! (mgaread8(mga, STATUS1) & ~0x08));
  1207. /* Turn off the video. */
  1208. seqset(mga, Seq_ClockingMode, Scroff, 0);
  1209. /* Crtc2 Off */
  1210. mgawrite32(mga, C2_CTL, 0);
  1211. /* Disable Cursor */
  1212. cursor = dacset(mga, Dac_Xcurctrl, CursorDis, 0xff);
  1213. /* Pixel Pll UP and set Pixel clock source to Pixel Clock PLL */
  1214. dacset(mga, Dac_Xpixclkctrl, 0x01 | 0x08, 0x0f);
  1215. trace("mga: waiting for the clock source becomes stable ...\n");
  1216. while ((dacget(mga, Dac_Xpixpllstat) & Pixlock) != Pixlock)
  1217. ;
  1218. trace("mga: pixpll locked !\n");
  1219. if (ultradebug) Bflush(&stdout);
  1220. /* Enable LUT, Disable MAFC */
  1221. dacset(mga, Dac_Xmiscctrl, Ramcs | Mfcsel, Vdoutsel);
  1222. /* Disable Dac */
  1223. dacset(mga, Dac_Xmiscctrl, 0, Dacpdn);
  1224. /* Initialize Panel Mode */
  1225. dacset(mga, Dac_Xpanelmode, 0, 0xff);
  1226. /* Disable the PIXCLK and set Pixel clock source to Pixel Clock PLL */
  1227. dacset(mga, Dac_Xpixclkctrl, Pixclkdis | 0x01, 0x3);
  1228. /* Disable mapping of the memory */
  1229. miscset(mga, 0, Misc_rammapen);
  1230. /* Enable 8 bit palette */
  1231. dacset(mga, Dac_Xmiscctrl, Vga8dac, 0);
  1232. /* Select MGA Pixel Clock */
  1233. miscset(mga, Misc_clksel, 0);
  1234. /* Initialize Z Buffer ... (useful?) */
  1235. mgawrite32(mga, Z_DEPTH_ORG, 0);
  1236. /* Wait */
  1237. for (i = 0; i < 50; i++)
  1238. mgaread32(mga, MGA_STATUS);
  1239. if ((mga->devid == MGA200) || ((mga->devid == MGA4XX) && (mga->revid & 0x80) == 0x00)) {
  1240. dacset(mga, Dac_Xpixpllcm, mga->pixpll_m, 0xff);
  1241. dacset(mga, Dac_Xpixpllcn, mga->pixpll_n, 0xff);
  1242. dacset(mga, Dac_Xpixpllcp, mga->pixpll_p, 0xff);
  1243. /* Wait until new clock becomes stable */
  1244. trace("mga: waiting for the clock source becomes stable ...\n");
  1245. while ((dacget(mga, Dac_Xpixpllstat) & Pixlock) != Pixlock)
  1246. ;
  1247. trace("mga: pixpll locked !\n");
  1248. } else {
  1249. /* MGA450 and MGA550 */
  1250. /* Wait until new clock becomes stable */
  1251. trace("mga450: waiting for the clock source becomes stable ...\n");
  1252. while ((dacget(mga, Dac_Xpixpllstat) & Pixlock) != Pixlock)
  1253. ;
  1254. trace("mga: pixpll locked !\n");
  1255. G450SetPLLFreq(mga, (long) mga->Fneeded / 1000);
  1256. }
  1257. /* Enable Pixel Clock Oscillation */
  1258. dacset(mga, Dac_Xpixclkctrl, 0, Pixclkdis);
  1259. if (ultradebug) Bflush(&stdout);
  1260. /* Enable Dac */
  1261. dacset(mga, Dac_Xmiscctrl, Dacpdn, 0);
  1262. /* Set Video Mode */
  1263. switch (mode->z) {
  1264. case 8:
  1265. dacset(mga, Dac_Xmulctrl, _8bitsPerPixel, ColorDepth);
  1266. break;
  1267. case 32:
  1268. dacset(mga, Dac_Xmulctrl, _32bitsPerPixel, ColorDepth);
  1269. break;
  1270. default:
  1271. error("Unsupported depth %d\n", mode->z);
  1272. }
  1273. /* Wait */
  1274. for (i = 0; i < 50; i++)
  1275. mgaread32(mga, MGA_STATUS);
  1276. /* Wait until new clock becomes stable */
  1277. trace("mga: waiting for the clock source becomes stable ...\n");
  1278. if (ultradebug) Bflush(&stdout);
  1279. while ((dacget(mga, Dac_Xpixpllstat) & Pixlock) != Pixlock)
  1280. ;
  1281. trace("mga: pixpll locked !\n");
  1282. if (ultradebug) Bflush(&stdout);
  1283. /* Initialize CRTC registers and remove irq */
  1284. crtcset(mga, 0x11, (1<<4), (1<<5)|0x80);
  1285. for (i = 0; i < 25; i++)
  1286. crtcset(mga, i, mga->crtc[i], 0xff);
  1287. trace("mga: crtc loaded !\n");
  1288. if (ultradebug) Bflush(&stdout);
  1289. /* Initialize CRTC Extension registers */
  1290. for (i = 0; i < 9; i++)
  1291. crtcextset(mga, i, mga->crtcext[i], 0xff);
  1292. trace("mga: ext loaded !\n");
  1293. if (ultradebug) Bflush(&stdout);
  1294. /* Disable Zoom */
  1295. dacset(mga, Dac_Xzoomctrl, 0, 0xff);
  1296. trace("mga: XzoomCtrl Loaded !\n");
  1297. if (ultradebug) Bflush(&stdout);
  1298. /* Enable mga mode again ... Just in case :) */
  1299. crtcextset(mga, CrtcExt_Miscellaneous, Mgamode, 0);
  1300. trace("mga: crtcext MgaMode loaded !\n");
  1301. if (ultradebug) Bflush(&stdout);
  1302. if (mode->z == 32) {
  1303. /* Initialize Big Endian Mode ! */
  1304. mgawrite32(mga, 0x1e54, 0x02 << 16);
  1305. }
  1306. /* Set final misc ... enable mapping ... */
  1307. miscset(mga, mga->misc | Misc_rammapen, 0);
  1308. trace("mga: mapping enabled !\n");
  1309. if (ultradebug) Bflush(&stdout);
  1310. /* Enable Screen */
  1311. seqset(mga, 1, 0, 0xff);
  1312. trace("screen enabled ...\n");
  1313. if (0) {
  1314. p = mga->mmfb;
  1315. for (i = 0; i < mga->fbsize; i++)
  1316. *p++ = (0xff & i);
  1317. }
  1318. trace("mga: Loaded !\n" );
  1319. dump_all_regs(mga);
  1320. if (ultradebug) Bflush(&stdout);
  1321. trace("mga: Loaded [bis]!\n" );
  1322. if (mode->z != 8) {
  1323. /* Initialize Palette */
  1324. mgawrite8(mga, RAMDACIDX, 0);
  1325. for (i = 0; i < 0x100; i++) {
  1326. mgawrite8(mga, RAMDACPALDATA, i);
  1327. mgawrite8(mga, RAMDACPALDATA, i);
  1328. mgawrite8(mga, RAMDACPALDATA, i);
  1329. }
  1330. }
  1331. trace("mga: Palette initialised !\n");
  1332. /* Enable Cursor */
  1333. dacset(mga, Dac_Xcurctrl, cursor, 0xff);
  1334. ctlr->flag |= Fload;
  1335. if (ultradebug) Bflush(&stdout);
  1336. }
  1337. Ctlr mga4xx = {
  1338. "mga4xx", /* name */
  1339. snarf, /* snarf */
  1340. options, /* options */
  1341. init, /* init */
  1342. load, /* load */
  1343. dump, /* dump */
  1344. };
  1345. Ctlr mga4xxhwgc = {
  1346. "mga4xxhwgc", /* name */
  1347. 0, /* snarf */
  1348. 0, /* options */
  1349. 0, /* init */
  1350. 0, /* load */
  1351. dump, /* dump */
  1352. };