mach-e558-v2.c 4.4 KB

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  1. /*
  2. * Qxwlan E558 v2 board support
  3. *
  4. * Copyright (C) 2017 Peng Zhang <sd20@qxwlan.com>
  5. *
  6. * This program is free software; you can redistribute it and/or modify it
  7. * under the terms of the GNU General Public License version 2 as published
  8. * by the Free Software Foundation.
  9. */
  10. #include <linux/phy.h>
  11. #include <linux/gpio.h>
  12. #include <linux/platform_device.h>
  13. #include <linux/ath9k_platform.h>
  14. #include <linux/ar8216_platform.h>
  15. #include <asm/mach-ath79/ar71xx_regs.h>
  16. #include "common.h"
  17. #include "dev-ap9x-pci.h"
  18. #include "dev-eth.h"
  19. #include "dev-gpio-buttons.h"
  20. #include "dev-leds-gpio.h"
  21. #include "dev-m25p80.h"
  22. #include "dev-spi.h"
  23. #include "dev-usb.h"
  24. #include "dev-wmac.h"
  25. #include "machtypes.h"
  26. #include "pci.h"
  27. #define E558_V2_GPIO_LED_WLAN 13
  28. #define E558_V2_GPIO_LED_SYSTEM 14
  29. #define E558_V2_GPIO_LED_QSS 15
  30. #define E558_V2_GPIO_BTN_RESET 16
  31. #define E558_V2_KEYS_POLL_INTERVAL 20 /* msecs */
  32. #define E558_V2_KEYS_DEBOUNCE_INTERVAL (3 * E558_V2_KEYS_POLL_INTERVAL)
  33. static struct gpio_led e558_v2_leds_gpio[] __initdata = {
  34. {
  35. .name = "e558-v2:green:qss",
  36. .gpio = E558_V2_GPIO_LED_QSS,
  37. .active_low = 1,
  38. },
  39. {
  40. .name = "e558-v2:green:system",
  41. .gpio = E558_V2_GPIO_LED_SYSTEM,
  42. .active_low = 1,
  43. },
  44. {
  45. .name = "e558-v2:green:wlan",
  46. .gpio = E558_V2_GPIO_LED_WLAN,
  47. .active_low = 1,
  48. },
  49. };
  50. static struct gpio_keys_button e558_v2_gpio_keys[] __initdata = {
  51. {
  52. .desc = "reset",
  53. .type = EV_KEY,
  54. .code = KEY_RESTART,
  55. .debounce_interval = E558_V2_KEYS_DEBOUNCE_INTERVAL,
  56. .gpio = E558_V2_GPIO_BTN_RESET,
  57. .active_low = 1,
  58. },
  59. };
  60. /* GMAC0 of the AR8327 switch is connected to the QCA9558 SoC via SGMII */
  61. static struct ar8327_pad_cfg e558_v2_ar8327_pad0_cfg = {
  62. .mode = AR8327_PAD_MAC_SGMII,
  63. .sgmii_delay_en = true,
  64. };
  65. /* GMAC6 of the AR8327 switch is connected to the QCA9558 SoC via RGMII */
  66. static struct ar8327_pad_cfg e558_v2_ar8327_pad6_cfg = {
  67. .mode = AR8327_PAD_MAC_RGMII,
  68. .txclk_delay_en = true,
  69. .rxclk_delay_en = true,
  70. .txclk_delay_sel = AR8327_CLK_DELAY_SEL1,
  71. .rxclk_delay_sel = AR8327_CLK_DELAY_SEL2,
  72. };
  73. static const struct ar8327_led_info e558_v2_leds_qca8334[] = {
  74. AR8327_LED_INFO(PHY2_0, HW, "e558-v2:green:wan"),
  75. AR8327_LED_INFO(PHY3_0, HW, "e558-v2:green:lan1"),
  76. AR8327_LED_INFO(PHY4_0, HW, "e558-v2:green:lan2"),
  77. };
  78. static struct ar8327_led_cfg e558_v2_ar8327_led_cfg = {
  79. .led_ctrl0 = 0xc737c737,
  80. .led_ctrl1 = 0x00000000,
  81. .led_ctrl2 = 0x00000000,
  82. .led_ctrl3 = 0x0030c300,
  83. .open_drain = false,
  84. };
  85. static struct ar8327_platform_data e558_v2_ar8327_data = {
  86. .pad0_cfg = &e558_v2_ar8327_pad0_cfg,
  87. .pad6_cfg = &e558_v2_ar8327_pad6_cfg,
  88. .port0_cfg = {
  89. .force_link = 1,
  90. .speed = AR8327_PORT_SPEED_1000,
  91. .duplex = 1,
  92. .txpause = 1,
  93. .rxpause = 1,
  94. },
  95. .port6_cfg = {
  96. .force_link = 1,
  97. .speed = AR8327_PORT_SPEED_1000,
  98. .duplex = 1,
  99. .txpause = 1,
  100. .rxpause = 1,
  101. },
  102. .led_cfg = &e558_v2_ar8327_led_cfg,
  103. .leds = e558_v2_leds_qca8334,
  104. .num_leds = ARRAY_SIZE(e558_v2_leds_qca8334),
  105. };
  106. static struct mdio_board_info e558_v2_mdio0_info[] = {
  107. {
  108. .bus_id = "ag71xx-mdio.0",
  109. .mdio_addr = 0,
  110. .platform_data = &e558_v2_ar8327_data,
  111. },
  112. };
  113. static void __init e558_v2_setup(void)
  114. {
  115. u8 *mac = (u8 *) KSEG1ADDR(0x1f050400);
  116. u8 *art = (u8 *) KSEG1ADDR(0x1f061000);
  117. ath79_register_m25p80(NULL);
  118. ath79_register_leds_gpio(-1, ARRAY_SIZE(e558_v2_leds_gpio),
  119. e558_v2_leds_gpio);
  120. ath79_register_gpio_keys_polled(-1, E558_V2_KEYS_POLL_INTERVAL,
  121. ARRAY_SIZE(e558_v2_gpio_keys),
  122. e558_v2_gpio_keys);
  123. ath79_register_mdio(0, 0x0);
  124. mdiobus_register_board_info(e558_v2_mdio0_info,
  125. ARRAY_SIZE(e558_v2_mdio0_info));
  126. ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN);
  127. /* GMAC0 is connected to the RMGII interface */
  128. ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
  129. ath79_eth0_data.phy_mask = BIT(0);
  130. ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev;
  131. ath79_eth0_pll_data.pll_1000 = 0x56000000;
  132. ath79_init_mac(ath79_eth0_data.mac_addr, mac, 1);
  133. ath79_register_eth(0);
  134. /* GMAC1 is connected to the SGMII interface */
  135. ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_SGMII;
  136. ath79_eth1_data.speed = SPEED_1000;
  137. ath79_eth1_data.duplex = DUPLEX_FULL;
  138. ath79_eth1_pll_data.pll_1000 = 0x03000101;
  139. ath79_init_mac(ath79_eth1_data.mac_addr, mac, 0);
  140. ath79_register_eth(1);
  141. ath79_register_pci();
  142. ath79_register_usb();
  143. ath79_register_wmac(art, NULL);
  144. }
  145. MIPS_MACHINE(ATH79_MACH_E558_V2, "E558-V2", "Qxwlan E558 v2",
  146. e558_v2_setup);