470-MIPS-ath79-swizzle-pci-address-for-ar71xx.patch 3.1 KB

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  1. --- /dev/null
  2. +++ b/arch/mips/include/asm/mach-ath79/mangle-port.h
  3. @@ -0,0 +1,37 @@
  4. +/*
  5. + * Copyright (C) 2012 Gabor Juhos <juhosg@openwrt.org>
  6. + *
  7. + * This file was derived from: inlude/asm-mips/mach-generic/mangle-port.h
  8. + * Copyright (C) 2003, 2004 Ralf Baechle
  9. + *
  10. + * This program is free software; you can redistribute it and/or modify it
  11. + * under the terms of the GNU General Public License version 2 as published
  12. + * by the Free Software Foundation.
  13. + */
  14. +
  15. +#ifndef __ASM_MACH_ATH79_MANGLE_PORT_H
  16. +#define __ASM_MACH_ATH79_MANGLE_PORT_H
  17. +
  18. +#ifdef CONFIG_PCI
  19. +extern unsigned long (ath79_pci_swizzle_b)(unsigned long port);
  20. +extern unsigned long (ath79_pci_swizzle_w)(unsigned long port);
  21. +#else
  22. +#define ath79_pci_swizzle_b(port) (port)
  23. +#define ath79_pci_swizzle_w(port) (port)
  24. +#endif
  25. +
  26. +#define __swizzle_addr_b(port) ath79_pci_swizzle_b(port)
  27. +#define __swizzle_addr_w(port) ath79_pci_swizzle_w(port)
  28. +#define __swizzle_addr_l(port) (port)
  29. +#define __swizzle_addr_q(port) (port)
  30. +
  31. +# define ioswabb(a, x) (x)
  32. +# define __mem_ioswabb(a, x) (x)
  33. +# define ioswabw(a, x) (x)
  34. +# define __mem_ioswabw(a, x) cpu_to_le16(x)
  35. +# define ioswabl(a, x) (x)
  36. +# define __mem_ioswabl(a, x) cpu_to_le32(x)
  37. +# define ioswabq(a, x) (x)
  38. +# define __mem_ioswabq(a, x) cpu_to_le64(x)
  39. +
  40. +#endif /* __ASM_MACH_ATH79_MANGLE_PORT_H */
  41. --- a/arch/mips/ath79/pci.c
  42. +++ b/arch/mips/ath79/pci.c
  43. @@ -13,6 +13,7 @@
  44. */
  45. #include <linux/init.h>
  46. +#include <linux/export.h>
  47. #include <linux/pci.h>
  48. #include <linux/resource.h>
  49. #include <linux/platform_device.h>
  50. @@ -25,6 +26,9 @@ static int (*ath79_pci_plat_dev_init)(st
  51. static const struct ath79_pci_irq *ath79_pci_irq_map;
  52. static unsigned ath79_pci_nr_irqs;
  53. +static unsigned long (*__ath79_pci_swizzle_b)(unsigned long port);
  54. +static unsigned long (*__ath79_pci_swizzle_w)(unsigned long port);
  55. +
  56. static const struct ath79_pci_irq ar71xx_pci_irq_map[] = {
  57. {
  58. .slot = 17,
  59. @@ -212,12 +216,50 @@ ath79_register_pci_ar724x(int id,
  60. return pdev;
  61. }
  62. +static inline bool ar71xx_is_pci_addr(unsigned long port)
  63. +{
  64. + unsigned long phys = CPHYSADDR(port);
  65. +
  66. + return (phys >= AR71XX_PCI_MEM_BASE &&
  67. + phys < AR71XX_PCI_MEM_BASE + AR71XX_PCI_MEM_SIZE);
  68. +}
  69. +
  70. +static unsigned long ar71xx_pci_swizzle_b(unsigned long port)
  71. +{
  72. + return ar71xx_is_pci_addr(port) ? port ^ 3 : port;
  73. +}
  74. +
  75. +static unsigned long ar71xx_pci_swizzle_w(unsigned long port)
  76. +{
  77. + return ar71xx_is_pci_addr(port) ? port ^ 2 : port;
  78. +}
  79. +
  80. +unsigned long ath79_pci_swizzle_b(unsigned long port)
  81. +{
  82. + if (__ath79_pci_swizzle_b)
  83. + return __ath79_pci_swizzle_b(port);
  84. +
  85. + return port;
  86. +}
  87. +EXPORT_SYMBOL(ath79_pci_swizzle_b);
  88. +
  89. +unsigned long ath79_pci_swizzle_w(unsigned long port)
  90. +{
  91. + if (__ath79_pci_swizzle_w)
  92. + return __ath79_pci_swizzle_w(port);
  93. +
  94. + return port;
  95. +}
  96. +EXPORT_SYMBOL(ath79_pci_swizzle_w);
  97. +
  98. int __init ath79_register_pci(void)
  99. {
  100. struct platform_device *pdev = NULL;
  101. if (soc_is_ar71xx()) {
  102. pdev = ath79_register_pci_ar71xx();
  103. + __ath79_pci_swizzle_b = ar71xx_pci_swizzle_b;
  104. + __ath79_pci_swizzle_w = ar71xx_pci_swizzle_w;
  105. } else if (soc_is_ar724x()) {
  106. pdev = ath79_register_pci_ar724x(-1,
  107. AR724X_PCI_CFG_BASE,