606-MIPS-ath79-pb44-fixes.patch 3.7 KB

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  1. --- a/arch/mips/ath79/mach-pb44.c
  2. +++ b/arch/mips/ath79/mach-pb44.c
  3. @@ -8,23 +8,47 @@
  4. * by the Free Software Foundation.
  5. */
  6. +#include <linux/delay.h>
  7. #include <linux/init.h>
  8. #include <linux/platform_device.h>
  9. #include <linux/i2c.h>
  10. #include <linux/i2c-gpio.h>
  11. #include <linux/platform_data/pcf857x.h>
  12. +#include <linux/spi/flash.h>
  13. +#include <linux/spi/vsc7385.h>
  14. #include "machtypes.h"
  15. +#include <asm/mach-ath79/ar71xx_regs.h>
  16. +#include <asm/mach-ath79/ath79.h>
  17. +#include "dev-eth.h"
  18. #include "dev-gpio-buttons.h"
  19. #include "dev-leds-gpio.h"
  20. #include "dev-spi.h"
  21. #include "dev-usb.h"
  22. +#include "machtypes.h"
  23. #include "pci.h"
  24. #define PB44_GPIO_I2C_SCL 0
  25. #define PB44_GPIO_I2C_SDA 1
  26. +#define PB44_PCF8757_VSC7395_CS 0
  27. +#define PB44_PCF8757_STEREO_CS 1
  28. +#define PB44_PCF8757_SLIC_CS0 2
  29. +#define PB44_PCF8757_SLIC_TEST 3
  30. +#define PB44_PCF8757_SLIC_INT0 4
  31. +#define PB44_PCF8757_SLIC_INT1 5
  32. +#define PB44_PCF8757_SW_RESET 6
  33. +#define PB44_PCF8757_SW_JUMP 8
  34. +#define PB44_PCF8757_LED_JUMP1 9
  35. +#define PB44_PCF8757_LED_JUMP2 10
  36. +#define PB44_PCF8757_TP24 11
  37. +#define PB44_PCF8757_TP25 12
  38. +#define PB44_PCF8757_TP26 13
  39. +#define PB44_PCF8757_TP27 14
  40. +#define PB44_PCF8757_TP28 15
  41. +
  42. #define PB44_GPIO_EXP_BASE 16
  43. +#define PB44_GPIO_VSC7395_CS (PB44_GPIO_EXP_BASE + PB44_PCF8757_VSC7395_CS)
  44. #define PB44_GPIO_SW_RESET (PB44_GPIO_EXP_BASE + 6)
  45. #define PB44_GPIO_SW_JUMP (PB44_GPIO_EXP_BASE + 8)
  46. #define PB44_GPIO_LED_JUMP1 (PB44_GPIO_EXP_BASE + 9)
  47. @@ -87,20 +111,59 @@ static struct gpio_keys_button pb44_gpio
  48. }
  49. };
  50. +static void pb44_vsc7395_reset(void)
  51. +{
  52. + ath79_device_reset_set(AR71XX_RESET_GE1_PHY);
  53. + udelay(10);
  54. + ath79_device_reset_clear(AR71XX_RESET_GE1_PHY);
  55. + mdelay(50);
  56. +}
  57. +
  58. +static struct vsc7385_platform_data pb44_vsc7395_data = {
  59. + .reset = pb44_vsc7395_reset,
  60. + .ucode_name = "vsc7395_ucode_pb44.bin",
  61. + .mac_cfg = {
  62. + .tx_ipg = 6,
  63. + .bit2 = 1,
  64. + .clk_sel = 0,
  65. + },
  66. +};
  67. +
  68. +static const char *pb44_part_probes[] = {
  69. + "RedBoot",
  70. + NULL,
  71. +};
  72. +
  73. +static struct flash_platform_data pb44_flash_data = {
  74. + .part_probes = pb44_part_probes,
  75. +};
  76. +
  77. static struct spi_board_info pb44_spi_info[] = {
  78. {
  79. .bus_num = 0,
  80. .chip_select = 0,
  81. .max_speed_hz = 25000000,
  82. .modalias = "m25p64",
  83. + .platform_data = &pb44_flash_data,
  84. },
  85. + {
  86. + .bus_num = 0,
  87. + .chip_select = 1,
  88. + .max_speed_hz = 25000000,
  89. + .modalias = "spi-vsc7385",
  90. + .platform_data = &pb44_vsc7395_data,
  91. + }
  92. };
  93. static struct ath79_spi_platform_data pb44_spi_data = {
  94. .bus_num = 0,
  95. - .num_chipselect = 1,
  96. + .num_chipselect = 2,
  97. };
  98. +#define PB44_WAN_PHYMASK BIT(0)
  99. +#define PB44_LAN_PHYMASK 0
  100. +#define PB44_MDIO_PHYMASK (PB44_LAN_PHYMASK | PB44_WAN_PHYMASK)
  101. +
  102. static void __init pb44_init(void)
  103. {
  104. i2c_register_board_info(0, pb44_i2c_board_info,
  105. @@ -116,6 +179,22 @@ static void __init pb44_init(void)
  106. ARRAY_SIZE(pb44_spi_info));
  107. ath79_register_usb();
  108. ath79_register_pci();
  109. +
  110. + ath79_register_mdio(0, ~PB44_MDIO_PHYMASK);
  111. +
  112. + ath79_init_mac(ath79_eth0_data.mac_addr, ath79_mac_base, 0);
  113. + ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
  114. + ath79_eth0_data.phy_mask = PB44_WAN_PHYMASK;
  115. +
  116. + ath79_register_eth(0);
  117. +
  118. + ath79_init_mac(ath79_eth1_data.mac_addr, ath79_mac_base, 1);
  119. + ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
  120. + ath79_eth1_data.speed = SPEED_1000;
  121. + ath79_eth1_data.duplex = DUPLEX_FULL;
  122. + ath79_eth1_pll_data.pll_1000 = 0x110000;
  123. +
  124. + ath79_register_eth(1);
  125. }
  126. MIPS_MACHINE(ATH79_MACH_PB44, "PB44", "Atheros PB44 reference board",
  127. --- a/arch/mips/ath79/Kconfig
  128. +++ b/arch/mips/ath79/Kconfig
  129. @@ -58,6 +58,7 @@ config ATH79_MACH_DB120
  130. config ATH79_MACH_PB44
  131. bool "Atheros PB44 reference board"
  132. select SOC_AR71XX
  133. + select ATH79_DEV_ETH
  134. select ATH79_DEV_GPIO_BUTTONS
  135. select ATH79_DEV_LEDS_GPIO
  136. select ATH79_DEV_SPI