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- --- a/arch/mips/ath79/pci.c
- +++ b/arch/mips/ath79/pci.c
- @@ -53,6 +53,15 @@ static const struct ath79_pci_irq ar724x
- }
- };
-
- +static const struct ath79_pci_irq qca953x_pci_irq_map[] = {
- + {
- + .bus = 0,
- + .slot = 0,
- + .pin = 1,
- + .irq = ATH79_PCI_IRQ(0),
- + },
- +};
- +
- static const struct ath79_pci_irq qca955x_pci_irq_map[] = {
- {
- .bus = 0,
- @@ -98,6 +107,9 @@ int pcibios_map_irq(const struct pci_dev
- soc_is_ar9344()) {
- ath79_pci_irq_map = ar724x_pci_irq_map;
- ath79_pci_nr_irqs = ARRAY_SIZE(ar724x_pci_irq_map);
- + } else if (soc_is_qca953x()) {
- + ath79_pci_irq_map = qca953x_pci_irq_map;
- + ath79_pci_nr_irqs = ARRAY_SIZE(qca953x_pci_irq_map);
- } else if (soc_is_qca955x()) {
- ath79_pci_irq_map = qca955x_pci_irq_map;
- ath79_pci_nr_irqs = ARRAY_SIZE(qca955x_pci_irq_map);
- @@ -303,6 +315,15 @@ int __init ath79_register_pci(void)
- AR724X_PCI_MEM_SIZE,
- 0,
- ATH79_IP2_IRQ(0));
- + } else if (soc_is_qca9533()) {
- + pdev = ath79_register_pci_ar724x(0,
- + QCA953X_PCI_CFG_BASE0,
- + QCA953X_PCI_CTRL_BASE0,
- + QCA953X_PCI_CRP_BASE0,
- + QCA953X_PCI_MEM_BASE0,
- + QCA953X_PCI_MEM_SIZE,
- + 0,
- + ATH79_IP2_IRQ(0));
- } else if (soc_is_qca9558()) {
- pdev = ath79_register_pci_ar724x(0,
- QCA955X_PCI_CFG_BASE0,
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