ar9330.dtsi 3.5 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
  2. #include <dt-bindings/clock/ath79-clk.h>
  3. #include "ath79.dtsi"
  4. / {
  5. compatible = "qca,ar9330";
  6. #address-cells = <1>;
  7. #size-cells = <1>;
  8. cpus {
  9. #address-cells = <1>;
  10. #size-cells = <0>;
  11. cpu@0 {
  12. device_type = "cpu";
  13. compatible = "mips,mips24Kc";
  14. clocks = <&pll ATH79_CLK_CPU>;
  15. reg = <0>;
  16. };
  17. };
  18. chosen {
  19. bootargs = "console=ttyATH0,115200";
  20. };
  21. ahb {
  22. apb {
  23. ddr_ctrl: memory-controller@18000000 {
  24. compatible = "qca,ar7240-ddr-controller";
  25. reg = <0x18000000 0x100>;
  26. #qca,ddr-wb-channel-cells = <1>;
  27. };
  28. uart: uart@18020000 {
  29. compatible = "qca,ar9330-uart";
  30. reg = <0x18020000 0x14>;
  31. interrupts = <3>;
  32. clocks = <&pll ATH79_CLK_REF>;
  33. clock-names = "uart";
  34. status = "disabled";
  35. };
  36. gpio: gpio@18040000 {
  37. compatible = "qca,ar7100-gpio";
  38. reg = <0x18040000 0x34>;
  39. interrupts = <2>;
  40. ngpios = <30>;
  41. gpio-controller;
  42. #gpio-cells = <2>;
  43. interrupt-controller;
  44. #interrupt-cells = <2>;
  45. status = "disabled";
  46. };
  47. pinmux: pinmux@18040028 {
  48. compatible = "pinctrl-single";
  49. reg = <0x18040028 0x8>;
  50. pinctrl-single,bit-per-mux;
  51. pinctrl-single,register-width = <32>;
  52. pinctrl-single,function-mask = <0x1>;
  53. #pinctrl-cells = <2>;
  54. jtag_disable_pins: pinmux_jtag_disable_pins {
  55. pinctrl-single,bits = <0x0 0x1 0x1>;
  56. };
  57. switch_led_pins: pinmux_switch_led_pins {
  58. pinctrl-single,bits = <0x0 0x1f 0xf8>;
  59. };
  60. };
  61. pll: pll-controller@18050000 {
  62. compatible = "qca,ar9330-pll";
  63. reg = <0x18050000 0x100>;
  64. #clock-cells = <1>;
  65. };
  66. rst: reset-controller@1806001c {
  67. compatible = "qca,ar7100-reset";
  68. reg = <0x1806001c 0x4>;
  69. #reset-cells = <1>;
  70. };
  71. };
  72. usb: usb@1b000000 {
  73. compatible = "chipidea,usb2";
  74. reg = <0x1b000000 0x200>;
  75. interrupts = <3>;
  76. resets = <&rst 5>;
  77. reset-names = "usb-host";
  78. phy-names = "usb-phy";
  79. phys = <&usb_phy>;
  80. status = "disabled";
  81. };
  82. spi: spi@1f000000 {
  83. compatible = "qca,ar7100-spi";
  84. reg = <0x1f000000 0x10>;
  85. clocks = <&pll ATH79_CLK_AHB>;
  86. clock-names = "ahb";
  87. #address-cells = <1>;
  88. #size-cells = <0>;
  89. status = "disabled";
  90. };
  91. gmac: gmac@18070000 {
  92. compatible = "qca,ar9330-gmac";
  93. reg = <0x18070000 0x4>;
  94. };
  95. wmac: wmac@18100000 {
  96. compatible = "qca,ar9330-wmac";
  97. reg = <0x18100000 0x20000>;
  98. interrupts = <2>;
  99. status = "disabled";
  100. };
  101. };
  102. usb_phy: usb-phy {
  103. compatible = "qca,ar7200-usb-phy";
  104. reset-names = "usb-phy", "usb-suspend-override";
  105. resets = <&rst 4>, <&rst 3>;
  106. #phy-cells = <0>;
  107. status = "disabled";
  108. };
  109. };
  110. &cpuintc {
  111. qca,ddr-wb-channel-interrupts = <2>, <3>;
  112. qca,ddr-wb-channels = <&ddr_ctrl 3>, <&ddr_ctrl 2>;
  113. };
  114. &eth0 {
  115. compatible = "qca,ar9330-eth", "syscon";
  116. pll-data = <0x00110000 0x00001099 0x00991099>;
  117. resets = <&rst 9>;
  118. reset-names = "mac";
  119. phy-mode = "mii";
  120. phy-handle = <&swphy4>;
  121. };
  122. &mdio1 {
  123. status = "okay";
  124. compatible = "qca,ar9330-mdio";
  125. resets = <&rst 23>;
  126. reset-names = "mdio";
  127. builtin-switch;
  128. builtin_switch: switch0@1f {
  129. compatible = "qca,ar8216-builtin";
  130. reg = <0x1f>;
  131. resets = <&rst 8>;
  132. reset-names = "switch";
  133. mdio-bus {
  134. #address-cells = <1>;
  135. #size-cells = <0>;
  136. swphy4: ethernet-phy@4 {
  137. reg = <4>;
  138. phy-mode = "mii";
  139. };
  140. };
  141. };
  142. };
  143. &eth1 {
  144. compatible = "qca,ar9330-eth", "syscon", "simple-mfd";
  145. pll-data = <0x00110000 0x00001099 0x00991099>;
  146. phy-mode = "gmii";
  147. resets = <&rst 13>;
  148. reset-names = "mac";
  149. fixed-link {
  150. speed = <1000>;
  151. full-duplex;
  152. };
  153. };