030-arm64-allwinner-a64-add-Ethernet-PHY-regulator-for-s.patch 1.7 KB

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  1. From bdfe4cebea11476d278b1b98dd0f7cdac8269d62 Mon Sep 17 00:00:00 2001
  2. From: Icenowy Zheng <icenowy@aosc.io>
  3. Date: Fri, 10 Nov 2017 17:26:54 +0800
  4. Subject: [PATCH] arm64: allwinner: a64: add Ethernet PHY regulator for several
  5. boards
  6. On several A64 boards the Ethernet PHY is powered by the DC1SW regulator
  7. on the AXP803 PMIC.
  8. Add phy-handle property to these boards' emac node.
  9. Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
  10. Acked-by: Corentin LABBE <clabbe.montjoie@gmail.com>
  11. Tested-by: Corentin LABBE <clabbe.montjoie@gmail.com>
  12. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
  13. ---
  14. arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts | 1 +
  15. arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts | 1 +
  16. arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts | 1 +
  17. 3 files changed, 3 insertions(+)
  18. --- a/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts
  19. +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts
  20. @@ -75,6 +75,7 @@
  21. pinctrl-0 = <&rgmii_pins>;
  22. phy-mode = "rgmii";
  23. phy-handle = <&ext_rgmii_phy>;
  24. + phy-supply = <&reg_dc1sw>;
  25. status = "okay";
  26. };
  27. --- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
  28. +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
  29. @@ -77,6 +77,7 @@
  30. pinctrl-0 = <&rmii_pins>;
  31. phy-mode = "rmii";
  32. phy-handle = <&ext_rmii_phy1>;
  33. + phy-supply = <&reg_dc1sw>;
  34. status = "okay";
  35. };
  36. --- a/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts
  37. +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts
  38. @@ -82,6 +82,7 @@
  39. pinctrl-0 = <&rgmii_pins>;
  40. phy-mode = "rgmii";
  41. phy-handle = <&ext_rgmii_phy>;
  42. + phy-supply = <&reg_dc1sw>;
  43. status = "okay";
  44. };