061-v4.10-0002-mtd-spi-nor-fix-spansion-quad-enable.patch 1.4 KB

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  1. From 807c16253319ee6ccf8873ae64f070f7eb532cd5 Mon Sep 17 00:00:00 2001
  2. From: =?UTF-8?q?Jo=C3=ABl=20Esponde?= <joel.esponde@honeywell.com>
  3. Date: Wed, 23 Nov 2016 12:47:40 +0100
  4. Subject: [PATCH] mtd: spi-nor: fix spansion quad enable
  5. MIME-Version: 1.0
  6. Content-Type: text/plain; charset=UTF-8
  7. Content-Transfer-Encoding: 8bit
  8. With the S25FL127S nor flash part, each writing to the configuration
  9. register takes hundreds of ms. During that time, no more accesses to
  10. the flash should be done (even reads).
  11. This commit adds a wait loop after the register writing until the flash
  12. finishes its work.
  13. This issue could make rootfs mounting fail when the latter was done too
  14. much closely to this quad enable bit setting step. And in this case, a
  15. driver as UBIFS may try to recover the filesystem and may broke it
  16. completely.
  17. Signed-off-by: Joël Esponde <joel.esponde@honeywell.com>
  18. Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com>
  19. ---
  20. drivers/mtd/spi-nor/spi-nor.c | 7 +++++++
  21. 1 file changed, 7 insertions(+)
  22. --- a/drivers/mtd/spi-nor/spi-nor.c
  23. +++ b/drivers/mtd/spi-nor/spi-nor.c
  24. @@ -1263,6 +1263,13 @@ static int spansion_quad_enable(struct s
  25. return ret;
  26. }
  27. + ret = spi_nor_wait_till_ready(nor);
  28. + if (ret) {
  29. + dev_err(nor->dev,
  30. + "timeout while writing configuration register\n");
  31. + return ret;
  32. + }
  33. +
  34. /* read back and check it */
  35. ret = read_cr(nor);
  36. if (!(ret > 0 && (ret & CR_QUAD_EN_SPAN))) {