062-v4.11-0004-mtd-spi-nor-rename-SPINOR_OP_-macros-of-the-4-byte-a.patch 8.4 KB

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  1. From 05aba5763dcf35eddc58aaf99c9f16d19730e0a8 Mon Sep 17 00:00:00 2001
  2. From: Cyrille Pitchen <cyrille.pitchen@atmel.com>
  3. Date: Thu, 27 Oct 2016 11:55:39 +0200
  4. Subject: [PATCH] mtd: spi-nor: rename SPINOR_OP_* macros of the 4-byte address
  5. op codes
  6. This patch renames the SPINOR_OP_* macros of the 4-byte address
  7. instruction set so the new names all share a common pattern: the 4-byte
  8. address name is built from the 3-byte address name appending the "_4B"
  9. suffix.
  10. The patch also introduces new op codes to support other SPI protocols such
  11. as SPI 1-4-4 and SPI 1-2-2.
  12. This is a transitional patch and will help a later patch of spi-nor.c
  13. to automate the translation from the 3-byte address op codes into their
  14. 4-byte address version.
  15. Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com>
  16. Acked-by: Mark Brown <broonie@kernel.org>
  17. Acked-by: Marek Vasut <marek.vasut@gmail.com>
  18. ---
  19. drivers/mtd/devices/serial_flash_cmds.h | 7 -------
  20. drivers/mtd/devices/st_spi_fsm.c | 28 ++++++++++++++--------------
  21. drivers/mtd/spi-nor/spi-nor.c | 8 ++++----
  22. drivers/spi/spi-bcm-qspi.c | 6 +++---
  23. include/linux/mtd/spi-nor.h | 22 ++++++++++++++++------
  24. 5 files changed, 37 insertions(+), 34 deletions(-)
  25. --- a/drivers/mtd/devices/serial_flash_cmds.h
  26. +++ b/drivers/mtd/devices/serial_flash_cmds.h
  27. @@ -18,19 +18,12 @@
  28. #define SPINOR_OP_RDVCR 0x85
  29. /* JEDEC Standard - Serial Flash Discoverable Parmeters (SFDP) Commands */
  30. -#define SPINOR_OP_READ_1_2_2 0xbb /* DUAL I/O READ */
  31. -#define SPINOR_OP_READ_1_4_4 0xeb /* QUAD I/O READ */
  32. -
  33. #define SPINOR_OP_WRITE 0x02 /* PAGE PROGRAM */
  34. #define SPINOR_OP_WRITE_1_1_2 0xa2 /* DUAL INPUT PROGRAM */
  35. #define SPINOR_OP_WRITE_1_2_2 0xd2 /* DUAL INPUT EXT PROGRAM */
  36. #define SPINOR_OP_WRITE_1_1_4 0x32 /* QUAD INPUT PROGRAM */
  37. #define SPINOR_OP_WRITE_1_4_4 0x12 /* QUAD INPUT EXT PROGRAM */
  38. -/* READ commands with 32-bit addressing */
  39. -#define SPINOR_OP_READ4_1_2_2 0xbc
  40. -#define SPINOR_OP_READ4_1_4_4 0xec
  41. -
  42. /* Configuration flags */
  43. #define FLASH_FLAG_SINGLE 0x000000ff
  44. #define FLASH_FLAG_READ_WRITE 0x00000001
  45. --- a/drivers/mtd/devices/st_spi_fsm.c
  46. +++ b/drivers/mtd/devices/st_spi_fsm.c
  47. @@ -507,13 +507,13 @@ static struct seq_rw_config n25q_read3_c
  48. * - 'FAST' variants configured for 8 dummy cycles (see note above.)
  49. */
  50. static struct seq_rw_config n25q_read4_configs[] = {
  51. - {FLASH_FLAG_READ_1_4_4, SPINOR_OP_READ4_1_4_4, 0, 4, 4, 0x00, 0, 8},
  52. - {FLASH_FLAG_READ_1_1_4, SPINOR_OP_READ4_1_1_4, 0, 1, 4, 0x00, 0, 8},
  53. - {FLASH_FLAG_READ_1_2_2, SPINOR_OP_READ4_1_2_2, 0, 2, 2, 0x00, 0, 8},
  54. - {FLASH_FLAG_READ_1_1_2, SPINOR_OP_READ4_1_1_2, 0, 1, 2, 0x00, 0, 8},
  55. - {FLASH_FLAG_READ_FAST, SPINOR_OP_READ4_FAST, 0, 1, 1, 0x00, 0, 8},
  56. - {FLASH_FLAG_READ_WRITE, SPINOR_OP_READ4, 0, 1, 1, 0x00, 0, 0},
  57. - {0x00, 0, 0, 0, 0, 0x00, 0, 0},
  58. + {FLASH_FLAG_READ_1_4_4, SPINOR_OP_READ_1_4_4_4B, 0, 4, 4, 0x00, 0, 8},
  59. + {FLASH_FLAG_READ_1_1_4, SPINOR_OP_READ_1_1_4_4B, 0, 1, 4, 0x00, 0, 8},
  60. + {FLASH_FLAG_READ_1_2_2, SPINOR_OP_READ_1_2_2_4B, 0, 2, 2, 0x00, 0, 8},
  61. + {FLASH_FLAG_READ_1_1_2, SPINOR_OP_READ_1_1_2_4B, 0, 1, 2, 0x00, 0, 8},
  62. + {FLASH_FLAG_READ_FAST, SPINOR_OP_READ_FAST_4B, 0, 1, 1, 0x00, 0, 8},
  63. + {FLASH_FLAG_READ_WRITE, SPINOR_OP_READ_4B, 0, 1, 1, 0x00, 0, 0},
  64. + {0x00, 0, 0, 0, 0, 0x00, 0, 0},
  65. };
  66. /*
  67. @@ -553,13 +553,13 @@ static int stfsm_mx25_en_32bit_addr_seq(
  68. * entering a state that is incompatible with the SPIBoot Controller.
  69. */
  70. static struct seq_rw_config stfsm_s25fl_read4_configs[] = {
  71. - {FLASH_FLAG_READ_1_4_4, SPINOR_OP_READ4_1_4_4, 0, 4, 4, 0x00, 2, 4},
  72. - {FLASH_FLAG_READ_1_1_4, SPINOR_OP_READ4_1_1_4, 0, 1, 4, 0x00, 0, 8},
  73. - {FLASH_FLAG_READ_1_2_2, SPINOR_OP_READ4_1_2_2, 0, 2, 2, 0x00, 4, 0},
  74. - {FLASH_FLAG_READ_1_1_2, SPINOR_OP_READ4_1_1_2, 0, 1, 2, 0x00, 0, 8},
  75. - {FLASH_FLAG_READ_FAST, SPINOR_OP_READ4_FAST, 0, 1, 1, 0x00, 0, 8},
  76. - {FLASH_FLAG_READ_WRITE, SPINOR_OP_READ4, 0, 1, 1, 0x00, 0, 0},
  77. - {0x00, 0, 0, 0, 0, 0x00, 0, 0},
  78. + {FLASH_FLAG_READ_1_4_4, SPINOR_OP_READ_1_4_4_4B, 0, 4, 4, 0x00, 2, 4},
  79. + {FLASH_FLAG_READ_1_1_4, SPINOR_OP_READ_1_1_4_4B, 0, 1, 4, 0x00, 0, 8},
  80. + {FLASH_FLAG_READ_1_2_2, SPINOR_OP_READ_1_2_2_4B, 0, 2, 2, 0x00, 4, 0},
  81. + {FLASH_FLAG_READ_1_1_2, SPINOR_OP_READ_1_1_2_4B, 0, 1, 2, 0x00, 0, 8},
  82. + {FLASH_FLAG_READ_FAST, SPINOR_OP_READ_FAST_4B, 0, 1, 1, 0x00, 0, 8},
  83. + {FLASH_FLAG_READ_WRITE, SPINOR_OP_READ_4B, 0, 1, 1, 0x00, 0, 0},
  84. + {0x00, 0, 0, 0, 0, 0x00, 0, 0},
  85. };
  86. static struct seq_rw_config stfsm_s25fl_write4_configs[] = {
  87. --- a/drivers/mtd/spi-nor/spi-nor.c
  88. +++ b/drivers/mtd/spi-nor/spi-nor.c
  89. @@ -1632,16 +1632,16 @@ int spi_nor_scan(struct spi_nor *nor, co
  90. /* Dedicated 4-byte command set */
  91. switch (nor->flash_read) {
  92. case SPI_NOR_QUAD:
  93. - nor->read_opcode = SPINOR_OP_READ4_1_1_4;
  94. + nor->read_opcode = SPINOR_OP_READ_1_1_4_4B;
  95. break;
  96. case SPI_NOR_DUAL:
  97. - nor->read_opcode = SPINOR_OP_READ4_1_1_2;
  98. + nor->read_opcode = SPINOR_OP_READ_1_1_2_4B;
  99. break;
  100. case SPI_NOR_FAST:
  101. - nor->read_opcode = SPINOR_OP_READ4_FAST;
  102. + nor->read_opcode = SPINOR_OP_READ_FAST_4B;
  103. break;
  104. case SPI_NOR_NORMAL:
  105. - nor->read_opcode = SPINOR_OP_READ4;
  106. + nor->read_opcode = SPINOR_OP_READ_4B;
  107. break;
  108. }
  109. nor->program_opcode = SPINOR_OP_PP_4B;
  110. --- a/drivers/spi/spi-bcm-qspi.c
  111. +++ b/drivers/spi/spi-bcm-qspi.c
  112. @@ -371,7 +371,7 @@ static int bcm_qspi_bspi_set_flex_mode(s
  113. /* default mode, does not need flex_cmd */
  114. flex_mode = 0;
  115. else
  116. - command = SPINOR_OP_READ4_FAST;
  117. + command = SPINOR_OP_READ_FAST_4B;
  118. break;
  119. case SPI_NBITS_DUAL:
  120. bpc = 0x00000001;
  121. @@ -384,7 +384,7 @@ static int bcm_qspi_bspi_set_flex_mode(s
  122. } else {
  123. command = SPINOR_OP_READ_1_1_2;
  124. if (spans_4byte)
  125. - command = SPINOR_OP_READ4_1_1_2;
  126. + command = SPINOR_OP_READ_1_1_2_4B;
  127. }
  128. break;
  129. case SPI_NBITS_QUAD:
  130. @@ -399,7 +399,7 @@ static int bcm_qspi_bspi_set_flex_mode(s
  131. } else {
  132. command = SPINOR_OP_READ_1_1_4;
  133. if (spans_4byte)
  134. - command = SPINOR_OP_READ4_1_1_4;
  135. + command = SPINOR_OP_READ_1_1_4_4B;
  136. }
  137. break;
  138. default:
  139. --- a/include/linux/mtd/spi-nor.h
  140. +++ b/include/linux/mtd/spi-nor.h
  141. @@ -43,9 +43,13 @@
  142. #define SPINOR_OP_WRSR 0x01 /* Write status register 1 byte */
  143. #define SPINOR_OP_READ 0x03 /* Read data bytes (low frequency) */
  144. #define SPINOR_OP_READ_FAST 0x0b /* Read data bytes (high frequency) */
  145. -#define SPINOR_OP_READ_1_1_2 0x3b /* Read data bytes (Dual SPI) */
  146. -#define SPINOR_OP_READ_1_1_4 0x6b /* Read data bytes (Quad SPI) */
  147. +#define SPINOR_OP_READ_1_1_2 0x3b /* Read data bytes (Dual Output SPI) */
  148. +#define SPINOR_OP_READ_1_2_2 0xbb /* Read data bytes (Dual I/O SPI) */
  149. +#define SPINOR_OP_READ_1_1_4 0x6b /* Read data bytes (Quad Output SPI) */
  150. +#define SPINOR_OP_READ_1_4_4 0xeb /* Read data bytes (Quad I/O SPI) */
  151. #define SPINOR_OP_PP 0x02 /* Page program (up to 256 bytes) */
  152. +#define SPINOR_OP_PP_1_1_4 0x32 /* Quad page program */
  153. +#define SPINOR_OP_PP_1_4_4 0x38 /* Quad page program */
  154. #define SPINOR_OP_BE_4K 0x20 /* Erase 4KiB block */
  155. #define SPINOR_OP_BE_4K_PMC 0xd7 /* Erase 4KiB block on PMC chips */
  156. #define SPINOR_OP_BE_32K 0x52 /* Erase 32KiB block */
  157. @@ -56,11 +60,17 @@
  158. #define SPINOR_OP_RDFSR 0x70 /* Read flag status register */
  159. /* 4-byte address opcodes - used on Spansion and some Macronix flashes. */
  160. -#define SPINOR_OP_READ4 0x13 /* Read data bytes (low frequency) */
  161. -#define SPINOR_OP_READ4_FAST 0x0c /* Read data bytes (high frequency) */
  162. -#define SPINOR_OP_READ4_1_1_2 0x3c /* Read data bytes (Dual SPI) */
  163. -#define SPINOR_OP_READ4_1_1_4 0x6c /* Read data bytes (Quad SPI) */
  164. +#define SPINOR_OP_READ_4B 0x13 /* Read data bytes (low frequency) */
  165. +#define SPINOR_OP_READ_FAST_4B 0x0c /* Read data bytes (high frequency) */
  166. +#define SPINOR_OP_READ_1_1_2_4B 0x3c /* Read data bytes (Dual Output SPI) */
  167. +#define SPINOR_OP_READ_1_2_2_4B 0xbc /* Read data bytes (Dual I/O SPI) */
  168. +#define SPINOR_OP_READ_1_1_4_4B 0x6c /* Read data bytes (Quad Output SPI) */
  169. +#define SPINOR_OP_READ_1_4_4_4B 0xec /* Read data bytes (Quad I/O SPI) */
  170. #define SPINOR_OP_PP_4B 0x12 /* Page program (up to 256 bytes) */
  171. +#define SPINOR_OP_PP_1_1_4_4B 0x34 /* Quad page program */
  172. +#define SPINOR_OP_PP_1_4_4_4B 0x3e /* Quad page program */
  173. +#define SPINOR_OP_BE_4K_4B 0x21 /* Erase 4KiB block */
  174. +#define SPINOR_OP_BE_32K_4B 0x5c /* Erase 32KiB block */
  175. #define SPINOR_OP_SE_4B 0xdc /* Sector erase (usually 64KiB) */
  176. /* Used for SST flashes only. */