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ArcherC2-v1.dts 2.9 KB

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  1. /dts-v1/;
  2. #include "mt7620a.dtsi"
  3. #include <dt-bindings/gpio/gpio.h>
  4. #include <dt-bindings/input/input.h>
  5. / {
  6. compatible = "tplink,c2-v1", "ralink,mt7620a-soc";
  7. model = "TP-Link Archer C2 v1";
  8. aliases {
  9. led-boot = &led_wps;
  10. led-failsafe = &led_wps;
  11. led-running = &led_wps;
  12. led-upgrade = &led_wps;
  13. };
  14. chosen {
  15. bootargs = "console=ttyS0,115200";
  16. };
  17. pinctrl {
  18. state_default: pinctrl0 {
  19. gpio {
  20. ralink,group = "i2c", "uartf", "wled", "ephy", "spi refclk";
  21. ralink,function = "gpio";
  22. };
  23. };
  24. };
  25. gpio-leds {
  26. compatible = "gpio-leds";
  27. lan {
  28. label = "c2-v1:green:lan";
  29. gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
  30. };
  31. usb {
  32. label = "c2-v1:green:usb";
  33. gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
  34. trigger-sources = <&ohci_port1>, <&ehci_port1>;
  35. linux,default-trigger = "usbport";
  36. };
  37. led_wps: wps {
  38. label = "c2-v1:green:wps";
  39. gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
  40. };
  41. wan {
  42. label = "c2-v1:green:wan";
  43. gpios = <&gpio2 0 GPIO_ACTIVE_LOW>;
  44. };
  45. wlan {
  46. label = "c2-v1:green:wlan";
  47. gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
  48. };
  49. };
  50. gpio-keys {
  51. compatible = "gpio-keys";
  52. reset_wps {
  53. label = "reset_wps";
  54. gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
  55. linux,code = <KEY_RESTART>;
  56. };
  57. rfkill {
  58. label = "rfkill";
  59. gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
  60. linux,code = <KEY_RFKILL>;
  61. };
  62. };
  63. rtl8367rb {
  64. compatible = "realtek,rtl8367b", "rtl8367b";
  65. cpu_port = <6>;
  66. realtek,extif1 = <1 0 1 1 1 1 1 1 2>;
  67. mii-bus = <&mdio0>;
  68. };
  69. };
  70. &spi0 {
  71. status = "okay";
  72. m25p80@0 {
  73. compatible = "jedec,spi-nor";
  74. reg = <0>;
  75. spi-max-frequency = <10000000>;
  76. partitions {
  77. compatible = "fixed-partitions";
  78. #address-cells = <1>;
  79. #size-cells = <1>;
  80. partition@0 {
  81. label = "u-boot";
  82. reg = <0x0 0x20000>;
  83. read-only;
  84. };
  85. partition@20000 {
  86. label = "firmware";
  87. reg = <0x20000 0x7a0000>;
  88. };
  89. partition@7c0000 {
  90. label = "config";
  91. reg = <0x7c0000 0x10000>;
  92. read-only;
  93. };
  94. rom: partition@7d0000 {
  95. label = "rom";
  96. reg = <0x7d0000 0x10000>;
  97. read-only;
  98. };
  99. partition@7e0000 {
  100. label = "romfile";
  101. reg = <0x7e0000 0x10000>;
  102. read-only;
  103. };
  104. radio: partition@7f0000 {
  105. label = "radio";
  106. reg = <0x7f0000 0x10000>;
  107. read-only;
  108. };
  109. };
  110. };
  111. };
  112. &ethernet {
  113. status = "okay";
  114. mtd-mac-address = <&rom 0xf100>;
  115. pinctrl-names = "default";
  116. pinctrl-0 = <&rgmii1_pins &rgmii2_pins &mdio_pins>;
  117. port@5 {
  118. status = "okay";
  119. mediatek,fixed-link = <1000 1 1 1>;
  120. phy-mode = "rgmii";
  121. };
  122. mdio0: mdio-bus {
  123. status = "okay";
  124. };
  125. };
  126. &gpio1 {
  127. status = "okay";
  128. };
  129. &gpio2 {
  130. status = "okay";
  131. };
  132. &gpio3 {
  133. status = "okay";
  134. };
  135. &wmac {
  136. ralink,mtd-eeprom = <&radio 0>;
  137. mtd-mac-address = <&rom 0xf100>;
  138. };
  139. &ehci {
  140. status = "okay";
  141. };
  142. &ohci {
  143. status = "okay";
  144. };
  145. &pcie {
  146. status = "okay";
  147. };
  148. &pcie0 {
  149. mt76@0,0 {
  150. reg = <0x0000 0 0 0 0>;
  151. mediatek,mtd-eeprom = <&radio 0x8000>;
  152. };
  153. };