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ArcherC50.dts 3.1 KB

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  1. /dts-v1/;
  2. #include "mt7620a.dtsi"
  3. #include <dt-bindings/input/input.h>
  4. #include <dt-bindings/gpio/gpio.h>
  5. / {
  6. compatible = "tplink,c50", "ralink,mt7620a-soc";
  7. model = "TP-Link Archer C50";
  8. aliases {
  9. led-boot = &led_power;
  10. led-failsafe = &led_power;
  11. led-running = &led_power;
  12. led-upgrade = &led_power;
  13. };
  14. chosen {
  15. bootargs = "console=ttyS0,115200";
  16. };
  17. gpio-leds {
  18. compatible = "gpio-leds";
  19. lan {
  20. label = "c50:green:lan";
  21. gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
  22. };
  23. led_power: power {
  24. label = "c50:green:power";
  25. gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
  26. default-state = "on";
  27. };
  28. usb {
  29. label = "c50:green:usb";
  30. gpios = <&gpio0 9 GPIO_ACTIVE_LOW>;
  31. trigger-sources = <&ohci_port1>, <&ehci_port1>;
  32. linux,default-trigger = "usbport";
  33. };
  34. wan {
  35. label = "c50:green:wan";
  36. gpios = <&gpio0 17 GPIO_ACTIVE_LOW>;
  37. };
  38. wan_orange {
  39. label = "c50:orange:wan";
  40. gpios = <&gpio2 4 GPIO_ACTIVE_LOW>;
  41. };
  42. wlan5g {
  43. label = "c50:green:wlan5g";
  44. gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
  45. };
  46. wlan2g {
  47. label = "c50:green:wlan2g";
  48. gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
  49. };
  50. wps {
  51. label = "c50:green:wps";
  52. gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
  53. };
  54. };
  55. gpio-keys-polled {
  56. compatible = "gpio-keys-polled";
  57. poll-interval = <20>;
  58. reset {
  59. label = "reset";
  60. gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
  61. linux,code = <KEY_RESTART>;
  62. };
  63. rfkill {
  64. label = "rfkill";
  65. gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
  66. linux,code = <KEY_RFKILL>;
  67. }; };
  68. };
  69. &gpio1 {
  70. status = "okay";
  71. };
  72. &gpio2 {
  73. status = "okay";
  74. };
  75. &gpio3 {
  76. status = "okay";
  77. };
  78. &spi0 {
  79. status = "okay";
  80. m25p80@0 {
  81. compatible = "jedec,spi-nor";
  82. reg = <0>;
  83. spi-max-frequency = <10000000>;
  84. partitions {
  85. compatible = "fixed-partitions";
  86. #address-cells = <1>;
  87. #size-cells = <1>;
  88. partition@0 {
  89. label = "u-boot";
  90. reg = <0x0 0x20000>;
  91. read-only;
  92. };
  93. partition@20000 {
  94. label = "firmware";
  95. reg = <0x20000 0x7a0000>;
  96. };
  97. partition@7c0000 {
  98. label = "config";
  99. reg = <0x7c0000 0x10000>;
  100. read-only;
  101. };
  102. rom: partition@7d0000 {
  103. label = "rom";
  104. reg = <0x7d0000 0x10000>;
  105. read-only;
  106. };
  107. partition@7e0000 {
  108. label = "romfile";
  109. reg = <0x7e0000 0x10000>;
  110. read-only;
  111. };
  112. radio: partition@7f0000 {
  113. label = "radio";
  114. reg = <0x7f0000 0x10000>;
  115. read-only;
  116. };
  117. };
  118. };
  119. };
  120. &pinctrl {
  121. state_default: pinctrl0 {
  122. gpio {
  123. ralink,group = "i2c", "uartf", "rgmii1", "rgmii2", "wled", "ephy", "spi refclk", "mdio", "wdt", "nd_sd";
  124. ralink,function = "gpio";
  125. };
  126. };
  127. };
  128. &ethernet {
  129. pinctrl-names = "default";
  130. mtd-mac-address = <&rom 0xf100>;
  131. mediatek,portmap = "wllll";
  132. };
  133. &ehci {
  134. status = "okay";
  135. };
  136. &ohci {
  137. status = "okay";
  138. };
  139. &gsw {
  140. mediatek,port4 = "ephy";
  141. };
  142. &wmac {
  143. ralink,mtd-eeprom = <&radio 0>;
  144. mtd-mac-address = <&rom 0xf100>;
  145. mtd-mac-address-increment = <(-2)>;
  146. pinctrl-names = "default";
  147. pinctrl-0 = <&pa_pins>;
  148. };
  149. &pcie {
  150. status = "okay";
  151. };
  152. &pcie0 {
  153. mt76@0,0 {
  154. reg = <0x0000 0 0 0 0>;
  155. mediatek,mtd-eeprom = <&radio 32768>;
  156. ieee80211-freq-limit = <5000000 6000000>;
  157. mtd-mac-address = <&rom 0xf100>;
  158. mtd-mac-address-increment = <(-1)>;
  159. };
  160. };