ArcherMR200.dts 3.0 KB

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  1. /dts-v1/;
  2. #include "mt7620a.dtsi"
  3. #include <dt-bindings/gpio/gpio.h>
  4. #include <dt-bindings/input/input.h>
  5. / {
  6. compatible = "tplink,mr200", "ralink,mt7620a-soc";
  7. model = "TP-Link Archer MR200";
  8. aliases {
  9. led-boot = &led_power;
  10. led-failsafe = &led_power;
  11. led-running = &led_power;
  12. led-upgrade = &led_power;
  13. };
  14. chosen {
  15. bootargs = "console=ttyS0,115200";
  16. };
  17. gpio-leds {
  18. compatible = "gpio-leds";
  19. lan {
  20. label = "mr200:white:lan";
  21. gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
  22. };
  23. wan {
  24. label = "mr200:white:wan";
  25. gpios = <&gpio0 8 GPIO_ACTIVE_LOW>;
  26. };
  27. led_power: power {
  28. label = "mr200:white:power";
  29. gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
  30. };
  31. 4g {
  32. label = "mr200:white:4g";
  33. gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
  34. };
  35. wps {
  36. label = "mr200:white:wps";
  37. gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
  38. };
  39. signal1 {
  40. label = "mr200:white:signal1";
  41. gpios = <&gpio2 1 GPIO_ACTIVE_LOW>;
  42. };
  43. signal2 {
  44. label = "mr200:white:signal2";
  45. gpios = <&gpio2 2 GPIO_ACTIVE_LOW>;
  46. };
  47. signal3 {
  48. label = "mr200:white:signal3";
  49. gpios = <&gpio2 3 GPIO_ACTIVE_LOW>;
  50. };
  51. signal4 {
  52. label = "mr200:white:signal4";
  53. gpios = <&gpio2 4 GPIO_ACTIVE_LOW>;
  54. };
  55. wlan {
  56. label = "mr200:white:wlan";
  57. gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
  58. };
  59. };
  60. gpio-keys {
  61. compatible = "gpio-keys";
  62. reset {
  63. label = "reset";
  64. gpios = <&gpio0 13 GPIO_ACTIVE_HIGH>;
  65. linux,code = <KEY_RESTART>;
  66. };
  67. rfkill {
  68. label = "rfkill";
  69. gpios = <&gpio0 9 GPIO_ACTIVE_HIGH>;
  70. linux,code = <KEY_RFKILL>;
  71. };
  72. };
  73. gpio_export {
  74. compatible = "gpio-export";
  75. #size-cells = <0>;
  76. power_usb {
  77. gpio-export,name = "power_usb1";
  78. gpio-export,output = <1>;
  79. gpios = <&gpio0 11 GPIO_ACTIVE_HIGH>;
  80. };
  81. };
  82. };
  83. &gpio1 {
  84. status = "okay";
  85. };
  86. &gpio2 {
  87. status = "okay";
  88. };
  89. &gpio3 {
  90. status = "okay";
  91. };
  92. &spi0 {
  93. status = "okay";
  94. m25p80@0 {
  95. compatible = "jedec,spi-nor";
  96. reg = <0>;
  97. spi-max-frequency = <10000000>;
  98. partitions {
  99. compatible = "fixed-partitions";
  100. #address-cells = <1>;
  101. #size-cells = <1>;
  102. partition@0 {
  103. label = "u-boot";
  104. reg = <0x0 0x20000>;
  105. read-only;
  106. };
  107. partition@20000 {
  108. label = "firmware";
  109. reg = <0x20000 0x7b0000>;
  110. };
  111. rom: partition@7d0000 {
  112. label = "rom";
  113. reg = <0x7d0000 0x10000>;
  114. read-only;
  115. };
  116. partition@7e0000 {
  117. label = "romfile";
  118. reg = <0x7e0000 0x10000>;
  119. read-only;
  120. };
  121. radio: partition@7f0000 {
  122. label = "radio";
  123. reg = <0x7f0000 0x10000>;
  124. read-only;
  125. };
  126. };
  127. };
  128. };
  129. &pinctrl {
  130. state_default: pinctrl0 {
  131. gpio {
  132. ralink,group = "i2c", "uartf", "rgmii1", "rgmii2", "wled", "nd_sd", "ephy", "spi refclk";
  133. ralink,function = "gpio";
  134. };
  135. };
  136. };
  137. &ethernet {
  138. mtd-mac-address = <&rom 0xf100>;
  139. mediatek,portmap = "llll";
  140. };
  141. &ehci {
  142. status = "okay";
  143. };
  144. &ohci {
  145. status = "okay";
  146. };
  147. &gsw {
  148. mediatek,port4 = "ephy";
  149. };
  150. &wmac {
  151. ralink,mtd-eeprom = <&radio 0>;
  152. };
  153. &pcie {
  154. status = "okay";
  155. };
  156. &pcie0 {
  157. mt76@0,0 {
  158. reg = <0x0000 0 0 0 0>;
  159. mediatek,mtd-eeprom = <&radio 32768>;
  160. };
  161. };