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DIR-860L-B1.dts 2.4 KB

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  1. /dts-v1/;
  2. #include "mt7621.dtsi"
  3. #include <dt-bindings/gpio/gpio.h>
  4. #include <dt-bindings/input/input.h>
  5. / {
  6. compatible = "dlink,dir-860l-b1", "mediatek,mt7621-soc";
  7. model = "D-Link DIR-860L B1";
  8. aliases {
  9. led-boot = &led_power_green;
  10. led-failsafe = &led_power_green;
  11. led-running = &led_power_green;
  12. led-upgrade = &led_power_green;
  13. };
  14. memory@0 {
  15. device_type = "memory";
  16. reg = <0x0 0x8000000>;
  17. };
  18. chosen {
  19. bootargs = "console=ttyS0,57600";
  20. };
  21. gpio-leds {
  22. compatible = "gpio-leds";
  23. power {
  24. label = "dir-860l-b1:orange:power";
  25. gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
  26. };
  27. led_power_green: power2 {
  28. label = "dir-860l-b1:green:power";
  29. gpios = <&gpio0 15 GPIO_ACTIVE_LOW>;
  30. };
  31. net {
  32. label = "dir-860l-b1:orange:net";
  33. gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
  34. };
  35. net2 {
  36. label = "dir-860l-b1:green:net";
  37. gpios = <&gpio0 16 GPIO_ACTIVE_LOW>;
  38. };
  39. };
  40. gpio-keys-polled {
  41. compatible = "gpio-keys-polled";
  42. poll-interval = <20>;
  43. reset {
  44. label = "reset";
  45. gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
  46. linux,code = <KEY_RESTART>;
  47. };
  48. wps {
  49. label = "wps";
  50. gpios = <&gpio0 18 GPIO_ACTIVE_LOW>;
  51. linux,code = <KEY_WPS_BUTTON>;
  52. };
  53. };
  54. };
  55. &spi0 {
  56. status = "okay";
  57. m25p80@0 {
  58. compatible = "jedec,spi-nor";
  59. reg = <0>;
  60. spi-max-frequency = <10000000>;
  61. m25p,chunked-io = <32>;
  62. partitions {
  63. compatible = "fixed-partitions";
  64. #address-cells = <1>;
  65. #size-cells = <1>;
  66. partition@0 {
  67. label = "u-boot";
  68. reg = <0x0 0x30000>;
  69. read-only;
  70. };
  71. partition@30000 {
  72. label = "u-boot-env";
  73. reg = <0x30000 0x4000>;
  74. read-only;
  75. };
  76. radio: partition@34000 {
  77. label = "radio";
  78. reg = <0x34000 0x4000>;
  79. read-only;
  80. };
  81. factory: partition@38000 {
  82. label = "factory";
  83. reg = <0x38000 0x8000>;
  84. read-only;
  85. };
  86. partition@40000 {
  87. label = "defaults";
  88. reg = <0x40000 0x10000>;
  89. read-only;
  90. };
  91. partition@50000 {
  92. label = "firmware";
  93. reg = <0x50000 0xfb0000>;
  94. };
  95. };
  96. };
  97. };
  98. &pcie {
  99. status = "okay";
  100. };
  101. &pcie0 {
  102. mt76@0,0 {
  103. reg = <0x0000 0 0 0 0>;
  104. mediatek,mtd-eeprom = <&radio 0x2000>;
  105. ieee80211-freq-limit = <5000000 6000000>;
  106. };
  107. };
  108. &pcie1 {
  109. mt76@0,0 {
  110. reg = <0x0000 0 0 0 0>;
  111. mediatek,mtd-eeprom = <&radio 0>;
  112. ieee80211-freq-limit = <2400000 2500000>;
  113. };
  114. };
  115. &pinctrl {
  116. state_default: pinctrl0 {
  117. gpio {
  118. ralink,group = "i2c", "uart2", "uart3", "rgmii2", "sdhci";
  119. ralink,function = "gpio";
  120. };
  121. };
  122. };