MIR3G.dts 4.0 KB

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  1. /dts-v1/;
  2. #include "mt7621.dtsi"
  3. #include <dt-bindings/gpio/gpio.h>
  4. #include <dt-bindings/input/input.h>
  5. / {
  6. compatible = "xiaomi,mir3g", "mediatek,mt7621-soc";
  7. model = "Xiaomi Mi Router 3G";
  8. aliases {
  9. led-boot = &led_status_blue;
  10. led-failsafe = &led_status_blue;
  11. led-running = &led_status_blue;
  12. led-upgrade = &led_status_blue;
  13. };
  14. memory@0 {
  15. device_type = "memory";
  16. reg = <0x0 0x10000000>;
  17. };
  18. chosen {
  19. bootargs = "console=ttyS0,115200n8";
  20. };
  21. gpio-leds {
  22. compatible = "gpio-leds";
  23. status_red {
  24. label = "mir3g:red:status";
  25. gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
  26. };
  27. led_status_blue: status_blue {
  28. label = "mir3g:blue:status";
  29. gpios = <&gpio0 8 GPIO_ACTIVE_LOW>;
  30. };
  31. status_yellow {
  32. label = "mir3g:yellow:status";
  33. gpios = <&gpio0 10 GPIO_ACTIVE_LOW>;
  34. };
  35. wan_amber {
  36. label = "mir3g:amber:wan";
  37. gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
  38. };
  39. lan1_amber {
  40. label = "mir3g:amber:lan1";
  41. gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
  42. };
  43. lan2_amber {
  44. label = "mir3g:amber:lan2";
  45. gpios = <&gpio0 16 GPIO_ACTIVE_LOW>;
  46. };
  47. };
  48. gpio-keys-polled {
  49. compatible = "gpio-keys-polled";
  50. poll-interval = <20>;
  51. reset {
  52. label = "reset";
  53. gpios = <&gpio0 18 GPIO_ACTIVE_LOW>;
  54. linux,code = <KEY_RESTART>;
  55. };
  56. };
  57. reg_usb_vbus: reg_usb_vbus {
  58. compatible = "regulator-fixed";
  59. regulator-name = "usb_vbus";
  60. regulator-min-microvolt = <5000000>;
  61. regulator-max-microvolt = <5000000>;
  62. gpio = <&gpio0 12 GPIO_ACTIVE_HIGH>;
  63. enable-active-high;
  64. };
  65. };
  66. &xhci {
  67. vbus-supply = <&reg_usb_vbus>;
  68. };
  69. &nand {
  70. status = "okay";
  71. partitions {
  72. compatible = "fixed-partitions";
  73. #address-cells = <1>;
  74. #size-cells = <1>;
  75. partition@0 {
  76. label = "Bootloader";
  77. reg = <0x0 0x80000>;
  78. read-only;
  79. };
  80. partition@80000 {
  81. label = "Config";
  82. reg = <0x80000 0x40000>;
  83. };
  84. partition@c0000 {
  85. label = "Bdata";
  86. reg = <0xc0000 0x40000>;
  87. read-only;
  88. };
  89. factory: partition@100000 {
  90. label = "Factory";
  91. reg = <0x100000 0x40000>;
  92. read-only;
  93. };
  94. partition@140000 {
  95. label = "crash";
  96. reg = <0x140000 0x40000>;
  97. };
  98. partition@180000 {
  99. label = "crash_syslog";
  100. reg = <0x180000 0x40000>;
  101. };
  102. partition@1c0000 {
  103. label = "reserved0";
  104. reg = <0x1c0000 0x40000>;
  105. read-only;
  106. };
  107. /* uboot expects to find kernels at 0x200000 & 0x600000
  108. * referred to as system 1 & system 2 respectively.
  109. * a kernel is considered suitable for handing control over
  110. * if its linux magic number exists & uImage CRC are correct.
  111. * If either of those conditions fail, a matching sys'n'_fail flag
  112. * is set in uboot env & a restart performed in the hope that the
  113. * alternate kernel is okay.
  114. * if neither kernel checksums ok and both are marked failed, system 2
  115. * is booted anyway.
  116. *
  117. * Note uboot's tftp flash install writes the transferred
  118. * image to both kernel partitions.
  119. */
  120. partition@200000 {
  121. label = "kernel_stock";
  122. reg = <0x200000 0x400000>;
  123. };
  124. partition@600000 {
  125. label = "kernel";
  126. reg = <0x600000 0x400000>;
  127. };
  128. /* ubi partition is the result of squashing
  129. * next consecutive stock partitions:
  130. * - rootfs0 (rootfs partition for stock kernel0),
  131. * - rootfs1 (rootfs partition for stock failsafe kernel1),
  132. * - overlay (used as ubi overlay in stock fw)
  133. * resulting 117,5MiB space for packages.
  134. */
  135. partition@a00000 {
  136. label = "ubi";
  137. reg = <0xa00000 0x7580000>;
  138. };
  139. };
  140. };
  141. &pcie {
  142. status = "okay";
  143. };
  144. &pcie0 {
  145. wifi@0,0 {
  146. compatible = "pci14c3,7603";
  147. reg = <0x0000 0 0 0 0>;
  148. mediatek,mtd-eeprom = <&factory 0x0000>;
  149. ieee80211-freq-limit = <2400000 2500000>;
  150. };
  151. };
  152. &pcie1 {
  153. wifi@0,0 {
  154. compatible = "pci14c3,7662";
  155. reg = <0x0000 0 0 0 0>;
  156. mediatek,mtd-eeprom = <&factory 0x8000>;
  157. ieee80211-freq-limit = <5000000 6000000>;
  158. };
  159. };
  160. &ethernet {
  161. mtd-mac-address = <&factory 0xe000>;
  162. mediatek,portmap = "lwlll";
  163. };
  164. &pinctrl {
  165. state_default: pinctrl0 {
  166. gpio {
  167. ralink,group = "jtag", "uart2", "uart3", "wdt";
  168. ralink,function = "gpio";
  169. };
  170. };
  171. };