MT7620a.dts 1.8 KB

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  1. /dts-v1/;
  2. #include "mt7620a.dtsi"
  3. #include <dt-bindings/gpio/gpio.h>
  4. #include <dt-bindings/input/input.h>
  5. / {
  6. compatible = "ralink,mt7620a-eval-board", "ralink,mt7620a-soc";
  7. model = "Ralink MT7620a + MT7610e evaluation board";
  8. gpio-keys-polled {
  9. compatible = "gpio-keys";
  10. poll-interval = <20>;
  11. s2 {
  12. label = "S2";
  13. gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
  14. linux,code = <BTN_0>;
  15. };
  16. s3 {
  17. label = "S3";
  18. gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
  19. linux,code = <BTN_1>;
  20. };
  21. };
  22. };
  23. &spi0 {
  24. status = "okay";
  25. m25p80@0 {
  26. compatible = "jedec,spi-nor";
  27. reg = <0>;
  28. spi-max-frequency = <10000000>;
  29. partitions {
  30. compatible = "fixed-partitions";
  31. #address-cells = <1>;
  32. #size-cells = <1>;
  33. partition@0 {
  34. label = "u-boot";
  35. reg = <0x0 0x30000>;
  36. read-only;
  37. };
  38. partition@30000 {
  39. label = "u-boot-env";
  40. reg = <0x30000 0x10000>;
  41. read-only;
  42. };
  43. factory: partition@40000 {
  44. label = "factory";
  45. reg = <0x40000 0x10000>;
  46. read-only;
  47. };
  48. partition@50000 {
  49. label = "firmware";
  50. reg = <0x50000 0x7b0000>;
  51. };
  52. };
  53. };
  54. };
  55. &pinctrl {
  56. state_default: pinctrl0 {
  57. gpio {
  58. ralink,group = "i2c", "uartf";
  59. ralink,function = "gpio";
  60. };
  61. };
  62. };
  63. &ethernet {
  64. status = "okay";
  65. pinctrl-names = "default";
  66. pinctrl-0 = <&rgmii1_pins &rgmii2_pins &mdio_pins>;
  67. mediatek,portmap = "llllw";
  68. port@4 {
  69. status = "okay";
  70. phy-mode = "rgmii";
  71. phy-handle = <&phy4>;
  72. };
  73. port@5 {
  74. status = "okay";
  75. phy-mode = "rgmii";
  76. phy-handle = <&phy5>;
  77. };
  78. mdio-bus {
  79. status = "okay";
  80. phy4: ethernet-phy@4 {
  81. reg = <4>;
  82. phy-mode = "rgmii";
  83. };
  84. phy5: ethernet-phy@5 {
  85. reg = <5>;
  86. phy-mode = "rgmii";
  87. };
  88. };
  89. };
  90. &gsw {
  91. mediatek,port4 = "gmac";
  92. };
  93. &sdhci {
  94. status = "okay";
  95. };
  96. &pcie {
  97. status = "okay";
  98. };
  99. &ehci {
  100. status = "okay";
  101. };
  102. &ohci {
  103. status = "okay";
  104. };