MT7620a_MT7610e.dts 1.3 KB

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  1. /dts-v1/;
  2. #include "mt7620a.dtsi"
  3. #include <dt-bindings/gpio/gpio.h>
  4. #include <dt-bindings/input/input.h>
  5. / {
  6. compatible = "ralink,mt7620a-eval-board", "ralink,mt7620a-soc";
  7. model = "Ralink MT7620A evaluation board";
  8. gpio-keys-polled {
  9. compatible = "gpio-keys";
  10. poll-interval = <20>;
  11. wps {
  12. label = "wps";
  13. gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
  14. linux,code = <BTN_0>;
  15. };
  16. reset {
  17. label = "reset";
  18. gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
  19. linux,code = <BTN_1>;
  20. };
  21. };
  22. };
  23. &gpio0 {
  24. status = "okay";
  25. };
  26. &spi0 {
  27. status = "okay";
  28. m25p80@0 {
  29. compatible = "jedec,spi-nor";
  30. reg = <0>;
  31. spi-max-frequency = <1000000>;
  32. partitions {
  33. compatible = "fixed-partitions";
  34. #address-cells = <1>;
  35. #size-cells = <1>;
  36. partition@0 {
  37. label = "u-boot";
  38. reg = <0x0 0x30000>;
  39. read-only;
  40. };
  41. partition@30000 {
  42. label = "u-boot-env";
  43. reg = <0x30000 0x10000>;
  44. read-only;
  45. };
  46. factory: partition@40000 {
  47. label = "factory";
  48. reg = <0x40000 0x10000>;
  49. read-only;
  50. };
  51. partition@50000 {
  52. label = "firmware";
  53. reg = <0x50000 0x7b0000>;
  54. };
  55. };
  56. };
  57. };
  58. &ethernet {
  59. status = "okay";
  60. pinctrl-names = "default";
  61. pinctrl-0 = <&ephy_pins>;
  62. mediatek,portmap = "llllw";
  63. };
  64. &gsw {
  65. mediatek,port4 = "ephy";
  66. };
  67. &sdhci {
  68. status = "okay";
  69. };
  70. &pcie {
  71. status = "okay";
  72. };