PBR-M1.dts 2.9 KB

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  1. /dts-v1/;
  2. #include "mt7621.dtsi"
  3. #include <dt-bindings/gpio/gpio.h>
  4. #include <dt-bindings/input/input.h>
  5. / {
  6. compatible = "d-team,pbr-m1", "mediatek,mt7621-soc";
  7. model = "PBR-M1";
  8. aliases {
  9. led-boot = &led_sys;
  10. led-failsafe = &led_sys;
  11. led-running = &led_sys;
  12. led-upgrade = &led_sys;
  13. };
  14. memory@0 {
  15. device_type = "memory";
  16. reg = <0x0 0x10000000>;
  17. };
  18. chosen {
  19. bootargs = "console=ttyS0,115200";
  20. };
  21. palmbus: palmbus@1E000000 {
  22. i2c: i2c@900 {
  23. status = "okay";
  24. pcf8563: rtc@51 {
  25. status = "okay";
  26. compatible = "nxp,pcf8563";
  27. reg = <0x51>;
  28. };
  29. };
  30. };
  31. gpio-leds {
  32. compatible = "gpio-leds";
  33. power {
  34. label = "pbr-m1:blue:power";
  35. gpios = <&gpio0 31 GPIO_ACTIVE_LOW>;
  36. default-state = "on";
  37. };
  38. led_sys: sys {
  39. label = "pbr-m1:blue:sys";
  40. gpios = <&gpio1 0 GPIO_ACTIVE_LOW>;
  41. };
  42. internet {
  43. label = "pbr-m1:blue:internet";
  44. gpios = <&gpio0 29 GPIO_ACTIVE_LOW>;
  45. };
  46. wlan2g {
  47. label = "pbr-m1:blue:wlan2g";
  48. gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
  49. };
  50. wlan5g {
  51. label = "pbr-m1:blue:wlan5g";
  52. gpios = <&gpio0 28 GPIO_ACTIVE_LOW>;
  53. };
  54. };
  55. gpio-keys-polled {
  56. compatible = "gpio-keys-polled";
  57. poll-interval = <20>;
  58. reset {
  59. label = "reset";
  60. gpios = <&gpio0 18 GPIO_ACTIVE_LOW>;
  61. linux,code = <KEY_RESTART>;
  62. };
  63. };
  64. gpio_export {
  65. compatible = "gpio-export";
  66. #size-cells = <0>;
  67. power_usb2 {
  68. gpio-export,name = "power_usb2";
  69. gpio-export,output = <1>;
  70. gpios = <&gpio0 22 GPIO_ACTIVE_HIGH>;
  71. };
  72. power_usb3 {
  73. gpio-export,name = "power_usb3";
  74. gpio-export,output = <1>;
  75. gpios = <&gpio0 25 GPIO_ACTIVE_HIGH>;
  76. };
  77. power_sata {
  78. gpio-export,name = "power_sata";
  79. gpio-export,output = <1>;
  80. gpios = <&gpio0 27 GPIO_ACTIVE_HIGH>;
  81. };
  82. };
  83. beeper: beeper {
  84. compatible = "gpio-beeper";
  85. gpios = <&gpio0 26 GPIO_ACTIVE_LOW>;
  86. };
  87. };
  88. &sdhci {
  89. status = "okay";
  90. };
  91. &spi0 {
  92. status = "okay";
  93. m25p80@0 {
  94. compatible = "jedec,spi-nor";
  95. reg = <0>;
  96. spi-max-frequency = <10000000>;
  97. m25p,chunked-io = <32>;
  98. partitions {
  99. compatible = "fixed-partitions";
  100. #address-cells = <1>;
  101. #size-cells = <1>;
  102. partition@0 {
  103. label = "u-boot";
  104. reg = <0x0 0x30000>;
  105. read-only;
  106. };
  107. partition@30000 {
  108. label = "u-boot-env";
  109. reg = <0x30000 0x10000>;
  110. read-only;
  111. };
  112. factory: partition@40000 {
  113. label = "factory";
  114. reg = <0x40000 0x10000>;
  115. read-only;
  116. };
  117. partition@50000 {
  118. label = "firmware";
  119. reg = <0x50000 0xfb0000>;
  120. };
  121. };
  122. };
  123. };
  124. &pcie {
  125. status = "okay";
  126. };
  127. &pcie0 {
  128. mt76@0,0 {
  129. reg = <0x0000 0 0 0 0>;
  130. mediatek,mtd-eeprom = <&factory 0x8000>;
  131. ieee80211-freq-limit = <5000000 6000000>;
  132. };
  133. };
  134. &pcie1 {
  135. mt76@0,0 {
  136. reg = <0x0000 0 0 0 0>;
  137. mediatek,mtd-eeprom = <&factory 0x0000>;
  138. };
  139. };
  140. &ethernet {
  141. mtd-mac-address = <&factory 0xe000>;
  142. };
  143. &pinctrl {
  144. state_default: pinctrl0 {
  145. gpio {
  146. ralink,group = "wdt", "rgmii2", "jtag", "mdio";
  147. ralink,function = "gpio";
  148. };
  149. };
  150. };