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TL-WR902ACV3.dts 2.0 KB

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  1. /dts-v1/;
  2. #include "TPLINK-8M.dtsi"
  3. #include <dt-bindings/gpio/gpio.h>
  4. #include <dt-bindings/input/input.h>
  5. / {
  6. compatible = "tplink,tl-wr902ac-v3", "mediatek,mt7628an-soc";
  7. model = "TP-Link TL-WR902AC v3";
  8. aliases {
  9. led-boot = &led_power;
  10. led-failsafe = &led_power;
  11. led-running = &led_power;
  12. led-upgrade = &led_power;
  13. };
  14. gpio-keys-polled {
  15. compatible = "gpio-keys-polled";
  16. poll-interval = <20>;
  17. reset {
  18. label = "reset";
  19. gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
  20. linux,code = <KEY_RESTART>;
  21. };
  22. sw1 {
  23. label = "sw1";
  24. gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
  25. linux,code = <BTN_0>;
  26. };
  27. sw2 {
  28. label = "sw2";
  29. gpios = <&gpio0 3 GPIO_ACTIVE_LOW>;
  30. linux,code = <BTN_1>;
  31. };
  32. wps {
  33. label = "wps";
  34. gpios = <&gpio1 9 GPIO_ACTIVE_LOW>;
  35. linux,code = <KEY_WPS_BUTTON>;
  36. };
  37. };
  38. gpio-leds {
  39. compatible = "gpio-leds";
  40. lan {
  41. label = "tl-wr902ac-v3:green:lan";
  42. gpios = <&gpio0 5 GPIO_ACTIVE_HIGH>;
  43. };
  44. led_power: power {
  45. label = "tl-wr902ac-v3:green:power";
  46. gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
  47. };
  48. usb {
  49. label = "tl-wr902ac-v3:green:usb";
  50. gpios = <&gpio1 11 GPIO_ACTIVE_LOW>;
  51. trigger-sources = <&ohci_port1>, <&ehci_port1>;
  52. linux,default-trigger = "usbport";
  53. };
  54. wan {
  55. label = "tl-wr902ac-v3:green:wan";
  56. gpios = <&gpio1 7 GPIO_ACTIVE_LOW>;
  57. };
  58. wlan {
  59. label = "tl-wr902ac-v3:green:wlan";
  60. gpios = <&gpio1 12 GPIO_ACTIVE_LOW>;
  61. };
  62. wps {
  63. label = "tl-wr902ac-v3:green:wps";
  64. gpios = <&gpio0 4 GPIO_ACTIVE_LOW>;
  65. };
  66. };
  67. };
  68. &pinctrl {
  69. state_default: pinctrl0 {
  70. gpio {
  71. ralink,group = "i2c", "i2s", "p0led_an", "p2led_an", "p4led_an", "uart1", "wdt", "wled_an";
  72. ralink,function = "gpio";
  73. };
  74. };
  75. };
  76. &ehci {
  77. status = "okay";
  78. };
  79. &ohci {
  80. status = "okay";
  81. };
  82. &pcie {
  83. status = "okay";
  84. };
  85. &pcie0 {
  86. mt76@0,0 {
  87. reg = <0x0000 0 0 0 0>;
  88. mediatek,mtd-eeprom = <&factory 0x28000>;
  89. ieee80211-freq-limit = <5000000 6000000>;
  90. mtd-mac-address = <&factory 0xf100>;
  91. mtd-mac-address-increment = <(-1)>;
  92. };
  93. };