WL-351.dts 2.3 KB

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  1. /dts-v1/;
  2. #include "rt3050.dtsi"
  3. #include <dt-bindings/gpio/gpio.h>
  4. #include <dt-bindings/input/input.h>
  5. / {
  6. compatible = "sitecom,wl-351", "ralink,rt3052-soc";
  7. model = "Sitecom WL-351 v1 002";
  8. aliases {
  9. led-boot = &led_power;
  10. led-failsafe = &led_power;
  11. led-running = &led_power;
  12. led-upgrade = &led_power;
  13. };
  14. cfi@1f000000 {
  15. compatible = "cfi-flash";
  16. reg = <0x1f000000 0x800000>;
  17. bank-width = <2>;
  18. device-width = <2>;
  19. partitions {
  20. compatible = "fixed-partitions";
  21. #address-cells = <1>;
  22. #size-cells = <1>;
  23. partition@0 {
  24. label = "u-boot";
  25. reg = <0x0 0x30000>;
  26. read-only;
  27. };
  28. partition@30000 {
  29. label = "u-boot-env";
  30. reg = <0x30000 0x10000>;
  31. read-only;
  32. };
  33. factory: partition@40000 {
  34. label = "factory";
  35. reg = <0x40000 0x10000>;
  36. read-only;
  37. };
  38. partition@50000 {
  39. label = "firmware";
  40. reg = <0x50000 0x3b0000>;
  41. };
  42. };
  43. };
  44. gpio-leds {
  45. compatible = "gpio-leds";
  46. led_power: power {
  47. label = "wl-351:amber:power";
  48. gpios = <&gpio0 8 GPIO_ACTIVE_LOW>;
  49. };
  50. unpopulated {
  51. label = "wl-351:amber:unpopulated";
  52. gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
  53. };
  54. unpopulated2 {
  55. label = "wl-351:blue:unpopulated";
  56. gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
  57. };
  58. };
  59. gpio-keys-polled {
  60. compatible = "gpio-keys-polled";
  61. poll-interval = <20>;
  62. reset {
  63. label = "reset";
  64. gpios = <&gpio0 10 GPIO_ACTIVE_LOW>;
  65. linux,code = <KEY_RESTART>;
  66. };
  67. wps {
  68. label = "wps";
  69. gpios = <&gpio0 0 GPIO_ACTIVE_LOW>;
  70. linux,code = <KEY_WPS_BUTTON>;
  71. };
  72. };
  73. rtl8366rb {
  74. compatible = "realtek,rtl8366rb";
  75. gpio-sda = <&gpio0 1 GPIO_ACTIVE_HIGH>;
  76. gpio-sck = <&gpio0 2 GPIO_ACTIVE_HIGH>;
  77. };
  78. };
  79. &pinctrl {
  80. state_default: pinctrl0 {
  81. gpio {
  82. ralink,group = "spi", "i2c", "jtag", "mdio", "uartf";
  83. ralink,function = "gpio";
  84. };
  85. };
  86. };
  87. &ethernet {
  88. mtd-mac-address = <&factory 0x4>;
  89. pinctrl-names = "default";
  90. pinctrl-0 = <&rgmii_pins>;
  91. };
  92. &esw {
  93. ralink,rgmii = <1>;
  94. mediatek,portmap = <0x3f>;
  95. ralink,fct2 = <0x0002500c>;
  96. /*
  97. * ext phy base addr 31, rx/tx clock skew 0,
  98. * turbo mii off, rgmi 3.3v off, port 5 polling off
  99. * port5: enabled, gige, full-duplex, rx/tx-flow-control
  100. * port6: enabled, gige, full-duplex, rx/tx-flow-control
  101. */
  102. ralink,fpa2 = <0x1f003fff>;
  103. };
  104. &wmac {
  105. ralink,mtd-eeprom = <&factory 0>;
  106. };
  107. &otg {
  108. status = "okay";
  109. };