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ZBT-APE522II.dts 2.2 KB

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  1. /dts-v1/;
  2. #include "mt7620a.dtsi"
  3. #include <dt-bindings/gpio/gpio.h>
  4. #include <dt-bindings/input/input.h>
  5. / {
  6. compatible = "zbtlink,zbt-ape522ii", "ralink,mt7620a-soc";
  7. model = "ZBT-APE522II";
  8. chosen {
  9. bootargs = "console=ttyS0,115200";
  10. };
  11. gpio-leds {
  12. compatible = "gpio-leds";
  13. sys1 {
  14. label = "zbt-ape522ii:green:sys1";
  15. gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
  16. };
  17. sys2 {
  18. label = "zbt-ape522ii:green:sys2";
  19. gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
  20. };
  21. sys3 {
  22. label = "zbt-ape522ii:green:sys3";
  23. gpios = <&gpio0 9 GPIO_ACTIVE_LOW>;
  24. };
  25. sys4 {
  26. label = "zbt-ape522ii:green:sys4";
  27. gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
  28. };
  29. wlan2g4 {
  30. label = "zbt-ape522ii:green:wlan2g4";
  31. gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
  32. };
  33. };
  34. gpio-keys-polled {
  35. compatible = "gpio-keys-polled";
  36. poll-interval = <20>;
  37. reset {
  38. label = "reset";
  39. gpios = <&gpio0 2 GPIO_ACTIVE_HIGH>;
  40. linux,code = <KEY_RESTART>;
  41. };
  42. };
  43. };
  44. &gpio0 {
  45. status = "okay";
  46. };
  47. &gpio1 {
  48. status = "okay";
  49. };
  50. &gpio2 {
  51. status = "okay";
  52. };
  53. &gpio3 {
  54. status = "okay";
  55. };
  56. &spi0 {
  57. status = "okay";
  58. m25p80@0 {
  59. compatible = "jedec,spi-nor";
  60. reg = <0>;
  61. spi-max-frequency = <10000000>;
  62. partitions {
  63. compatible = "fixed-partitions";
  64. #address-cells = <1>;
  65. #size-cells = <1>;
  66. partition@0 {
  67. label = "u-boot";
  68. reg = <0x0 0x30000>;
  69. };
  70. partition@30000 {
  71. label = "u-boot-env";
  72. reg = <0x30000 0x10000>;
  73. read-only;
  74. };
  75. factory: partition@40000 {
  76. label = "factory";
  77. reg = <0x40000 0x10000>;
  78. read-only;
  79. };
  80. partition@50000 {
  81. label = "firmware";
  82. reg = <0x50000 0xf80000>;
  83. };
  84. };
  85. };
  86. };
  87. &ethernet {
  88. pinctrl-names = "default";
  89. pinctrl-0 = <&ephy_pins>;
  90. mtd-mac-address = <&factory 0x4>;
  91. mediatek,portmap = "wllll";
  92. };
  93. &wmac {
  94. ralink,mtd-eeprom = <&factory 0>;
  95. pinctrl-names = "default";
  96. pinctrl-0 = <&pa_pins>;
  97. };
  98. &pcie {
  99. status = "okay";
  100. };
  101. &pcie0 {
  102. mt76@0,0 {
  103. reg = <0x0000 0 0 0 0>;
  104. mediatek,mtd-eeprom = <&factory 0x8000>;
  105. ieee80211-freq-limit = <5000000 6000000>;
  106. };
  107. };
  108. &pinctrl {
  109. state_default: pinctrl0 {
  110. gpio {
  111. ralink,group = "wled", "i2c", "uartf", "wdt";
  112. ralink,function = "gpio";
  113. };
  114. };
  115. };