ZBT-WR8305RT.dts 1.9 KB

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  1. /dts-v1/;
  2. #include "mt7620n.dtsi"
  3. #include <dt-bindings/gpio/gpio.h>
  4. #include <dt-bindings/input/input.h>
  5. / {
  6. compatible = "zbtlink,zbt-wr8305rt", "ralink,mt7620n-soc";
  7. model = "Zbtlink ZBT-WR8305RT";
  8. aliases {
  9. led-boot = &led_sys;
  10. led-failsafe = &led_sys;
  11. led-running = &led_sys;
  12. led-upgrade = &led_sys;
  13. };
  14. gpio-leds {
  15. compatible = "gpio-leds";
  16. led_sys: sys {
  17. label = "zbt-wr8305rt:green:sys";
  18. gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
  19. };
  20. lan {
  21. label = "zbt-wr8305rt:green:usb";
  22. gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
  23. trigger-sources = <&ohci_port1>, <&ehci_port1>;
  24. linux,default-trigger = "usbport";
  25. };
  26. wifi {
  27. label = "zbt-wr8305rt:green:wifi";
  28. gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
  29. };
  30. };
  31. gpio-keys-polled {
  32. compatible = "gpio-keys-polled";
  33. poll-interval = <20>;
  34. reset {
  35. label = "reset";
  36. gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
  37. linux,code = <KEY_RESTART>;
  38. };
  39. };
  40. };
  41. &gpio1 {
  42. status = "okay";
  43. };
  44. &gpio3 {
  45. status = "okay";
  46. };
  47. &spi0 {
  48. status = "okay";
  49. m25p80@0 {
  50. compatible = "jedec,spi-nor";
  51. reg = <0>;
  52. spi-max-frequency = <10000000>;
  53. partitions {
  54. compatible = "fixed-partitions";
  55. #address-cells = <1>;
  56. #size-cells = <1>;
  57. partition@0 {
  58. label = "u-boot";
  59. reg = <0x0 0x30000>;
  60. read-only;
  61. };
  62. partition@30000 {
  63. label = "u-boot-env";
  64. reg = <0x30000 0x10000>;
  65. read-only;
  66. };
  67. factory: partition@40000 {
  68. label = "factory";
  69. reg = <0x40000 0x10000>;
  70. read-only;
  71. };
  72. partition@50000 {
  73. label = "firmware";
  74. reg = <0x50000 0x7b0000>;
  75. };
  76. };
  77. };
  78. };
  79. &ehci {
  80. status = "okay";
  81. };
  82. &ohci {
  83. status = "okay";
  84. };
  85. &ethernet {
  86. pinctrl-names = "default";
  87. pinctrl-0 = <&ephy_pins>;
  88. mtd-mac-address = <&factory 0x4>;
  89. mediatek,portmap = "llllw";
  90. };
  91. &wmac {
  92. ralink,mtd-eeprom = <&factory 0>;
  93. };
  94. &pinctrl {
  95. state_default: pinctrl0 {
  96. default {
  97. ralink,group = "i2c", "uartf", "spi refclk", "wled";
  98. ralink,function = "gpio";
  99. };
  100. };
  101. };