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rt3352.dtsi 7.0 KB

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  1. / {
  2. #address-cells = <1>;
  3. #size-cells = <1>;
  4. compatible = "ralink,rt3352-soc";
  5. cpus {
  6. #address-cells = <1>;
  7. #size-cells = <0>;
  8. cpu@0 {
  9. compatible = "mips,mips24KEc";
  10. reg = <0>;
  11. };
  12. };
  13. chosen {
  14. bootargs = "console=ttyS0,57600";
  15. };
  16. cpuintc: cpuintc {
  17. #address-cells = <0>;
  18. #interrupt-cells = <1>;
  19. interrupt-controller;
  20. compatible = "mti,cpu-interrupt-controller";
  21. };
  22. aliases {
  23. spi0 = &spi0;
  24. spi1 = &spi1;
  25. serial0 = &uartlite;
  26. };
  27. palmbus: palmbus@10000000 {
  28. compatible = "palmbus";
  29. reg = <0x10000000 0x200000>;
  30. ranges = <0x0 0x10000000 0x1FFFFF>;
  31. #address-cells = <1>;
  32. #size-cells = <1>;
  33. sysc: sysc@0 {
  34. compatible = "ralink,rt3352-sysc", "ralink,rt3050-sysc", "syscon";
  35. reg = <0x0 0x100>;
  36. };
  37. timer: timer@100 {
  38. compatible = "ralink,rt3352-timer", "ralink,rt2880-timer";
  39. reg = <0x100 0x20>;
  40. interrupt-parent = <&intc>;
  41. interrupts = <1>;
  42. };
  43. watchdog: watchdog@120 {
  44. compatible = "ralink,rt3352-wdt", "ralink,rt2880-wdt";
  45. reg = <0x120 0x10>;
  46. resets = <&rstctrl 8>;
  47. reset-names = "wdt";
  48. interrupt-parent = <&intc>;
  49. interrupts = <1>;
  50. };
  51. intc: intc@200 {
  52. compatible = "ralink,rt3352-intc", "ralink,rt2880-intc";
  53. reg = <0x200 0x100>;
  54. interrupt-controller;
  55. #interrupt-cells = <1>;
  56. interrupt-parent = <&cpuintc>;
  57. interrupts = <2>;
  58. };
  59. memc: memc@300 {
  60. compatible = "ralink,rt3352-memc", "ralink,rt3050-memc";
  61. reg = <0x300 0x100>;
  62. resets = <&rstctrl 20>;
  63. reset-names = "mc";
  64. interrupt-parent = <&intc>;
  65. interrupts = <3>;
  66. };
  67. uart: uart@500 {
  68. compatible = "ralink,rt3352-uart", "ralink,rt2880-uart", "ns16550a";
  69. reg = <0x500 0x100>;
  70. resets = <&rstctrl 12>;
  71. reset-names = "uart";
  72. interrupt-parent = <&intc>;
  73. interrupts = <5>;
  74. reg-shift = <2>;
  75. status = "disabled";
  76. };
  77. gpio0: gpio@600 {
  78. compatible = "ralink,rt3352-gpio", "ralink,rt2880-gpio";
  79. reg = <0x600 0x34>;
  80. gpio-controller;
  81. #gpio-cells = <2>;
  82. ralink,gpio-base = <0>;
  83. ralink,nr-gpio = <24>;
  84. ralink,register-map = [ 00 04 08 0c
  85. 20 24 28 2c
  86. 30 34 ];
  87. resets = <&rstctrl 13>;
  88. reset-names = "pio";
  89. interrupt-parent = <&intc>;
  90. interrupts = <6>;
  91. };
  92. gpio1: gpio@638 {
  93. compatible = "ralink,rt3352-gpio", "ralink,rt2880-gpio";
  94. reg = <0x638 0x24>;
  95. gpio-controller;
  96. #gpio-cells = <2>;
  97. ralink,gpio-base = <24>;
  98. ralink,nr-gpio = <16>;
  99. ralink,register-map = [ 00 04 08 0c
  100. 10 14 18 1c
  101. 20 24 ];
  102. status = "disabled";
  103. };
  104. gpio2: gpio@660 {
  105. compatible = "ralink,rt3352-gpio", "ralink,rt2880-gpio";
  106. reg = <0x660 0x24>;
  107. gpio-controller;
  108. #gpio-cells = <2>;
  109. ralink,gpio-base = <40>;
  110. ralink,nr-gpio = <6>;
  111. ralink,register-map = [ 00 04 08 0c
  112. 10 14 18 1c
  113. 20 24 ];
  114. status = "disabled";
  115. };
  116. i2c@900 {
  117. compatible = "ralink,rt2880-i2c";
  118. reg = <0x900 0x100>;
  119. resets = <&rstctrl 16>;
  120. reset-names = "i2c";
  121. #address-cells = <1>;
  122. #size-cells = <0>;
  123. status = "disabled";
  124. pinctrl-names = "default";
  125. pinctrl-0 = <&i2c_pins>;
  126. };
  127. i2s@a00 {
  128. compatible = "ralink,rt3352-i2s";
  129. reg = <0xa00 0x100>;
  130. resets = <&rstctrl 17>;
  131. reset-names = "i2s";
  132. interrupt-parent = <&intc>;
  133. interrupts = <10>;
  134. txdma-req = <2>;
  135. rxdma-req = <3>;
  136. dmas = <&gdma 4>,
  137. <&gdma 6>;
  138. dma-names = "tx", "rx";
  139. status = "disabled";
  140. };
  141. spi0: spi@b00 {
  142. compatible = "ralink,rt3352-spi", "ralink,rt2880-spi";
  143. reg = <0xb00 0x40>;
  144. #address-cells = <1>;
  145. #size-cells = <0>;
  146. resets = <&rstctrl 18>;
  147. reset-names = "spi";
  148. pinctrl-names = "default";
  149. pinctrl-0 = <&spi_pins>;
  150. status = "disabled";
  151. };
  152. spi1: spi@b40 {
  153. compatible = "ralink,rt3352-spi", "ralink,rt2880-spi";
  154. reg = <0xb40 0x60>;
  155. #address-cells = <1>;
  156. #size-cells = <0>;
  157. resets = <&rstctrl 18>;
  158. reset-names = "spi";
  159. pinctrl-names = "default";
  160. pinctrl-0 = <&spi_cs1>;
  161. status = "disabled";
  162. };
  163. uartlite: uartlite@c00 {
  164. compatible = "ralink,rt3352-uart", "ralink,rt2880-uart", "ns16550a";
  165. reg = <0xc00 0x100>;
  166. resets = <&rstctrl 19>;
  167. reset-names = "uartl";
  168. interrupt-parent = <&intc>;
  169. interrupts = <12>;
  170. reg-shift = <2>;
  171. pinctrl-names = "default";
  172. pinctrl-0 = <&uartlite_pins>;
  173. };
  174. gdma: gdma@2800 {
  175. compatible = "ralink,rt3883-gdma";
  176. reg = <0x2800 0x800>;
  177. resets = <&rstctrl 14>;
  178. reset-names = "dma";
  179. interrupt-parent = <&intc>;
  180. interrupts = <7>;
  181. #dma-cells = <1>;
  182. #dma-channels = <16>;
  183. #dma-requests = <16>;
  184. status = "disabled";
  185. };
  186. };
  187. pinctrl: pinctrl {
  188. compatible = "ralink,rt2880-pinmux";
  189. pinctrl-names = "default";
  190. pinctrl-0 = <&state_default>;
  191. state_default: pinctrl0 {
  192. };
  193. i2c_pins: i2c {
  194. i2c {
  195. ralink,group = "i2c";
  196. ralink,function = "i2c";
  197. };
  198. };
  199. mdio_pins: mdio {
  200. mdio {
  201. ralink,group = "mdio";
  202. ralink,function = "mdio";
  203. };
  204. };
  205. rgmii_pins: rgmii {
  206. rgmii {
  207. ralink,group = "rgmii";
  208. ralink,function = "rgmii";
  209. };
  210. };
  211. spi_pins: spi {
  212. spi {
  213. ralink,group = "spi";
  214. ralink,function = "spi";
  215. };
  216. };
  217. spi_cs1: spi1 {
  218. spi1 {
  219. ralink,group = "spi_cs1";
  220. ralink,function = "spi_cs1";
  221. };
  222. };
  223. uartlite_pins: uartlite {
  224. uart {
  225. ralink,group = "uartlite";
  226. ralink,function = "uartlite";
  227. };
  228. };
  229. };
  230. rstctrl: rstctrl {
  231. compatible = "ralink,rt3352-reset", "ralink,rt2880-reset";
  232. #reset-cells = <1>;
  233. };
  234. clkctrl: clkctrl {
  235. compatible = "ralink,rt2880-clock";
  236. #clock-cells = <1>;
  237. };
  238. ethernet: ethernet@10100000 {
  239. compatible = "ralink,rt3352-eth", "ralink,rt3050-eth";
  240. reg = <0x10100000 0x10000>;
  241. resets = <&rstctrl 21>;
  242. reset-names = "fe";
  243. interrupt-parent = <&cpuintc>;
  244. interrupts = <5>;
  245. mediatek,switch = <&esw>;
  246. };
  247. esw: esw@10110000 {
  248. compatible = "ralink,rt3352-esw", "ralink,rt3050-esw";
  249. reg = <0x10110000 0x8000>;
  250. resets = <&rstctrl 23>;
  251. reset-names = "esw";
  252. interrupt-parent = <&intc>;
  253. interrupts = <17>;
  254. };
  255. usbphy: usbphy {
  256. compatible = "ralink,rt3352-usbphy";
  257. #phy-cells = <0>;
  258. ralink,sysctl = <&sysc>;
  259. resets = <&rstctrl 22 &rstctrl 25>;
  260. reset-names = "host", "device";
  261. clocks = <&clkctrl 18 &clkctrl 20>;
  262. clock-names = "host", "device";
  263. };
  264. wmac: wmac@10180000 {
  265. compatible = "ralink,rt3352-wmac", "ralink,rt2880-wmac";
  266. reg = <0x10180000 0x40000>;
  267. interrupt-parent = <&cpuintc>;
  268. interrupts = <6>;
  269. ralink,eeprom = "soc_wmac.eeprom";
  270. };
  271. ehci: ehci@101c0000 {
  272. #address-cells = <1>;
  273. #size-cells = <0>;
  274. compatible = "generic-ehci";
  275. reg = <0x101c0000 0x1000>;
  276. phys = <&usbphy>;
  277. phy-names = "usb";
  278. interrupt-parent = <&intc>;
  279. interrupts = <18>;
  280. status = "disabled";
  281. ehci_port1: port@1 {
  282. reg = <1>;
  283. #trigger-source-cells = <0>;
  284. };
  285. };
  286. ohci: ohci@101c1000 {
  287. #address-cells = <1>;
  288. #size-cells = <0>;
  289. compatible = "generic-ohci";
  290. reg = <0x101c1000 0x1000>;
  291. phys = <&usbphy>;
  292. phy-names = "usb";
  293. interrupt-parent = <&intc>;
  294. interrupts = <18>;
  295. status = "disabled";
  296. ohci_port1: port@1 {
  297. reg = <1>;
  298. #trigger-source-cells = <0>;
  299. };
  300. };
  301. };