021-arm-dts-sunxi-h3-h5-Restore-EMAC-changes.patch 1.7 KB

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  1. From 4b236a0fe51259ccde06aed046fe20bfe6e25dce Mon Sep 17 00:00:00 2001
  2. From: Corentin Labbe <clabbe.montjoie@gmail.com>
  3. Date: Tue, 31 Oct 2017 09:19:10 +0100
  4. Subject: [PATCH] arm: dts: sunxi: h3/h5: Restore EMAC changes
  5. The original dwmac-sun8i DT bindings have some issue on how to handle
  6. integrated PHY and was reverted in last RC of 4.13.
  7. But now we have a solution so we need to get back that was reverted.
  8. This patch restore sunxi-h3-h5.dtsi
  9. This reverts partially commit fe45174b72ae ("arm: dts: sunxi: Revert EMAC changes")
  10. Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com>
  11. Acked-by: Florian Fainelli <f.fainelli@gmail.com>
  12. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
  13. ---
  14. arch/arm/boot/dts/sunxi-h3-h5.dtsi | 26 ++++++++++++++++++++++++++
  15. 1 file changed, 26 insertions(+)
  16. --- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi
  17. +++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
  18. @@ -391,6 +391,32 @@
  19. clocks = <&osc24M>;
  20. };
  21. + emac: ethernet@1c30000 {
  22. + compatible = "allwinner,sun8i-h3-emac";
  23. + syscon = <&syscon>;
  24. + reg = <0x01c30000 0x10000>;
  25. + interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
  26. + interrupt-names = "macirq";
  27. + resets = <&ccu RST_BUS_EMAC>;
  28. + reset-names = "stmmaceth";
  29. + clocks = <&ccu CLK_BUS_EMAC>;
  30. + clock-names = "stmmaceth";
  31. + #address-cells = <1>;
  32. + #size-cells = <0>;
  33. + status = "disabled";
  34. +
  35. + mdio: mdio {
  36. + #address-cells = <1>;
  37. + #size-cells = <0>;
  38. + int_mii_phy: ethernet-phy@1 {
  39. + compatible = "ethernet-phy-ieee802.3-c22";
  40. + reg = <1>;
  41. + clocks = <&ccu CLK_BUS_EPHY>;
  42. + resets = <&ccu RST_BUS_EPHY>;
  43. + };
  44. + };
  45. + };
  46. +
  47. spi0: spi@01c68000 {
  48. compatible = "allwinner,sun8i-h3-spi";
  49. reg = <0x01c68000 0x1000>;