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310-sunxi-h3-Sync-OTG-and-HCI-nodes-from-Linux-DT.patch

310-sunxi-h3-Sync-OTG-and-HCI-nodes-from-Linux-DT.patch 1.9 KB
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  1. From 96c04aab58e351fa9ed7e95783018d6dbf60768f Mon Sep 17 00:00:00 2001
    2. 

  2. From: Jun Nie <jun.nie@linaro.org>
    3. 

  3. Date: Mon, 7 May 2018 13:03:40 +0530
    4. 

  4. Subject: sunxi: h3: Sync OTG and HCI nodes from Linux DT
    5. 

  5. 

  6. Allwinner H3 have a dual-routed USB PHY0 -- routed to either OHCI/EHCI
    7. 

  7. or MUSB controller.
    8. 

  8. 

  9. Signed-off-by: Jun Nie <jun.nie@linaro.org>
    10. 

  10. Reviewed-by: Jagan Teki <jagan@openedev.com>
    11. 

  11. Acked-by: Jun Nie <jun.nie@linaro.org>
    12. 

  12. ---
    13. 

  13.  arch/arm/dts/sun8i-h3.dtsi | 32 ++++++++++++++++++++++++++++++++
    14. 

  14.  1 file changed, 32 insertions(+)
    15. 

  15. 

  16. --- a/arch/arm/dts/sun8i-h3.dtsi
    17. 

  17. +++ b/arch/arm/dts/sun8i-h3.dtsi
    18. 

  18. @@ -219,6 +219,19 @@
    19. 

  19.  			#size-cells = <0>;
    20. 

  20.  		};
    21. 

  21.  
    22. 

  22. +		usb_otg: usb@1c19000 {
    23. 

  23. +			compatible = "allwinner,sun8i-h3-musb";
    24. 

  24. +			reg = <0x01c19000 0x400>;
    25. 

  25. +			clocks = <&ccu CLK_BUS_OTG>;
    26. 

  26. +			resets = <&ccu RST_BUS_OTG>;
    27. 

  27. +			interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
    28. 

  28. +			interrupt-names = "mc";
    29. 

  29. +			phys = <&usbphy 0>;
    30. 

  30. +			phy-names = "usb";
    31. 

  31. +			extcon = <&usbphy 0>;
    32. 

  32. +			status = "disabled";
    33. 

  33. +		};
    34. 

  34. +
    35. 

  35.  		usbphy: phy@01c19400 {
    36. 

  36.  			compatible = "allwinner,sun8i-h3-usb-phy";
    37. 

  37.  			reg = <0x01c19400 0x2c>,
    38. 

  38. @@ -251,6 +264,25 @@
    39. 

  39.  			#phy-cells = <1>;
    40. 

  40.  		};
    41. 

  41.  
    42. 

  42. +		ehci0: usb@1c1a000 {
    43. 

  43. +			compatible = "allwinner,sun8i-h3-ehci", "generic-ehci";
    44. 

  44. +			reg = <0x01c1a000 0x100>;
    45. 

  45. +			interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
    46. 

  46. +			clocks = <&ccu CLK_BUS_EHCI0>, <&ccu CLK_BUS_OHCI0>;
    47. 

  47. +			resets = <&ccu RST_BUS_EHCI0>, <&ccu RST_BUS_OHCI0>;
    48. 

  48. +			status = "disabled";
    49. 

  49. +		};
    50. 

  50. +
    51. 

  51. +		ohci0: usb@1c1a400 {
    52. 

  52. +			compatible = "allwinner,sun8i-h3-ohci", "generic-ohci";
    53. 

  53. +			reg = <0x01c1a400 0x100>;
    54. 

  54. +			interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
    55. 

  55. +			clocks = <&ccu CLK_BUS_EHCI0>, <&ccu CLK_BUS_OHCI0>,
    56. 

  56. +				 <&ccu CLK_USB_OHCI0>;
    57. 

  57. +			resets = <&ccu RST_BUS_EHCI0>, <&ccu RST_BUS_OHCI0>;
    58. 

  58. +			status = "disabled";
    59. 

  59. +		};
    60. 

  60. +
    61. 

  61.  		ehci1: usb@01c1b000 {
    62. 

  62.  			compatible = "allwinner,sun8i-h3-ehci", "generic-ehci";
    63. 

  63.  			reg = <0x01c1b000 0x100>;
    64.