400-ARM-dts-orange-pi-zero-plus.patch 5.0 KB

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  1. From fd576a3c594ee2356b50a0738403e5cef094935a Mon Sep 17 00:00:00 2001
  2. From: Hauke Mehrtens <hauke@hauke-m.de>
  3. Date: Sat, 9 Jun 2018 15:16:42 +0200
  4. Subject: sun50i: h5: Add initial Orange Pi Zero Plus support
  5. Orange Pi Zero Plus is an open-source single-board computer
  6. using the Allwinner H5 SOC.
  7. H5 Orangepi Zero Plus has
  8. - Quad-core Cortex-A53
  9. - 512MB DDR3
  10. - micrSD slot
  11. - 16MBit SPI Nor flash
  12. - Debug TTL UART
  13. - 1GBit/s Ethernet (RTL8211E)
  14. - Wifi (RTL8189FTV)
  15. - USB 2.0 Host
  16. - USB 2.0 OTG + power supply
  17. The device tree file is copied from the Linux kernel 4.18.
  18. Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
  19. ---
  20. arch/arm/dts/Makefile | 1 +
  21. arch/arm/dts/sun50i-h5-orangepi-zero-plus.dts | 145 ++++++++++++++++++++++++++
  22. board/sunxi/MAINTAINERS | 5 +
  23. configs/orangepi_zero_plus_defconfig | 16 +++
  24. 4 files changed, 167 insertions(+)
  25. create mode 100644 arch/arm/dts/sun50i-h5-orangepi-zero-plus.dts
  26. create mode 100644 configs/orangepi_zero_plus_defconfig
  27. --- a/arch/arm/dts/Makefile
  28. +++ b/arch/arm/dts/Makefile
  29. @@ -372,6 +372,7 @@ dtb-$(CONFIG_MACH_SUN8I_V3S) += \
  30. dtb-$(CONFIG_MACH_SUN50I_H5) += \
  31. sun50i-h5-nanopi-neo2.dtb \
  32. sun50i-h5-nanopi-neo-plus2.dtb \
  33. + sun50i-h5-orangepi-zero-plus.dtb \
  34. sun50i-h5-orangepi-pc2.dtb \
  35. sun50i-h5-orangepi-prime.dtb \
  36. sun50i-h5-orangepi-zero-plus2.dtb
  37. --- /dev/null
  38. +++ b/arch/arm/dts/sun50i-h5-orangepi-zero-plus.dts
  39. @@ -0,0 +1,145 @@
  40. +/*
  41. + * Copyright (C) 2016 ARM Ltd.
  42. + * Copyright (C) 2018 Hauke Mehrtens <hauke@hauke-m.de>
  43. + *
  44. + * SPDX-License-Identifier: (GPL-2.0+ OR X11)
  45. + */
  46. +
  47. +/dts-v1/;
  48. +#include "sun50i-h5.dtsi"
  49. +
  50. +#include <dt-bindings/gpio/gpio.h>
  51. +#include <dt-bindings/input/input.h>
  52. +#include <dt-bindings/pinctrl/sun4i-a10.h>
  53. +
  54. +/ {
  55. + model = "Xunlong Orange Pi Zero Plus";
  56. + compatible = "xunlong,orangepi-zero-plus", "allwinner,sun50i-h5";
  57. +
  58. + reg_vcc3v3: vcc3v3 {
  59. + compatible = "regulator-fixed";
  60. + regulator-name = "vcc3v3";
  61. + regulator-min-microvolt = <3300000>;
  62. + regulator-max-microvolt = <3300000>;
  63. + };
  64. +
  65. + aliases {
  66. + ethernet0 = &emac;
  67. + ethernet1 = &rtl8189ftv;
  68. + serial0 = &uart0;
  69. + };
  70. +
  71. + chosen {
  72. + stdout-path = "serial0:115200n8";
  73. + };
  74. +
  75. + leds {
  76. + compatible = "gpio-leds";
  77. +
  78. + pwr {
  79. + label = "orangepi:green:pwr";
  80. + gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>; /* PA10 */
  81. + default-state = "on";
  82. + };
  83. +
  84. + status {
  85. + label = "orangepi:red:status";
  86. + gpios = <&pio 0 17 GPIO_ACTIVE_HIGH>; /* PA17 */
  87. + };
  88. + };
  89. +
  90. + reg_gmac_3v3: gmac-3v3 {
  91. + compatible = "regulator-fixed";
  92. + regulator-name = "gmac-3v3";
  93. + regulator-min-microvolt = <3300000>;
  94. + regulator-max-microvolt = <3300000>;
  95. + startup-delay-us = <100000>;
  96. + enable-active-high;
  97. + gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>; /* PD6 */
  98. + };
  99. +};
  100. +
  101. +&ehci0 {
  102. + status = "okay";
  103. +};
  104. +
  105. +&ehci1 {
  106. + status = "okay";
  107. +};
  108. +
  109. +&emac {
  110. + pinctrl-names = "default";
  111. + pinctrl-0 = <&emac_rgmii_pins>;
  112. + phy-supply = <&reg_gmac_3v3>;
  113. + phy-handle = <&ext_rgmii_phy>;
  114. + phy-mode = "rgmii";
  115. + status = "okay";
  116. +};
  117. +
  118. +&external_mdio {
  119. + ext_rgmii_phy: ethernet-phy@1 {
  120. + compatible = "ethernet-phy-ieee802.3-c22";
  121. + reg = <1>;
  122. + };
  123. +};
  124. +
  125. +&mmc0 {
  126. + vmmc-supply = <&reg_vcc3v3>;
  127. + bus-width = <4>;
  128. + cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
  129. + status = "okay";
  130. +};
  131. +
  132. +&mmc1 {
  133. + vmmc-supply = <&reg_vcc3v3>;
  134. + bus-width = <4>;
  135. + non-removable;
  136. + status = "okay";
  137. +
  138. + /*
  139. + * Explicitly define the sdio device, so that we can add an ethernet
  140. + * alias for it (which e.g. makes u-boot set a mac-address).
  141. + */
  142. + rtl8189ftv: sdio_wifi@1 {
  143. + reg = <1>;
  144. + };
  145. +};
  146. +
  147. +/*
  148. +&spi0 {
  149. + status = "okay";
  150. +
  151. + flash@0 {
  152. + #address-cells = <1>;
  153. + #size-cells = <1>;
  154. + compatible = "mxicy,mx25l1606e", "winbond,w25q128";
  155. + reg = <0>;
  156. + spi-max-frequency = <40000000>;
  157. + };
  158. +};
  159. +*/
  160. +
  161. +&ohci0 {
  162. + status = "okay";
  163. +};
  164. +
  165. +&ohci1 {
  166. + status = "okay";
  167. +};
  168. +
  169. +&uart0 {
  170. + pinctrl-names = "default";
  171. + pinctrl-0 = <&uart0_pins_a>;
  172. + status = "okay";
  173. +};
  174. +
  175. +&usb_otg {
  176. + dr_mode = "peripheral";
  177. + status = "okay";
  178. +};
  179. +
  180. +&usbphy {
  181. + /* USB Type-A ports' VBUS is always on */
  182. + usb0_id_det-gpios = <&pio 6 12 GPIO_ACTIVE_HIGH>; /* PG12 */
  183. + status = "okay";
  184. +};
  185. --- a/board/sunxi/MAINTAINERS
  186. +++ b/board/sunxi/MAINTAINERS
  187. @@ -327,6 +327,11 @@ M: Icenowy Zheng <icenowy@aosc.xyz>
  188. S: Maintained
  189. F: configs/orangepi_zero_defconfig
  190. +ORANGEPI ZERO PLUS BOARD
  191. +M: Hauke Mehrtens <hauke@hauke-m.de>
  192. +S: Maintained
  193. +F: configs/orangepi_zero_plus_defconfig
  194. +
  195. ORANGEPI ZERO PLUS 2 BOARD
  196. M: Jagan Teki <jagan@amarulasolutions.com>
  197. S: Maintained
  198. --- /dev/null
  199. +++ b/configs/orangepi_zero_plus_defconfig
  200. @@ -0,0 +1,16 @@
  201. +CONFIG_ARM=y
  202. +CONFIG_ARCH_SUNXI=y
  203. +CONFIG_SPL=y
  204. +CONFIG_MACH_SUN50I_H5=y
  205. +CONFIG_DRAM_CLK=624
  206. +CONFIG_DRAM_ZQ=3881977
  207. +CONFIG_MMC0_CD_PIN="PH13"
  208. +CONFIG_MMC_SUNXI_SLOT_EXTRA=2
  209. +CONFIG_DEFAULT_DEVICE_TREE="sun50i-h5-orangepi-zero-plus"
  210. +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
  211. +# CONFIG_CMD_FLASH is not set
  212. +# CONFIG_SPL_DOS_PARTITION is not set
  213. +# CONFIG_SPL_EFI_PARTITION is not set
  214. +CONFIG_SUN8I_EMAC=y
  215. +CONFIG_USB_EHCI_HCD=y
  216. +CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y