300-Revert-ath5k-Remove-AHB-bus-support.patch 11 KB

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  1. From: Felix Fietkau <nbd@openwrt.org>
  2. Date: Sat, 27 Sep 2014 15:57:09 +0200
  3. Subject: [PATCH] Revert "ath5k: Remove AHB bus support"
  4. This reverts commit 093ec3c5337434f40d77c1af06c139da3e5ba6dc.
  5. ---
  6. create mode 100644 drivers/net/wireless/ath/ath5k/ahb.c
  7. --- a/drivers/net/wireless/ath/ath5k/Kconfig
  8. +++ b/drivers/net/wireless/ath/ath5k/Kconfig
  9. @@ -1,13 +1,14 @@
  10. config ATH5K
  11. tristate "Atheros 5xxx wireless cards support"
  12. depends on m
  13. - depends on PCI && MAC80211
  14. + depends on (PCI || ATHEROS_AR231X) && MAC80211
  15. select ATH_COMMON
  16. select MAC80211_LEDS
  17. select BACKPORT_LEDS_CLASS
  18. select BACKPORT_NEW_LEDS
  19. select BACKPORT_AVERAGE
  20. - select ATH5K_PCI
  21. + select ATH5K_AHB if (ATHEROS_AR231X && !PCI)
  22. + select ATH5K_PCI if (!ATHEROS_AR231X && PCI)
  23. ---help---
  24. This module adds support for wireless adapters based on
  25. Atheros 5xxx chipset.
  26. @@ -52,9 +53,16 @@ config ATH5K_TRACER
  27. If unsure, say N.
  28. +config ATH5K_AHB
  29. + bool "Atheros 5xxx AHB bus support"
  30. + depends on (ATHEROS_AR231X && !PCI)
  31. + ---help---
  32. + This adds support for WiSoC type chipsets of the 5xxx Atheros
  33. + family.
  34. +
  35. config ATH5K_PCI
  36. bool "Atheros 5xxx PCI bus support"
  37. - depends on PCI
  38. + depends on (!ATHEROS_AR231X && PCI)
  39. ---help---
  40. This adds support for PCI type chipsets of the 5xxx Atheros
  41. family.
  42. --- a/drivers/net/wireless/ath/ath5k/Makefile
  43. +++ b/drivers/net/wireless/ath/ath5k/Makefile
  44. @@ -17,5 +17,6 @@ ath5k-y += ani.o
  45. ath5k-y += sysfs.o
  46. ath5k-y += mac80211-ops.o
  47. ath5k-$(CPTCFG_ATH5K_DEBUG) += debug.o
  48. +ath5k-$(CPTCFG_ATH5K_AHB) += ahb.o
  49. ath5k-$(CPTCFG_ATH5K_PCI) += pci.o
  50. obj-$(CPTCFG_ATH5K) += ath5k.o
  51. --- /dev/null
  52. +++ b/drivers/net/wireless/ath/ath5k/ahb.c
  53. @@ -0,0 +1,234 @@
  54. +/*
  55. + * Copyright (c) 2008-2009 Atheros Communications Inc.
  56. + * Copyright (c) 2009 Gabor Juhos <juhosg@openwrt.org>
  57. + * Copyright (c) 2009 Imre Kaloz <kaloz@openwrt.org>
  58. + *
  59. + * Permission to use, copy, modify, and/or distribute this software for any
  60. + * purpose with or without fee is hereby granted, provided that the above
  61. + * copyright notice and this permission notice appear in all copies.
  62. + *
  63. + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  64. + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  65. + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  66. + * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  67. + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  68. + * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  69. + * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  70. + */
  71. +
  72. +#include <linux/nl80211.h>
  73. +#include <linux/platform_device.h>
  74. +#include <linux/etherdevice.h>
  75. +#include <linux/export.h>
  76. +#include <ar231x_platform.h>
  77. +#include "ath5k.h"
  78. +#include "debug.h"
  79. +#include "base.h"
  80. +#include "reg.h"
  81. +
  82. +/* return bus cachesize in 4B word units */
  83. +static void ath5k_ahb_read_cachesize(struct ath_common *common, int *csz)
  84. +{
  85. + *csz = L1_CACHE_BYTES >> 2;
  86. +}
  87. +
  88. +static bool
  89. +ath5k_ahb_eeprom_read(struct ath_common *common, u32 off, u16 *data)
  90. +{
  91. + struct ath5k_hw *ah = common->priv;
  92. + struct platform_device *pdev = to_platform_device(ah->dev);
  93. + struct ar231x_board_config *bcfg = dev_get_platdata(&pdev->dev);
  94. + u16 *eeprom, *eeprom_end;
  95. +
  96. + eeprom = (u16 *) bcfg->radio;
  97. + eeprom_end = ((void *) bcfg->config) + BOARD_CONFIG_BUFSZ;
  98. +
  99. + eeprom += off;
  100. + if (eeprom > eeprom_end)
  101. + return false;
  102. +
  103. + *data = *eeprom;
  104. + return true;
  105. +}
  106. +
  107. +int ath5k_hw_read_srev(struct ath5k_hw *ah)
  108. +{
  109. + struct platform_device *pdev = to_platform_device(ah->dev);
  110. + struct ar231x_board_config *bcfg = dev_get_platdata(&pdev->dev);
  111. + ah->ah_mac_srev = bcfg->devid;
  112. + return 0;
  113. +}
  114. +
  115. +static int ath5k_ahb_eeprom_read_mac(struct ath5k_hw *ah, u8 *mac)
  116. +{
  117. + struct platform_device *pdev = to_platform_device(ah->dev);
  118. + struct ar231x_board_config *bcfg = dev_get_platdata(&pdev->dev);
  119. + u8 *cfg_mac;
  120. +
  121. + if (to_platform_device(ah->dev)->id == 0)
  122. + cfg_mac = bcfg->config->wlan0_mac;
  123. + else
  124. + cfg_mac = bcfg->config->wlan1_mac;
  125. +
  126. + memcpy(mac, cfg_mac, ETH_ALEN);
  127. + return 0;
  128. +}
  129. +
  130. +static const struct ath_bus_ops ath_ahb_bus_ops = {
  131. + .ath_bus_type = ATH_AHB,
  132. + .read_cachesize = ath5k_ahb_read_cachesize,
  133. + .eeprom_read = ath5k_ahb_eeprom_read,
  134. + .eeprom_read_mac = ath5k_ahb_eeprom_read_mac,
  135. +};
  136. +
  137. +/*Initialization*/
  138. +static int ath_ahb_probe(struct platform_device *pdev)
  139. +{
  140. + struct ar231x_board_config *bcfg = dev_get_platdata(&pdev->dev);
  141. + struct ath5k_hw *ah;
  142. + struct ieee80211_hw *hw;
  143. + struct resource *res;
  144. + void __iomem *mem;
  145. + int irq;
  146. + int ret = 0;
  147. + u32 reg;
  148. +
  149. + if (!dev_get_platdata(&pdev->dev)) {
  150. + dev_err(&pdev->dev, "no platform data specified\n");
  151. + ret = -EINVAL;
  152. + goto err_out;
  153. + }
  154. +
  155. + res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  156. + if (res == NULL) {
  157. + dev_err(&pdev->dev, "no memory resource found\n");
  158. + ret = -ENXIO;
  159. + goto err_out;
  160. + }
  161. +
  162. + mem = ioremap_nocache(res->start, resource_size(res));
  163. + if (mem == NULL) {
  164. + dev_err(&pdev->dev, "ioremap failed\n");
  165. + ret = -ENOMEM;
  166. + goto err_out;
  167. + }
  168. +
  169. + res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
  170. + if (res == NULL) {
  171. + dev_err(&pdev->dev, "no IRQ resource found\n");
  172. + ret = -ENXIO;
  173. + goto err_iounmap;
  174. + }
  175. +
  176. + irq = res->start;
  177. +
  178. + hw = ieee80211_alloc_hw(sizeof(struct ath5k_hw), &ath5k_hw_ops);
  179. + if (hw == NULL) {
  180. + dev_err(&pdev->dev, "no memory for ieee80211_hw\n");
  181. + ret = -ENOMEM;
  182. + goto err_iounmap;
  183. + }
  184. +
  185. + ah = hw->priv;
  186. + ah->hw = hw;
  187. + ah->dev = &pdev->dev;
  188. + ah->iobase = mem;
  189. + ah->irq = irq;
  190. + ah->devid = bcfg->devid;
  191. +
  192. + if (bcfg->devid >= AR5K_SREV_AR2315_R6) {
  193. + /* Enable WMAC AHB arbitration */
  194. + reg = ioread32((void __iomem *) AR5K_AR2315_AHB_ARB_CTL);
  195. + reg |= AR5K_AR2315_AHB_ARB_CTL_WLAN;
  196. + iowrite32(reg, (void __iomem *) AR5K_AR2315_AHB_ARB_CTL);
  197. +
  198. + /* Enable global WMAC swapping */
  199. + reg = ioread32((void __iomem *) AR5K_AR2315_BYTESWAP);
  200. + reg |= AR5K_AR2315_BYTESWAP_WMAC;
  201. + iowrite32(reg, (void __iomem *) AR5K_AR2315_BYTESWAP);
  202. + } else {
  203. + /* Enable WMAC DMA access (assuming 5312 or 231x*/
  204. + /* TODO: check other platforms */
  205. + reg = ioread32((void __iomem *) AR5K_AR5312_ENABLE);
  206. + if (to_platform_device(ah->dev)->id == 0)
  207. + reg |= AR5K_AR5312_ENABLE_WLAN0;
  208. + else
  209. + reg |= AR5K_AR5312_ENABLE_WLAN1;
  210. + iowrite32(reg, (void __iomem *) AR5K_AR5312_ENABLE);
  211. +
  212. + /*
  213. + * On a dual-band AR5312, the multiband radio is only
  214. + * used as pass-through. Disable 2 GHz support in the
  215. + * driver for it
  216. + */
  217. + if (to_platform_device(ah->dev)->id == 0 &&
  218. + (bcfg->config->flags & (BD_WLAN0 | BD_WLAN1)) ==
  219. + (BD_WLAN1 | BD_WLAN0))
  220. + ah->ah_capabilities.cap_needs_2GHz_ovr = true;
  221. + else
  222. + ah->ah_capabilities.cap_needs_2GHz_ovr = false;
  223. + }
  224. +
  225. + ret = ath5k_init_ah(ah, &ath_ahb_bus_ops);
  226. + if (ret != 0) {
  227. + dev_err(&pdev->dev, "failed to attach device, err=%d\n", ret);
  228. + ret = -ENODEV;
  229. + goto err_free_hw;
  230. + }
  231. +
  232. + platform_set_drvdata(pdev, hw);
  233. +
  234. + return 0;
  235. +
  236. + err_free_hw:
  237. + ieee80211_free_hw(hw);
  238. + err_iounmap:
  239. + iounmap(mem);
  240. + err_out:
  241. + return ret;
  242. +}
  243. +
  244. +static int ath_ahb_remove(struct platform_device *pdev)
  245. +{
  246. + struct ar231x_board_config *bcfg = dev_get_platdata(&pdev->dev);
  247. + struct ieee80211_hw *hw = platform_get_drvdata(pdev);
  248. + struct ath5k_hw *ah;
  249. + u32 reg;
  250. +
  251. + if (!hw)
  252. + return 0;
  253. +
  254. + ah = hw->priv;
  255. +
  256. + if (bcfg->devid >= AR5K_SREV_AR2315_R6) {
  257. + /* Disable WMAC AHB arbitration */
  258. + reg = ioread32((void __iomem *) AR5K_AR2315_AHB_ARB_CTL);
  259. + reg &= ~AR5K_AR2315_AHB_ARB_CTL_WLAN;
  260. + iowrite32(reg, (void __iomem *) AR5K_AR2315_AHB_ARB_CTL);
  261. + } else {
  262. + /*Stop DMA access */
  263. + reg = ioread32((void __iomem *) AR5K_AR5312_ENABLE);
  264. + if (to_platform_device(ah->dev)->id == 0)
  265. + reg &= ~AR5K_AR5312_ENABLE_WLAN0;
  266. + else
  267. + reg &= ~AR5K_AR5312_ENABLE_WLAN1;
  268. + iowrite32(reg, (void __iomem *) AR5K_AR5312_ENABLE);
  269. + }
  270. +
  271. + ath5k_deinit_ah(ah);
  272. + iounmap(ah->iobase);
  273. + ieee80211_free_hw(hw);
  274. +
  275. + return 0;
  276. +}
  277. +
  278. +static struct platform_driver ath_ahb_driver = {
  279. + .probe = ath_ahb_probe,
  280. + .remove = ath_ahb_remove,
  281. + .driver = {
  282. + .name = "ar231x-wmac",
  283. + .owner = THIS_MODULE,
  284. + },
  285. +};
  286. +
  287. +module_platform_driver(ath_ahb_driver);
  288. --- a/drivers/net/wireless/ath/ath5k/ath5k.h
  289. +++ b/drivers/net/wireless/ath/ath5k/ath5k.h
  290. @@ -1647,6 +1647,32 @@ static inline struct ath_regulatory *ath
  291. return &(ath5k_hw_common(ah)->regulatory);
  292. }
  293. +#ifdef CONFIG_ATHEROS_AR231X
  294. +#define AR5K_AR2315_PCI_BASE ((void __iomem *)0xb0100000)
  295. +
  296. +static inline void __iomem *ath5k_ahb_reg(struct ath5k_hw *ah, u16 reg)
  297. +{
  298. + /* On AR2315 and AR2317 the PCI clock domain registers
  299. + * are outside of the WMAC register space */
  300. + if (unlikely((reg >= 0x4000) && (reg < 0x5000) &&
  301. + (ah->ah_mac_srev >= AR5K_SREV_AR2315_R6)))
  302. + return AR5K_AR2315_PCI_BASE + reg;
  303. +
  304. + return ah->iobase + reg;
  305. +}
  306. +
  307. +static inline u32 ath5k_hw_reg_read(struct ath5k_hw *ah, u16 reg)
  308. +{
  309. + return ioread32(ath5k_ahb_reg(ah, reg));
  310. +}
  311. +
  312. +static inline void ath5k_hw_reg_write(struct ath5k_hw *ah, u32 val, u16 reg)
  313. +{
  314. + iowrite32(val, ath5k_ahb_reg(ah, reg));
  315. +}
  316. +
  317. +#else
  318. +
  319. static inline u32 ath5k_hw_reg_read(struct ath5k_hw *ah, u16 reg)
  320. {
  321. return ioread32(ah->iobase + reg);
  322. @@ -1657,6 +1683,8 @@ static inline void ath5k_hw_reg_write(st
  323. iowrite32(val, ah->iobase + reg);
  324. }
  325. +#endif
  326. +
  327. static inline enum ath_bus_type ath5k_get_bus_type(struct ath5k_hw *ah)
  328. {
  329. return ath5k_hw_common(ah)->bus_ops->ath_bus_type;
  330. --- a/drivers/net/wireless/ath/ath5k/base.c
  331. +++ b/drivers/net/wireless/ath/ath5k/base.c
  332. @@ -99,6 +99,15 @@ static int ath5k_reset(struct ath5k_hw *
  333. /* Known SREVs */
  334. static const struct ath5k_srev_name srev_names[] = {
  335. +#ifdef CONFIG_ATHEROS_AR231X
  336. + { "5312", AR5K_VERSION_MAC, AR5K_SREV_AR5312_R2 },
  337. + { "5312", AR5K_VERSION_MAC, AR5K_SREV_AR5312_R7 },
  338. + { "2313", AR5K_VERSION_MAC, AR5K_SREV_AR2313_R8 },
  339. + { "2315", AR5K_VERSION_MAC, AR5K_SREV_AR2315_R6 },
  340. + { "2315", AR5K_VERSION_MAC, AR5K_SREV_AR2315_R7 },
  341. + { "2317", AR5K_VERSION_MAC, AR5K_SREV_AR2317_R1 },
  342. + { "2317", AR5K_VERSION_MAC, AR5K_SREV_AR2317_R2 },
  343. +#else
  344. { "5210", AR5K_VERSION_MAC, AR5K_SREV_AR5210 },
  345. { "5311", AR5K_VERSION_MAC, AR5K_SREV_AR5311 },
  346. { "5311A", AR5K_VERSION_MAC, AR5K_SREV_AR5311A },
  347. @@ -117,6 +126,7 @@ static const struct ath5k_srev_name srev
  348. { "5418", AR5K_VERSION_MAC, AR5K_SREV_AR5418 },
  349. { "2425", AR5K_VERSION_MAC, AR5K_SREV_AR2425 },
  350. { "2417", AR5K_VERSION_MAC, AR5K_SREV_AR2417 },
  351. +#endif
  352. { "xxxxx", AR5K_VERSION_MAC, AR5K_SREV_UNKNOWN },
  353. { "5110", AR5K_VERSION_RAD, AR5K_SREV_RAD_5110 },
  354. { "5111", AR5K_VERSION_RAD, AR5K_SREV_RAD_5111 },
  355. @@ -132,6 +142,10 @@ static const struct ath5k_srev_name srev
  356. { "5413", AR5K_VERSION_RAD, AR5K_SREV_RAD_5413 },
  357. { "5424", AR5K_VERSION_RAD, AR5K_SREV_RAD_5424 },
  358. { "5133", AR5K_VERSION_RAD, AR5K_SREV_RAD_5133 },
  359. +#ifdef CONFIG_ATHEROS_AR231X
  360. + { "2316", AR5K_VERSION_RAD, AR5K_SREV_RAD_2316 },
  361. + { "2317", AR5K_VERSION_RAD, AR5K_SREV_RAD_2317 },
  362. +#endif
  363. { "xxxxx", AR5K_VERSION_RAD, AR5K_SREV_UNKNOWN },
  364. };
  365. --- a/drivers/net/wireless/ath/ath5k/led.c
  366. +++ b/drivers/net/wireless/ath/ath5k/led.c
  367. @@ -163,14 +163,20 @@ int ath5k_init_leds(struct ath5k_hw *ah)
  368. {
  369. int ret = 0;
  370. struct ieee80211_hw *hw = ah->hw;
  371. +#ifndef CONFIG_ATHEROS_AR231X
  372. struct pci_dev *pdev = ah->pdev;
  373. +#endif
  374. char name[ATH5K_LED_MAX_NAME_LEN + 1];
  375. const struct pci_device_id *match;
  376. if (!ah->pdev)
  377. return 0;
  378. +#ifdef CONFIG_ATHEROS_AR231X
  379. + match = NULL;
  380. +#else
  381. match = pci_match_id(&ath5k_led_devices[0], pdev);
  382. +#endif
  383. if (match) {
  384. __set_bit(ATH_STAT_LEDSOFT, ah->status);
  385. ah->led_pin = ATH_PIN(match->driver_data);