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115-dt-sun6i-fix-mod0-compat.patch

115-dt-sun6i-fix-mod0-compat.patch 1.6 KB
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  1. From 95c1fe603fbea0fd01d98262bd5ff7d5442a86db Mon Sep 17 00:00:00 2001
    2. 

  2. From: Maxime Ripard <maxime.ripard@free-electrons.com>
    3. 

  3. Date: Mon, 24 Feb 2014 17:29:06 +0100
    4. 

  4. Subject: [PATCH] ARM: sun6i: dt: Fix mod0 compatible
    5. 

  5. 

  6. The module 0 clock compatibles were changed between the time the patch was sent
    7. 

  7. and it was merged. Update the compatibles.
    8. 

  8. 

  9. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
    10. 

  10. ---
    11. 

  11.  arch/arm/boot/dts/sun6i-a31.dtsi | 8 ++++----
    12. 

  12.  1 file changed, 4 insertions(+), 4 deletions(-)
    13. 

  13. 

  14. --- a/arch/arm/boot/dts/sun6i-a31.dtsi
    15. 

  15. +++ b/arch/arm/boot/dts/sun6i-a31.dtsi
    16. 

  16. @@ -200,7 +200,7 @@
    17. 

  17.  
    18. 

  18.  		spi0_clk: clk@01c200a0 {
    19. 

  19.  			#clock-cells = <0>;
    20. 

  20. -			compatible = "allwinner,sun4i-mod0-clk";
    21. 

  21. +			compatible = "allwinner,sun4i-a10-mod0-clk";
    22. 

  22.  			reg = <0x01c200a0 0x4>;
    23. 

  23.  			clocks = <&osc24M>, <&pll6>;
    24. 

  24.  			clock-output-names = "spi0";
    25. 

  25. @@ -208,7 +208,7 @@
    26. 

  26.  
    27. 

  27.  		spi1_clk: clk@01c200a4 {
    28. 

  28.  			#clock-cells = <0>;
    29. 

  29. -			compatible = "allwinner,sun4i-mod0-clk";
    30. 

  30. +			compatible = "allwinner,sun4i-a10-mod0-clk";
    31. 

  31.  			reg = <0x01c200a4 0x4>;
    32. 

  32.  			clocks = <&osc24M>, <&pll6>;
    33. 

  33.  			clock-output-names = "spi1";
    34. 

  34. @@ -216,7 +216,7 @@
    35. 

  35.  
    36. 

  36.  		spi2_clk: clk@01c200a8 {
    37. 

  37.  			#clock-cells = <0>;
    38. 

  38. -			compatible = "allwinner,sun4i-mod0-clk";
    39. 

  39. +			compatible = "allwinner,sun4i-a10-mod0-clk";
    40. 

  40.  			reg = <0x01c200a8 0x4>;
    41. 

  41.  			clocks = <&osc24M>, <&pll6>;
    42. 

  42.  			clock-output-names = "spi2";
    43. 

  43. @@ -224,7 +224,7 @@
    44. 

  44.  
    45. 

  45.  		spi3_clk: clk@01c200ac {
    46. 

  46.  			#clock-cells = <0>;
    47. 

  47. -			compatible = "allwinner,sun4i-mod0-clk";
    48. 

  48. +			compatible = "allwinner,sun4i-a10-mod0-clk";
    49. 

  49.  			reg = <0x01c200ac 0x4>;
    50. 

  50.  			clocks = <&osc24M>, <&pll6>;
    51. 

  51.  			clock-output-names = "spi3";
    52.