122-dt-sun7i-add-pinmuxing-for-gmac.patch 1.4 KB

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  1. From 9f6deb688f4cb733cd3f36e0cc88f14d2f81982d Mon Sep 17 00:00:00 2001
  2. From: Chen-Yu Tsai <wens@csie.org>
  3. Date: Mon, 10 Feb 2014 18:35:50 +0800
  4. Subject: [PATCH] ARM: dts: sun7i: Add pin muxing options for the GMAC
  5. The A20 has EMAC and GMAC muxed on the same pins.
  6. Add pin sets with gmac function for MII and RGMII mode to the DTSI.
  7. Signed-off-by: Chen-Yu Tsai <wens@csie.org>
  8. ---
  9. arch/arm/boot/dts/sun7i-a20.dtsi | 26 ++++++++++++++++++++++++++
  10. 1 file changed, 26 insertions(+)
  11. --- a/arch/arm/boot/dts/sun7i-a20.dtsi
  12. +++ b/arch/arm/boot/dts/sun7i-a20.dtsi
  13. @@ -492,6 +492,32 @@
  14. allwinner,drive = <0>;
  15. allwinner,pull = <0>;
  16. };
  17. +
  18. + gmac_pins_mii_a: gmac_mii@0 {
  19. + allwinner,pins = "PA0", "PA1", "PA2",
  20. + "PA3", "PA4", "PA5", "PA6",
  21. + "PA7", "PA8", "PA9", "PA10",
  22. + "PA11", "PA12", "PA13", "PA14",
  23. + "PA15", "PA16";
  24. + allwinner,function = "gmac";
  25. + allwinner,drive = <0>;
  26. + allwinner,pull = <0>;
  27. + };
  28. +
  29. + gmac_pins_rgmii_a: gmac_rgmii@0 {
  30. + allwinner,pins = "PA0", "PA1", "PA2",
  31. + "PA3", "PA4", "PA5", "PA6",
  32. + "PA7", "PA8", "PA10",
  33. + "PA11", "PA12", "PA13",
  34. + "PA15", "PA16";
  35. + allwinner,function = "gmac";
  36. + /*
  37. + * data lines in RGMII mode use DDR mode
  38. + * and need a higher signal drive strength
  39. + */
  40. + allwinner,drive = <3>;
  41. + allwinner,pull = <0>;
  42. + };
  43. };
  44. timer@01c20c00 {