145-1-dt-sun7i-add-a20-spi.patch 2.0 KB

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  1. From c9bfaadf8973cb4d9074e80c4bf8708deca62712 Mon Sep 17 00:00:00 2001
  2. From: Maxime Ripard <maxime.ripard@free-electrons.com>
  3. Date: Sat, 22 Feb 2014 22:35:54 +0100
  4. Subject: [PATCH] ARM: dt: sun7i: Add A20 SPI controller nodes
  5. The A20 has 4 SPI controllers compatible with the one found in the A10. Add
  6. them in the DT.
  7. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
  8. ---
  9. arch/arm/boot/dts/sun7i-a20.dtsi | 44 ++++++++++++++++++++++++++++++++++++++++
  10. 1 file changed, 44 insertions(+)
  11. --- a/arch/arm/boot/dts/sun7i-a20.dtsi
  12. +++ b/arch/arm/boot/dts/sun7i-a20.dtsi
  13. @@ -401,6 +401,28 @@
  14. #size-cells = <1>;
  15. ranges;
  16. + spi0: spi@01c05000 {
  17. + compatible = "allwinner,sun4i-a10-spi";
  18. + reg = <0x01c05000 0x1000>;
  19. + interrupts = <0 10 4>;
  20. + clocks = <&ahb_gates 20>, <&spi0_clk>;
  21. + clock-names = "ahb", "mod";
  22. + status = "disabled";
  23. + #address-cells = <1>;
  24. + #size-cells = <0>;
  25. + };
  26. +
  27. + spi1: spi@01c06000 {
  28. + compatible = "allwinner,sun4i-a10-spi";
  29. + reg = <0x01c06000 0x1000>;
  30. + interrupts = <0 11 4>;
  31. + clocks = <&ahb_gates 21>, <&spi1_clk>;
  32. + clock-names = "ahb", "mod";
  33. + status = "disabled";
  34. + #address-cells = <1>;
  35. + #size-cells = <0>;
  36. + };
  37. +
  38. emac: ethernet@01c0b000 {
  39. compatible = "allwinner,sun4i-a10-emac";
  40. reg = <0x01c0b000 0x1000>;
  41. @@ -417,6 +439,28 @@
  42. #size-cells = <0>;
  43. };
  44. + spi2: spi@01c17000 {
  45. + compatible = "allwinner,sun4i-a10-spi";
  46. + reg = <0x01c17000 0x1000>;
  47. + interrupts = <0 12 4>;
  48. + clocks = <&ahb_gates 22>, <&spi2_clk>;
  49. + clock-names = "ahb", "mod";
  50. + status = "disabled";
  51. + #address-cells = <1>;
  52. + #size-cells = <0>;
  53. + };
  54. +
  55. + spi3: spi@01c1f000 {
  56. + compatible = "allwinner,sun4i-a10-spi";
  57. + reg = <0x01c1f000 0x1000>;
  58. + interrupts = <0 50 4>;
  59. + clocks = <&ahb_gates 23>, <&spi3_clk>;
  60. + clock-names = "ahb", "mod";
  61. + status = "disabled";
  62. + #address-cells = <1>;
  63. + #size-cells = <0>;
  64. + };
  65. +
  66. pio: pinctrl@01c20800 {
  67. compatible = "allwinner,sun7i-a20-pinctrl";
  68. reg = <0x01c20800 0x400>;