| 12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455 |
- From aeb3b73fc416e14afd25f25e69f8713488edcc1b Mon Sep 17 00:00:00 2001
- From: Maxime Ripard <maxime.ripard@free-electrons.com>
- Date: Sat, 22 Feb 2014 22:35:57 +0100
- Subject: [PATCH] ARM: dt: sun5i: Add A13 SPI controller nodes
- The A13 has 3 SPI controllers compatible with the one found in the A10. Add
- them in the DT.
- Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
- ---
- arch/arm/boot/dts/sun5i-a13.dtsi | 33 +++++++++++++++++++++++++++++++++
- 1 file changed, 33 insertions(+)
- --- a/arch/arm/boot/dts/sun5i-a13.dtsi
- +++ b/arch/arm/boot/dts/sun5i-a13.dtsi
- @@ -298,6 +298,39 @@
- #size-cells = <1>;
- ranges;
-
- + spi0: spi@01c05000 {
- + compatible = "allwinner,sun4i-a10-spi";
- + reg = <0x01c05000 0x1000>;
- + interrupts = <10>;
- + clocks = <&ahb_gates 20>, <&spi0_clk>;
- + clock-names = "ahb", "mod";
- + status = "disabled";
- + #address-cells = <1>;
- + #size-cells = <0>;
- + };
- +
- + spi1: spi@01c06000 {
- + compatible = "allwinner,sun4i-a10-spi";
- + reg = <0x01c06000 0x1000>;
- + interrupts = <11>;
- + clocks = <&ahb_gates 21>, <&spi1_clk>;
- + clock-names = "ahb", "mod";
- + status = "disabled";
- + #address-cells = <1>;
- + #size-cells = <0>;
- + };
- +
- + spi2: spi@01c17000 {
- + compatible = "allwinner,sun4i-a10-spi";
- + reg = <0x01c17000 0x1000>;
- + interrupts = <12>;
- + clocks = <&ahb_gates 22>, <&spi2_clk>;
- + clock-names = "ahb", "mod";
- + status = "disabled";
- + #address-cells = <1>;
- + #size-cells = <0>;
- + };
- +
- intc: interrupt-controller@01c20400 {
- compatible = "allwinner,sun4i-ic";
- reg = <0x01c20400 0x400>;
|
