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pci.h 3.6 KB

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  1. /*
  2. * pci.h
  3. *
  4. * Copyright (C) 2016 Aleksandar Andrejevic <theflash@sdf.lonestar.org>
  5. *
  6. * This program is free software: you can redistribute it and/or modify
  7. * it under the terms of the GNU Affero General Public License as
  8. * published by the Free Software Foundation, either version 3 of the
  9. * License, or (at your option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU Affero General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU Affero General Public License
  17. * along with this program. If not, see <http://www.gnu.org/licenses/>.
  18. */
  19. #ifndef _PCI_H_
  20. #define _PCI_H_
  21. #include <common.h>
  22. #include <sdk/list.h>
  23. #define PCI_FIELD_REG(h, p) (OFFSET_OF(h, p) >> 2)
  24. #define PCI_FIELD_BIT_OFFSET(h, p) ((OFFSET_OF(h, p) & 3) << 3)
  25. #define PCI_FIELD_SIZE_MASK(h, p) ((sizeof(((h*)NULL)->p) == 1) ? 0xFF : ((sizeof(((h*)NULL)->p) == 2) ? 0xFFFF : 0xFFFFFFFF))
  26. #define PCI_FIELD_MASK(h, p) (PCI_FIELD_SIZE_MASK(h, p) << PCI_FIELD_BIT_OFFSET(h, p))
  27. #define PCI_READ_VALUE(d, h, p) ((pci_read((d), PCI_FIELD_REG(h, p)) >> PCI_FIELD_BIT_OFFSET(h, p)) & PCI_FIELD_SIZE_MASK(h, p))
  28. #define PCI_WRITE_VALUE(d, h, p, v) pci_write((d), \
  29. PCI_FIELD_REG(h, p), \
  30. (((v) << PCI_FIELD_BIT_OFFSET(h, p)) & PCI_FIELD_MASK(h, p)) \
  31. | (pci_read((d), PCI_FIELD_REG(h, p)) & ~PCI_FIELD_MASK(h, p)))
  32. #pragma pack(push, 1)
  33. typedef struct
  34. {
  35. word_t vendor_id;
  36. word_t device_id;
  37. word_t command;
  38. word_t status;
  39. byte_t revision_id;
  40. byte_t prog_if;
  41. byte_t subclass;
  42. byte_t class;
  43. byte_t cache_line_size;
  44. byte_t latency_timer;
  45. byte_t header_type;
  46. byte_t bist;
  47. } pci_header_t;
  48. typedef struct
  49. {
  50. pci_header_t header;
  51. dword_t bar[6];
  52. dword_t cardbus_ptr;
  53. word_t subsys_vendor_id;
  54. word_t subsys_id;
  55. dword_t expansion_rom_addr;
  56. byte_t capabilities;
  57. byte_t reserved[7];
  58. byte_t interrupt_line;
  59. byte_t interrupt_pin;
  60. byte_t min_grant;
  61. byte_t max_latency;
  62. } pci_standard_header_t;
  63. typedef struct
  64. {
  65. pci_header_t header;
  66. dword_t bar[2];
  67. byte_t primary_bus_num;
  68. byte_t secondary_bus_num;
  69. byte_t subordinate_bus_num;
  70. byte_t secondary_latency_timer;
  71. byte_t io_base;
  72. byte_t io_limit;
  73. word_t secondary_status;
  74. word_t prefetchable_mem_base;
  75. word_t prefetchable_mem_limit;
  76. dword_t prefetchable_base_high;
  77. dword_t prefetchable_limit_high;
  78. word_t io_base_high;
  79. word_t io_limit_high;
  80. byte_t capabilities;
  81. byte_t reserved[3];
  82. dword_t expansion_rom_addr;
  83. byte_t interrupt_line;
  84. byte_t interrupt_pin;
  85. word_t bridge_control;
  86. } pci_bridge_header_t;
  87. #pragma pack(pop)
  88. typedef struct _pci_device_t
  89. {
  90. list_entry_t list;
  91. dword_t bus, slot, function;
  92. dword_t class, subclass, prog_if;
  93. bool_t in_use;
  94. } pci_device_t;
  95. enum
  96. {
  97. PCI_LEGACY_DEVICE,
  98. PCI_MASS_STORAGE_DEVICE,
  99. PCI_NETWORK_DEVICE,
  100. PCI_DISPLAY_DEVICE,
  101. PCI_MULTIMEDIA_DEVICE,
  102. PCI_MEMORY_DEVICE,
  103. PCI_BRIDGE_DEVICE,
  104. PCI_COMMUNICATION_DEVICE,
  105. PCI_PERIPHERAL_DEVICE,
  106. PCI_INPUT_DEVICE,
  107. PCI_DOCKING_STATION,
  108. PCI_PROCESSOR,
  109. PCI_WIRELESS_DEVICE
  110. };
  111. extern const char *pci_device_classes[];
  112. void pci_init(void);
  113. list_entry_t *get_pci_device_list_head(void);
  114. dword_t pci_read(pci_device_t *device, dword_t reg);
  115. void pci_write(pci_device_t *device, dword_t reg, dword_t data);
  116. #endif