reform2-trackball.pro 4.0 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267
  1. update=2020-05-22T21:15:06 CEST
  2. version=1
  3. last_client=kicad
  4. [cvpcb]
  5. version=1
  6. NetIExt=net
  7. [general]
  8. version=1
  9. [pcbnew]
  10. version=1
  11. PageLayoutDescrFile=
  12. LastNetListRead=
  13. CopperLayerCount=2
  14. BoardThickness=1.6
  15. AllowMicroVias=0
  16. AllowBlindVias=0
  17. RequireCourtyardDefinitions=0
  18. ProhibitOverlappingCourtyards=1
  19. MinTrackWidth=0.2
  20. MinViaDiameter=0.4
  21. MinViaDrill=0.3
  22. MinMicroViaDiameter=0.2
  23. MinMicroViaDrill=0.09999999999999999
  24. MinHoleToHole=0.25
  25. TrackWidth1=0.3
  26. ViaDiameter1=0.8
  27. ViaDrill1=0.4
  28. dPairWidth1=0.2
  29. dPairGap1=0.25
  30. dPairViaGap1=0.25
  31. SilkLineWidth=0.15
  32. SilkTextSizeV=1
  33. SilkTextSizeH=1
  34. SilkTextSizeThickness=0.15
  35. SilkTextItalic=0
  36. SilkTextUpright=1
  37. CopperLineWidth=0.2
  38. CopperTextSizeV=1.5
  39. CopperTextSizeH=1.5
  40. CopperTextThickness=0.3
  41. CopperTextItalic=0
  42. CopperTextUpright=1
  43. EdgeCutLineWidth=0.09999999999999999
  44. CourtyardLineWidth=0.05
  45. OthersLineWidth=0.15
  46. OthersTextSizeV=1
  47. OthersTextSizeH=1
  48. OthersTextSizeThickness=0.15
  49. OthersTextItalic=0
  50. OthersTextUpright=1
  51. SolderMaskClearance=0
  52. SolderMaskMinWidth=0
  53. SolderPasteClearance=0
  54. SolderPasteRatio=-0
  55. [pcbnew/Layer.F.Cu]
  56. Name=F.Cu
  57. Type=0
  58. Enabled=1
  59. [pcbnew/Layer.In1.Cu]
  60. Name=In1.Cu
  61. Type=0
  62. Enabled=0
  63. [pcbnew/Layer.In2.Cu]
  64. Name=In2.Cu
  65. Type=0
  66. Enabled=0
  67. [pcbnew/Layer.In3.Cu]
  68. Name=In3.Cu
  69. Type=0
  70. Enabled=0
  71. [pcbnew/Layer.In4.Cu]
  72. Name=In4.Cu
  73. Type=0
  74. Enabled=0
  75. [pcbnew/Layer.In5.Cu]
  76. Name=In5.Cu
  77. Type=0
  78. Enabled=0
  79. [pcbnew/Layer.In6.Cu]
  80. Name=In6.Cu
  81. Type=0
  82. Enabled=0
  83. [pcbnew/Layer.In7.Cu]
  84. Name=In7.Cu
  85. Type=0
  86. Enabled=0
  87. [pcbnew/Layer.In8.Cu]
  88. Name=In8.Cu
  89. Type=0
  90. Enabled=0
  91. [pcbnew/Layer.In9.Cu]
  92. Name=In9.Cu
  93. Type=0
  94. Enabled=0
  95. [pcbnew/Layer.In10.Cu]
  96. Name=In10.Cu
  97. Type=0
  98. Enabled=0
  99. [pcbnew/Layer.In11.Cu]
  100. Name=In11.Cu
  101. Type=0
  102. Enabled=0
  103. [pcbnew/Layer.In12.Cu]
  104. Name=In12.Cu
  105. Type=0
  106. Enabled=0
  107. [pcbnew/Layer.In13.Cu]
  108. Name=In13.Cu
  109. Type=0
  110. Enabled=0
  111. [pcbnew/Layer.In14.Cu]
  112. Name=In14.Cu
  113. Type=0
  114. Enabled=0
  115. [pcbnew/Layer.In15.Cu]
  116. Name=In15.Cu
  117. Type=0
  118. Enabled=0
  119. [pcbnew/Layer.In16.Cu]
  120. Name=In16.Cu
  121. Type=0
  122. Enabled=0
  123. [pcbnew/Layer.In17.Cu]
  124. Name=In17.Cu
  125. Type=0
  126. Enabled=0
  127. [pcbnew/Layer.In18.Cu]
  128. Name=In18.Cu
  129. Type=0
  130. Enabled=0
  131. [pcbnew/Layer.In19.Cu]
  132. Name=In19.Cu
  133. Type=0
  134. Enabled=0
  135. [pcbnew/Layer.In20.Cu]
  136. Name=In20.Cu
  137. Type=0
  138. Enabled=0
  139. [pcbnew/Layer.In21.Cu]
  140. Name=In21.Cu
  141. Type=0
  142. Enabled=0
  143. [pcbnew/Layer.In22.Cu]
  144. Name=In22.Cu
  145. Type=0
  146. Enabled=0
  147. [pcbnew/Layer.In23.Cu]
  148. Name=In23.Cu
  149. Type=0
  150. Enabled=0
  151. [pcbnew/Layer.In24.Cu]
  152. Name=In24.Cu
  153. Type=0
  154. Enabled=0
  155. [pcbnew/Layer.In25.Cu]
  156. Name=In25.Cu
  157. Type=0
  158. Enabled=0
  159. [pcbnew/Layer.In26.Cu]
  160. Name=In26.Cu
  161. Type=0
  162. Enabled=0
  163. [pcbnew/Layer.In27.Cu]
  164. Name=In27.Cu
  165. Type=0
  166. Enabled=0
  167. [pcbnew/Layer.In28.Cu]
  168. Name=In28.Cu
  169. Type=0
  170. Enabled=0
  171. [pcbnew/Layer.In29.Cu]
  172. Name=In29.Cu
  173. Type=0
  174. Enabled=0
  175. [pcbnew/Layer.In30.Cu]
  176. Name=In30.Cu
  177. Type=0
  178. Enabled=0
  179. [pcbnew/Layer.B.Cu]
  180. Name=B.Cu
  181. Type=0
  182. Enabled=1
  183. [pcbnew/Layer.B.Adhes]
  184. Enabled=1
  185. [pcbnew/Layer.F.Adhes]
  186. Enabled=1
  187. [pcbnew/Layer.B.Paste]
  188. Enabled=1
  189. [pcbnew/Layer.F.Paste]
  190. Enabled=1
  191. [pcbnew/Layer.B.SilkS]
  192. Enabled=1
  193. [pcbnew/Layer.F.SilkS]
  194. Enabled=1
  195. [pcbnew/Layer.B.Mask]
  196. Enabled=1
  197. [pcbnew/Layer.F.Mask]
  198. Enabled=1
  199. [pcbnew/Layer.Dwgs.User]
  200. Enabled=1
  201. [pcbnew/Layer.Cmts.User]
  202. Enabled=1
  203. [pcbnew/Layer.Eco1.User]
  204. Enabled=1
  205. [pcbnew/Layer.Eco2.User]
  206. Enabled=1
  207. [pcbnew/Layer.Edge.Cuts]
  208. Enabled=1
  209. [pcbnew/Layer.Margin]
  210. Enabled=1
  211. [pcbnew/Layer.B.CrtYd]
  212. Enabled=1
  213. [pcbnew/Layer.F.CrtYd]
  214. Enabled=1
  215. [pcbnew/Layer.B.Fab]
  216. Enabled=1
  217. [pcbnew/Layer.F.Fab]
  218. Enabled=1
  219. [pcbnew/Layer.Rescue]
  220. Enabled=0
  221. [pcbnew/Netclasses]
  222. [pcbnew/Netclasses/Default]
  223. Name=Default
  224. Clearance=0.2
  225. TrackWidth=0.3
  226. ViaDiameter=0.8
  227. ViaDrill=0.4
  228. uViaDiameter=0.3
  229. uViaDrill=0.1
  230. dPairWidth=0.2
  231. dPairGap=0.25
  232. dPairViaGap=0.25
  233. [pcbnew/Netclasses/1]
  234. Name=Fine
  235. Clearance=0.2
  236. TrackWidth=0.25
  237. ViaDiameter=0.8
  238. ViaDrill=0.4
  239. uViaDiameter=0.3
  240. uViaDrill=0.1
  241. dPairWidth=0.2
  242. dPairGap=0.25
  243. dPairViaGap=0.25
  244. [pcbnew/Netclasses/2]
  245. Name=PWR
  246. Clearance=0.2
  247. TrackWidth=0.4
  248. ViaDiameter=0.8
  249. ViaDrill=0.4
  250. uViaDiameter=0.3
  251. uViaDrill=0.1
  252. dPairWidth=0.2
  253. dPairGap=0.25
  254. dPairViaGap=0.25
  255. [eeschema]
  256. version=1
  257. LibDir=
  258. [schematic_editor]
  259. version=1
  260. PageLayoutDescrFile=
  261. PlotDirectoryName=/tmp/
  262. SubpartIdSeparator=0
  263. SubpartFirstId=65
  264. NetFmtName=Pcbnew
  265. SpiceAjustPassiveValues=0
  266. LabSize=60
  267. ERC_TestSimilarLabels=1