reform/reform2-motherboard-pcb/SN65DSI86ZQER/SN65DSI86ZQER.lib

EESchema-LIBRARY Version 2.3
#encoding utf-8
#(c) SnapEDA 2016 (snapeda.com)
#This work is licensed under a Creative Commons Attribution-ShareAlike 4.0 International License (CC BY-SA) with Design Exception 1.0
#
# SN65DSI86ZQER
#
DEF SN65DSI86ZQER U 0 40 Y Y 1 L N
F0 "U" -628 1752 50 H V L BNN
F1 "SN65DSI86ZQER" -596 -2192 50 H V L BNN
F2 "BGA64C50P9X9_500X500X100" 0 0 50 H I L BNN
F3 "Texas Instruments" 0 0 50 H I L BNN
F4 "Dual-Channel MIPI® DSI to Embedded DisplayPort™ _eDP _ Bridge 64-BGA MICROSTAR JUNIOR -40 to 85" 0 0 50 H I L BNN
F5 "BGA-64 Texas Instruments" 0 0 50 H I L BNN
F6 "None" 0 0 50 H I L BNN
F7 "SN65DSI86ZQER" 0 0 50 H I L BNN
F8 "Unavailable" 0 0 50 H I L BNN
DRAW
P 2 0 0 10 -600 1700 600 1700 N
P 2 0 0 10 600 1700 600 -2100 N
P 2 0 0 10 600 -2100 -600 -2100 N
P 2 0 0 10 -600 -2100 -600 1700 N
X DA1P H4 -700 1500 100 R 40 40 0 0 I 
X VCC D5 700 1400 100 L 40 40 0 0 W 
X VCC D6 700 1400 100 L 40 40 0 0 W 
X VCC J2 700 1400 100 L 40 40 0 0 W 
X VCC J9 700 1400 100 L 40 40 0 0 W 
X ML0P F8 700 800 100 L 40 40 0 0 O 
X ADDR A1 -700 -1100 100 R 40 40 0 0 B 
X GND A8 700 -2000 100 L 40 40 0 0 W 
X GND D8 700 -2000 100 L 40 40 0 0 W 
X GND E4 700 -2000 100 L 40 40 0 0 W 
X GND E5 700 -2000 100 L 40 40 0 0 W 
X GND F4 700 -2000 100 L 40 40 0 0 W 
X GND F5 700 -2000 100 L 40 40 0 0 W 
X GND F6 700 -2000 100 L 40 40 0 0 W 
X GND G8 700 -2000 100 L 40 40 0 0 W 
X AUXN H9 -700 -1300 100 R 40 40 0 0 B 
X DA0N J3 -700 100 100 R 40 40 0 0 B 
X DA2P H6 -700 1400 100 R 40 40 0 0 I 
X DA3P H7 -700 1300 100 R 40 40 0 0 I 
X DACP H5 -700 1200 100 R 40 40 0 0 I 
X DB0P C2 -700 1100 100 R 40 40 0 0 I 
X DB1P D2 -700 1000 100 R 40 40 0 0 I 
X DB2P F2 -700 900 100 R 40 40 0 0 I 
X DB3P G2 -700 800 100 R 40 40 0 0 I 
X DBCP E2 -700 700 100 R 40 40 0 0 I 
X ~EN~ B1 -700 500 100 R 40 40 0 0 I 
X GPIO1 A4 700 -300 100 L 40 40 0 0 B 
X HPD J8 -700 400 100 R 40 40 0 0 I 
X IRQ A3 700 -800 100 L 40 40 0 0 O 
X ML1P E8 700 700 100 L 40 40 0 0 O 
X ML2P C8 700 600 100 L 40 40 0 0 O 
X ML3P B8 700 500 100 L 40 40 0 0 O 
X REFCLK A7 -700 300 100 R 40 40 0 0 I C
X SCL H1 -700 -1500 100 R 40 40 0 0 B C
X SDA J1 -700 -1600 100 R 40 40 0 0 B 
X TEST1 B3 -700 -1800 100 R 40 40 0 0 I 
X TEST2 B5 -700 -1900 100 R 40 40 0 0 B 
X TEST3 B7 -700 -2000 100 R 40 40 0 0 B 
X VCCA A9 700 1300 100 L 40 40 0 0 W 
X VCCA B2 700 1300 100 L 40 40 0 0 W 
X VCCA E6 700 1300 100 L 40 40 0 0 W 
X VCCA G9 700 1300 100 L 40 40 0 0 W 
X VCCA H2 700 1300 100 L 40 40 0 0 W 
X VCCIO A2 700 1200 100 L 40 40 0 0 W 
X VCCIO B6 700 1200 100 L 40 40 0 0 W 
X VPLL D9 700 1100 100 L 40 40 0 0 W 
X ML0N F9 700 400 100 L 40 40 0 0 O 
X ML1N E9 700 300 100 L 40 40 0 0 O 
X ML2N C9 700 200 100 L 40 40 0 0 O 
X ML3N B9 700 100 100 L 40 40 0 0 O 
X GPIO2 A5 700 -400 100 L 40 40 0 0 B 
X GPIO3 A6 700 -500 100 L 40 40 0 0 B 
X GPIO4 B4 700 -600 100 L 40 40 0 0 B 
X AUXP H8 -700 -1200 100 R 40 40 0 0 B 
X DA1N J4 -700 0 100 R 40 40 0 0 I 
X DA2N J6 -700 -100 100 R 40 40 0 0 I 
X DA3N J7 -700 -200 100 R 40 40 0 0 I 
X DACN J5 -700 -300 100 R 40 40 0 0 I 
X DB0N C1 -700 -400 100 R 40 40 0 0 I 
X DB1N D1 -700 -500 100 R 40 40 0 0 I 
X DB2N F1 -700 -600 100 R 40 40 0 0 I 
X DB3N G1 -700 -700 100 R 40 40 0 0 I 
X DBCN E1 -700 -800 100 R 40 40 0 0 I 
X DA0P H3 -700 1600 100 R 40 40 0 0 I 
ENDDRAW
ENDDEF
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# End Library