TPS74801DRCR.lib 1.3 KB

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  1. EESchema-LIBRARY Version 2.3
  2. #encoding utf-8
  3. #(c) SnapEDA 2016 (snapeda.com)
  4. #This work is licensed under a Creative Commons Attribution-ShareAlike 4.0 International License (CC BY-SA) with Design Exception 1.0
  5. #
  6. # TPS74801DRCR
  7. #
  8. DEF TPS74801DRCR U 0 40 Y Y 1 L N
  9. F0 "U" -211 774 50 H V L BNN
  10. F1 "TPS74801DRCR" -187 -1011 50 H V L BNN
  11. F2 "SON50P300X300X100-11N" 0 0 50 H I L BNN
  12. F3 "TPS74801DRCR" 0 0 50 H I L BNN "MP"
  13. F4 "Good" 0 0 50 H I L BNN "Availability"
  14. F5 "1.25 USD" 0 0 50 H I L BNN "Price"
  15. F6 "Single Output LDO, 1.5A, Adj. (0.8 to 3.6V), Programmable Soft-Start 10-VSON -40 to 125" 0 0 50 H I L BNN "Description"
  16. F7 "Texas Instruments" 0 0 50 H I L BNN "MF"
  17. F8 "VSON-10 Texas Instruments" 0 0 50 H I L BNN "Package"
  18. DRAW
  19. P 2 0 0 16 -500 700 -500 -900 N
  20. P 2 0 0 16 -500 -900 500 -900 N
  21. P 2 0 0 16 500 -900 500 700 N
  22. P 2 0 0 16 500 700 -500 700 N
  23. X IN_2 1 -700 500 200 R 40 40 0 0 I
  24. X IN 2 -700 400 200 R 40 40 0 0 I
  25. X EN 5 -700 200 200 R 40 40 0 0 I
  26. X PG 3 -700 0 200 R 40 40 0 0 O
  27. X SS 7 -700 -100 200 R 40 40 0 0 I
  28. X FB 8 -700 -200 200 R 40 40 0 0 P
  29. X BIAS 4 -700 -300 200 R 40 40 0 0 I
  30. X EP 11 -700 -500 200 R 40 40 0 0 P
  31. X GND 6 -700 -700 200 R 40 40 0 0 P
  32. X OUT_2 9 700 500 200 L 40 40 0 0 O
  33. X OUT 10 700 400 200 L 40 40 0 0 O
  34. ENDDRAW
  35. ENDDEF
  36. #
  37. # End Library