jit not8/neg8

gen/x86_table.js

@@ -381,8 +381,8 @@ const encodings = [
 
     { opcode: 0xF6, e: 1, fixed_g: 0, imm8: 1, custom: 1 },
     { opcode: 0xF6, e: 1, fixed_g: 1, imm8: 1, custom: 1 },
-    { opcode: 0xF6, e: 1, fixed_g: 2, },
-    { opcode: 0xF6, e: 1, fixed_g: 3, },
+    { opcode: 0xF6, e: 1, fixed_g: 2, custom: 1 },
+    { opcode: 0xF6, e: 1, fixed_g: 3, custom: 1 },
     { opcode: 0xF6, e: 1, fixed_g: 4, mask_flags: af | zf, },
     { opcode: 0xF6, e: 1, fixed_g: 5, mask_flags: af | zf, },
     { opcode: 0xF6, e: 1, fixed_g: 6, block_boundary: 1, }, // div/idiv: Not a block boundary, but doesn't use control flow exceptions

src/rust/cpu/arith.rs

@@ -99,6 +99,8 @@ pub unsafe fn dec32(x: i32) -> i32 { return dec(x, OPSIZE_32); }
 
 pub unsafe fn neg(dest_operand: i32, op_size: i32) -> i32 { sub(0, dest_operand, op_size) }
 #[no_mangle]
+pub unsafe fn not8(x: i32) -> i32 { return !x; }
+#[no_mangle]
 pub unsafe fn neg8(x: i32) -> i32 { return neg(x, OPSIZE_8); }
 #[no_mangle]
 pub unsafe fn neg16(x: i32) -> i32 { return neg(x, OPSIZE_16); }

src/rust/jit_instructions.rs

@@ -3839,6 +3839,9 @@ pub fn instr32_F7_1_reg_jit(ctx: &mut JitContext, r: u32, imm: u32) {
     instr32_F7_0_reg_jit(ctx, r, imm)
 }
 
+define_instruction_read_write_mem8!("not8", instr_F6_2_mem_jit, instr_F6_2_reg_jit, none);
+define_instruction_read_write_mem8!("neg8", instr_F6_3_mem_jit, instr_F6_3_reg_jit, none);
+
 define_instruction_read_write_mem16!(gen_not16, instr16_F7_2_mem_jit, instr16_F7_2_reg_jit, none);
 define_instruction_read_write_mem32!(gen_not32, instr32_F7_2_mem_jit, instr32_F7_2_reg_jit, none);
 define_instruction_read_write_mem16!(gen_neg16, instr16_F7_3_mem_jit, instr16_F7_3_reg_jit, none);