Update rustfmt

.rustfmt.toml

@@ -3,3 +3,7 @@ match_block_trailing_comma = true
 fn_single_line = true
 imports_indent = "Block"
 control_brace_style = "ClosingNextLine"
+single_line_if_else_max_width = 92
+ignore = [
+    "src/rust/gen"
+]

src/rust/cpu2/cpu.rs

@@ -19,10 +19,10 @@ extern "C" {
 
 use cpu2::fpu::fpu_set_tag_word;
 use cpu2::global_pointers::*;
-pub use cpu2::imports::{mem16, mem32s, mem8};
+pub use cpu2::imports::{mem8, mem16, mem32s};
 use cpu2::memory::{
-    in_mapped_range, read128, read16, read32s, read64s, read8, read_aligned16, read_aligned32,
-    write128, write16, write32, write64, write8, write_aligned32,
+    in_mapped_range, read8, read16, read32s, read64s, read128, read_aligned16, read_aligned32,
+    write8, write16, write32, write64, write128, write_aligned32,
 };
 use cpu2::misc_instr::{
     adjust_stack_reg, get_stack_pointer, getaf, getcf, getof, getpf, getsf, getzf, pop16, pop32s,
@@ -335,12 +335,7 @@ impl SegmentDescriptor {
     pub fn dpl(&self) -> u8 { (self.access_byte() >> 5) & 3 }
     pub fn is_32(&self) -> bool { self.flags() & 4 == 4 }
     pub fn effective_limit(&self) -> u32 {
-        if self.flags() & 8 == 8 {
-            self.limit() << 12 | 0xFFF
-        }
-        else {
-            self.limit()
-        }
+        if self.flags() & 8 == 8 { self.limit() << 12 | 0xFFF } else { self.limit() }
     }
 }
 
@@ -822,12 +817,7 @@ pub unsafe fn call_interrupt_vector(
             let old_ss = *sreg.offset(SS as isize) as i32;
 
             let error_code_space = if error_code.is_some() { 1 } else { 0 };
-            let vm86_space = if (old_flags & FLAG_VM) == FLAG_VM {
-                4
-            }
-            else {
-                0
-            };
+            let vm86_space = if (old_flags & FLAG_VM) == FLAG_VM { 4 } else { 0 };
             let bytes_per_arg = if descriptor.is_32() { 4 } else { 2 };
 
             let stack_space = bytes_per_arg * (5 + error_code_space + vm86_space);
@@ -1120,12 +1110,7 @@ pub unsafe fn do_page_walk(addr: i32, for_writing: bool, user: bool) -> Result<i
 
             let new_page_dir_entry = page_dir_entry
                 | PAGE_TABLE_ACCESSED_MASK
-                | if for_writing {
-                    PAGE_TABLE_DIRTY_MASK
-                }
-                else {
-                    0
-                };
+                | if for_writing { PAGE_TABLE_DIRTY_MASK } else { 0 };
 
             if page_dir_entry != new_page_dir_entry {
                 write_aligned32(page_dir_addr as u32, new_page_dir_entry);
@@ -1177,12 +1162,7 @@ pub unsafe fn do_page_walk(addr: i32, for_writing: bool, user: bool) -> Result<i
             }
             let new_page_table_entry = page_table_entry
                 | PAGE_TABLE_ACCESSED_MASK
-                | if for_writing {
-                    PAGE_TABLE_DIRTY_MASK
-                }
-                else {
-                    0
-                };
+                | if for_writing { PAGE_TABLE_DIRTY_MASK } else { 0 };
             if page_table_entry != new_page_table_entry {
                 write_aligned32(page_table_addr as u32, new_page_table_entry);
             }
@@ -1224,18 +1204,8 @@ pub unsafe fn do_page_walk(addr: i32, for_writing: bool, user: bool) -> Result<i
     let info_bits = TLB_VALID
         | if can_write { 0 } else { TLB_READONLY }
         | if allow_user { 0 } else { TLB_NO_USER }
-        | if is_in_mapped_range {
-            TLB_IN_MAPPED_RANGE
-        }
-        else {
-            0
-        }
-        | if global && 0 != *cr.offset(4) & CR4_PGE {
-            TLB_GLOBAL
-        }
-        else {
-            0
-        }
+        | if is_in_mapped_range { TLB_IN_MAPPED_RANGE } else { 0 }
+        | if global && 0 != *cr.offset(4) & CR4_PGE { TLB_GLOBAL } else { 0 }
         | if has_code { TLB_HAS_CODE } else { 0 };
     dbg_assert!((high ^ page << 12) & 0xFFF == 0);
     *tlb_data.offset(page as isize) = high ^ page << 12 | info_bits;
@@ -1420,12 +1390,8 @@ pub unsafe fn tlb_set_has_code(physical_page: Page, has_code: bool) {
         if 0 != entry {
             let tlb_physical_page = entry as u32 >> 12 ^ page as u32;
             if physical_page == tlb_physical_page {
-                *tlb_data.offset(page as isize) = if has_code {
-                    entry | TLB_HAS_CODE
-                }
-                else {
-                    entry & !TLB_HAS_CODE
-                }
+                *tlb_data.offset(page as isize) =
+                    if has_code { entry | TLB_HAS_CODE } else { entry & !TLB_HAS_CODE }
             }
         }
     }
@@ -1764,12 +1730,7 @@ pub unsafe fn test_privileges_for_io(port: i32, size: i32) -> bool {
                     translate_address_system_read(tsr_offset + iomap_base + (port >> 3)),
                     false
                 );
-                let port_info = if mask & 0xFF00 != 0 {
-                    read16(addr)
-                }
-                else {
-                    read8(addr)
-                };
+                let port_info = if mask & 0xFF00 != 0 { read16(addr) } else { read8(addr) };
 
                 dbg_assert!(addr & 0xFFF < 0xFFF);
 
@@ -1841,12 +1802,7 @@ pub unsafe fn get_seg_prefix_ds(offset: i32) -> i32 { return get_seg_prefix(DS)
 pub unsafe fn get_seg_prefix_ss(offset: i32) -> i32 { return get_seg_prefix(SS) + offset; }
 
 pub unsafe fn modrm_resolve(modrm_byte: i32) -> OrPageFault<i32> {
-    if is_asize_32() {
-        resolve_modrm32(modrm_byte)
-    }
-    else {
-        resolve_modrm16(modrm_byte)
-    }
+    if is_asize_32() { resolve_modrm32(modrm_byte) } else { resolve_modrm16(modrm_byte) }
 }
 
 pub unsafe fn run_instruction(opcode: i32) { ::gen::interpreter::run(opcode as u32) }
@@ -2789,12 +2745,7 @@ pub unsafe fn task_switch_test_mmx_jit() {
 
 pub unsafe fn read_moffs() -> OrPageFault<i32> {
     // read 2 or 4 byte from ip, depending on address size attribute
-    if is_asize_32() {
-        read_imm32s()
-    }
-    else {
-        read_imm16()
-    }
+    if is_asize_32() { read_imm32s() } else { read_imm16() }
 }
 
 #[no_mangle]

src/rust/cpu2/fpu.rs

@@ -519,12 +519,8 @@ pub unsafe fn fpu_fprem(ieee: bool) {
     let exp1 = st1.log2();
     let d = (exp0 - exp1).abs();
     if !intel_compatibility || d < 64.0 {
-        let fprem_quotient = convert_f64_to_i32(if ieee {
-            round(st0 / st1)
-        }
-        else {
-            trunc(st0 / st1)
-        });
+        let fprem_quotient =
+            convert_f64_to_i32(if ieee { round(st0 / st1) } else { trunc(st0 / st1) });
         fpu_write_st(*fpu_stack_ptr as i32, fmod(st0, st1));
         *fpu_status_word &= !(FPU_C0 | FPU_C1 | FPU_C3);
         if 0 != fprem_quotient & 1 {
@@ -541,12 +537,7 @@ pub unsafe fn fpu_fprem(ieee: bool) {
     else {
         let n = 32.0;
         let fprem_quotient = convert_f64_to_i32(
-            if ieee {
-                round(st0 / st1)
-            }
-            else {
-                trunc(st0 / st1)
-            } / pow(2.0, d - n),
+            if ieee { round(st0 / st1) } else { trunc(st0 / st1) } / pow(2.0, d - n),
         );
         fpu_write_st(
             *fpu_stack_ptr as i32,

src/rust/cpu2/global_pointers.rs

@@ -1,6 +1,6 @@
 #![allow(non_upper_case_globals)]
 
-use cpu2::cpu::{reg128, reg64};
+use cpu2::cpu::{reg64, reg128};
 
 pub const reg8: *mut u8 = 64 as *mut u8;
 pub const reg16: *mut u16 = 64 as *mut u16;

src/rust/cpu2/instructions.rs

@@ -2784,12 +2784,7 @@ pub unsafe fn instr_F9() {
 pub unsafe fn instr_FA_without_fault() -> bool {
     // cli
     if !*protected_mode
-        || if 0 != *flags & FLAG_VM {
-            getiopl() == 3
-        }
-        else {
-            getiopl() >= *cpl as i32
-        }
+        || if 0 != *flags & FLAG_VM { getiopl() == 3 } else { getiopl() >= *cpl as i32 }
     {
         *flags &= !FLAG_INTERRUPT;
         return true;
@@ -2822,12 +2817,7 @@ pub unsafe fn instr_FB() {
     // sti
     let old_if = *flags & FLAG_INTERRUPT;
     if !*protected_mode
-        || if 0 != *flags & FLAG_VM {
-            getiopl() == 3
-        }
-        else {
-            getiopl() >= *cpl as i32
-        }
+        || if 0 != *flags & FLAG_VM { getiopl() == 3 } else { getiopl() >= *cpl as i32 }
     {
         *flags |= FLAG_INTERRUPT;
         if old_if == 0 {

src/rust/cpu2/instructions_0f.rs

@@ -29,8 +29,8 @@ extern "C" {
 
 use cpu2::arith::{
     bsf16, bsf32, bsr16, bsr32, bt_mem, bt_reg, btc_mem, btc_reg, btr_mem, btr_reg, bts_mem,
-    bts_reg, cmpxchg16, cmpxchg32, cmpxchg8, popcnt, shld16, shld32, shrd16, shrd32, xadd16,
-    xadd32, xadd8,
+    bts_reg, cmpxchg8, cmpxchg16, cmpxchg32, popcnt, shld16, shld32, shrd16, shrd32, xadd8, xadd16,
+    xadd32,
 };
 use cpu2::arith::{
     imul_reg16, imul_reg32, saturate_sd_to_sb, saturate_sd_to_sw, saturate_sd_to_ub,
@@ -1932,30 +1932,10 @@ pub unsafe fn instr_660F64_mem(addr: i32, r: i32) {
 pub unsafe fn instr_0F65(source: reg64, r: i32) {
     // pcmpgtw mm, mm/m64
     let destination = read_mmx64s(r);
-    let word0 = if destination.i16_0[0] as i32 > source.i16_0[0] as i32 {
-        0xFFFF
-    }
-    else {
-        0
-    };
-    let word1 = if destination.i16_0[1] as i32 > source.i16_0[1] as i32 {
-        0xFFFF
-    }
-    else {
-        0
-    };
-    let word2 = if destination.i16_0[2] as i32 > source.i16_0[2] as i32 {
-        0xFFFF
-    }
-    else {
-        0
-    };
-    let word3 = if destination.i16_0[3] as i32 > source.i16_0[3] as i32 {
-        0xFFFF
-    }
-    else {
-        0
-    };
+    let word0 = if destination.i16_0[0] as i32 > source.i16_0[0] as i32 { 0xFFFF } else { 0 };
+    let word1 = if destination.i16_0[1] as i32 > source.i16_0[1] as i32 { 0xFFFF } else { 0 };
+    let word2 = if destination.i16_0[2] as i32 > source.i16_0[2] as i32 { 0xFFFF } else { 0 };
+    let word3 = if destination.i16_0[3] as i32 > source.i16_0[3] as i32 { 0xFFFF } else { 0 };
     let low = word0 | word1 << 16;
     let high = word2 | word3 << 16;
     write_mmx64(r, low, high);
@@ -1996,18 +1976,8 @@ pub unsafe fn instr_660F65_mem(addr: i32, r: i32) {
 pub unsafe fn instr_0F66(source: reg64, r: i32) {
     // pcmpgtd mm, mm/m64
     let destination = read_mmx64s(r);
-    let low = if destination.i32_0[0] > source.i32_0[0] {
-        -1
-    }
-    else {
-        0
-    };
-    let high = if destination.i32_0[1] > source.i32_0[1] {
-        -1
-    }
-    else {
-        0
-    };
+    let low = if destination.i32_0[0] > source.i32_0[0] { -1 } else { 0 };
+    let high = if destination.i32_0[1] > source.i32_0[1] { -1 } else { 0 };
     write_mmx64(r, low, high);
     transition_fpu_to_mmx();
 }
@@ -2024,30 +1994,10 @@ pub unsafe fn instr_660F66(source: reg128, r: i32) {
     let destination = read_xmm128s(r);
     write_xmm128(
         r,
-        if destination.i32_0[0] > source.i32_0[0] {
-            -1
-        }
-        else {
-            0
-        },
-        if destination.i32_0[1] > source.i32_0[1] {
-            -1
-        }
-        else {
-            0
-        },
-        if destination.i32_0[2] > source.i32_0[2] {
-            -1
-        }
-        else {
-            0
-        },
-        if destination.i32_0[3] > source.i32_0[3] {
-            -1
-        }
-        else {
-            0
-        },
+        if destination.i32_0[0] > source.i32_0[0] { -1 } else { 0 },
+        if destination.i32_0[1] > source.i32_0[1] { -1 } else { 0 },
+        if destination.i32_0[2] > source.i32_0[2] { -1 } else { 0 },
+        if destination.i32_0[3] > source.i32_0[3] { -1 } else { 0 },
     );
 }
 #[no_mangle]
@@ -2663,30 +2613,10 @@ pub unsafe fn instr_660F74_mem(addr: i32, r: i32) {
 pub unsafe fn instr_0F75(source: reg64, r: i32) {
     // pcmpeqw mm, mm/m64
     let destination = read_mmx64s(r);
-    let word0 = if destination.u16_0[0] as i32 == source.u16_0[0] as i32 {
-        0xFFFF
-    }
-    else {
-        0
-    };
-    let word1 = if destination.u16_0[1] as i32 == source.u16_0[1] as i32 {
-        0xFFFF
-    }
-    else {
-        0
-    };
-    let word2 = if destination.u16_0[2] as i32 == source.u16_0[2] as i32 {
-        0xFFFF
-    }
-    else {
-        0
-    };
-    let word3 = if destination.u16_0[3] as i32 == source.u16_0[3] as i32 {
-        0xFFFF
-    }
-    else {
-        0
-    };
+    let word0 = if destination.u16_0[0] as i32 == source.u16_0[0] as i32 { 0xFFFF } else { 0 };
+    let word1 = if destination.u16_0[1] as i32 == source.u16_0[1] as i32 { 0xFFFF } else { 0 };
+    let word2 = if destination.u16_0[2] as i32 == source.u16_0[2] as i32 { 0xFFFF } else { 0 };
+    let word3 = if destination.u16_0[3] as i32 == source.u16_0[3] as i32 { 0xFFFF } else { 0 };
     let low = word0 | word1 << 16;
     let high = word2 | word3 << 16;
     write_mmx64(r, low, high);
@@ -2725,18 +2655,8 @@ pub unsafe fn instr_660F75_mem(addr: i32, r: i32) {
 pub unsafe fn instr_0F76(source: reg64, r: i32) {
     // pcmpeqd mm, mm/m64
     let destination = read_mmx64s(r);
-    let low = if destination.u32_0[0] == source.u32_0[0] {
-        -1
-    }
-    else {
-        0
-    };
-    let high = if destination.u32_0[1] == source.u32_0[1] {
-        -1
-    }
-    else {
-        0
-    };
+    let low = if destination.u32_0[0] == source.u32_0[0] { -1 } else { 0 };
+    let high = if destination.u32_0[1] == source.u32_0[1] { -1 } else { 0 };
     write_mmx64(r, low, high);
     transition_fpu_to_mmx();
 }
@@ -2753,30 +2673,10 @@ pub unsafe fn instr_660F76(source: reg128, r: i32) {
     let destination = read_xmm128s(r);
     write_xmm128(
         r,
-        if source.u32_0[0] == destination.u32_0[0] {
-            -1
-        }
-        else {
-            0
-        },
-        if source.u32_0[1] == destination.u32_0[1] {
-            -1
-        }
-        else {
-            0
-        },
-        if source.u32_0[2] == destination.u32_0[2] {
-            -1
-        }
-        else {
-            0
-        },
-        if source.u32_0[3] == destination.u32_0[3] {
-            -1
-        }
-        else {
-            0
-        },
+        if source.u32_0[0] == destination.u32_0[0] { -1 } else { 0 },
+        if source.u32_0[1] == destination.u32_0[1] { -1 } else { 0 },
+        if source.u32_0[2] == destination.u32_0[2] { -1 } else { 0 },
+        if source.u32_0[3] == destination.u32_0[3] { -1 } else { 0 },
     );
 }
 #[no_mangle]
@@ -6186,18 +6086,10 @@ pub unsafe fn instr_660FC2(source: reg128, r: i32, imm8: i32) {
     let destination = read_xmm128s(r);
     let result = reg128 {
         i64_0: [
-            (if sse_comparison(imm8, destination.f64_0[0], source.f64_0[0]) {
-                -1
-            }
-            else {
-                0
-            }) as i64,
-            (if sse_comparison(imm8, destination.f64_0[1], source.f64_0[1]) {
-                -1
-            }
-            else {
-                0
-            }) as i64,
+            (if sse_comparison(imm8, destination.f64_0[0], source.f64_0[0]) { -1 } else { 0 })
+                as i64,
+            (if sse_comparison(imm8, destination.f64_0[1], source.f64_0[1]) { -1 } else { 0 })
+                as i64,
         ],
     };
     write_xmm_reg128(r, result);
@@ -6216,12 +6108,8 @@ pub unsafe fn instr_F20FC2(source: reg64, r: i32, imm8: i32) {
     let destination = read_xmm64s(r);
     let result = reg64 {
         i64_0: [
-            (if sse_comparison(imm8, destination.f64_0[0], source.f64_0[0]) {
-                -1
-            }
-            else {
-                0
-            }) as i64,
+            (if sse_comparison(imm8, destination.f64_0[0], source.f64_0[0]) { -1 } else { 0 })
+                as i64,
         ],
     };
     write_xmm64(r, result);
@@ -6238,12 +6126,7 @@ pub unsafe fn instr_F20FC2_mem(addr: i32, r: i32, imm: i32) {
 pub unsafe fn instr_F30FC2(source: f32, r: i32, imm8: i32) {
     // cmpss xmm, xmm/m32
     let destination = read_xmm_f32(r);
-    let result = if sse_comparison(imm8, destination as f64, source as f64) {
-        -1
-    }
-    else {
-        0
-    };
+    let result = if sse_comparison(imm8, destination as f64, source as f64) { -1 } else { 0 };
     write_xmm32(r, result);
 }
 #[no_mangle]

src/rust/cpu2/misc_instr.rs

@@ -186,12 +186,7 @@ pub unsafe fn push16_ss32_mem(addr: i32) -> OrPageFault<()> { push16_ss32(safe_r
 
 #[no_mangle]
 pub unsafe fn push16(imm16: i32) -> OrPageFault<()> {
-    if *stack_size_32 {
-        push16_ss32(imm16)
-    }
-    else {
-        push16_ss16(imm16)
-    }
+    if *stack_size_32 { push16_ss32(imm16) } else { push16_ss16(imm16) }
 }
 
 #[no_mangle]
@@ -216,21 +211,11 @@ pub unsafe fn push32_ss32_mem(addr: i32) -> OrPageFault<()> { push32_ss32(safe_r
 
 #[no_mangle]
 pub unsafe fn push32(imm32: i32) -> OrPageFault<()> {
-    if *stack_size_32 {
-        push32_ss32(imm32)
-    }
-    else {
-        push32_ss16(imm32)
-    }
+    if *stack_size_32 { push32_ss32(imm32) } else { push32_ss16(imm32) }
 }
 #[no_mangle]
 pub unsafe fn pop16() -> OrPageFault<i32> {
-    if *stack_size_32 {
-        pop16_ss32()
-    }
-    else {
-        pop16_ss16()
-    }
+    if *stack_size_32 { pop16_ss32() } else { pop16_ss16() }
 }
 #[no_mangle]
 pub unsafe fn pop16_ss16() -> OrPageFault<i32> {
@@ -248,12 +233,7 @@ pub unsafe fn pop16_ss32() -> OrPageFault<i32> {
 }
 #[no_mangle]
 pub unsafe fn pop32s() -> OrPageFault<i32> {
-    if *stack_size_32 {
-        pop32s_ss32()
-    }
-    else {
-        pop32s_ss16()
-    }
+    if *stack_size_32 { pop32s_ss32() } else { pop32s_ss16() }
 }
 #[no_mangle]
 pub unsafe fn pop32s_ss16() -> OrPageFault<i32> {

src/rust/cpu2/modrm.rs

@@ -97,13 +97,7 @@ pub unsafe fn resolve_modrm32_(modrm_byte: i32) -> OrPageFault<i32> {
             resolve_sib(false)?
         }
         else {
-            resolve_sib(true)?
-                + if modrm_byte < 128 {
-                    read_imm8s()?
-                }
-                else {
-                    read_imm32s()?
-                }
+            resolve_sib(true)? + if modrm_byte < 128 { read_imm8s()? } else { read_imm32s()? }
         }
     }
     else if r as i32 == 5 {
@@ -113,12 +107,7 @@ pub unsafe fn resolve_modrm32_(modrm_byte: i32) -> OrPageFault<i32> {
         else {
             get_seg_prefix_ss(
                 *reg32.offset(EBP as isize)
-                    + if modrm_byte < 128 {
-                        read_imm8s()?
-                    }
-                    else {
-                        read_imm32s()?
-                    },
+                    + if modrm_byte < 128 { read_imm8s()? } else { read_imm32s()? },
             )
         }
     }
@@ -128,12 +117,7 @@ pub unsafe fn resolve_modrm32_(modrm_byte: i32) -> OrPageFault<i32> {
     else {
         get_seg_prefix_ds(
             *reg32.offset(r as isize)
-                + if modrm_byte < 128 {
-                    read_imm8s()?
-                }
-                else {
-                    read_imm32s()?
-                },
+                + if modrm_byte < 128 { read_imm8s()? } else { read_imm32s()? },
         )
     })
 }

src/rust/cpu_context.rs

@@ -25,12 +25,7 @@ impl CpuContext {
     }
     #[allow(unused)]
     pub fn advance_moffs(&mut self) {
-        if self.asize_32() {
-            self.advance32()
-        }
-        else {
-            self.advance16()
-        }
+        if self.asize_32() { self.advance32() } else { self.advance16() }
     }
 
     pub fn read_imm8(&mut self) -> u8 {
@@ -54,12 +49,7 @@ impl CpuContext {
         v
     }
     pub fn read_moffs(&mut self) -> u32 {
-        if self.asize_32() {
-            self.read_imm32()
-        }
-        else {
-            self.read_imm16() as u32
-        }
+        if self.asize_32() { self.read_imm32() } else { self.read_imm16() as u32 }
     }
 
     pub fn cpl3(&self) -> bool { self.state_flags.cpl3() }

src/rust/jit.rs

@@ -136,12 +136,7 @@ mod jit_cache_array {
 
     pub fn get_page_index(page: Page) -> Option<u32> {
         let index = unsafe { *page_first_entry.offset(page.to_u32() as isize) };
-        if index == NO_NEXT_ENTRY {
-            None
-        }
-        else {
-            Some(index)
-        }
+        if index == NO_NEXT_ENTRY { None } else { Some(index) }
     }
 
     pub fn set_page_index(page: Page, index: Option<u32>) {
@@ -154,7 +149,11 @@ mod jit_cache_array {
         unsafe { &mut *jit_cache_array.offset(i as isize) }
     }
 
-    fn set(i: u32, entry: Entry) { unsafe { *jit_cache_array.offset(i as isize) = entry }; }
+    fn set(i: u32, entry: Entry) {
+        unsafe {
+            *jit_cache_array.offset(i as isize) = entry
+        };
+    }
 
     pub fn insert(index: u32, mut entry: Entry) {
         let page = Page::page_of(entry.start_addr);
@@ -1264,8 +1263,14 @@ fn jit_generate_basic_block(ctx: &mut JitContext, block: &BasicBlock) {
         }
 
         if was_block_boundary || is_near_end_of_page(end_addr) || end_addr > stop_addr {
-            dbg_log!("Overlapping basic blocks start={:x} expected_end={:x} end={:x} was_block_boundary={} near_end_of_page={}",
-                     start_addr, stop_addr, end_addr, was_block_boundary, is_near_end_of_page(end_addr));
+            dbg_log!(
+                "Overlapping basic blocks start={:x} expected_end={:x} end={:x} was_block_boundary={} near_end_of_page={}",
+                start_addr,
+                stop_addr,
+                end_addr,
+                was_block_boundary,
+                is_near_end_of_page(end_addr)
+            );
             dbg_assert!(false);
             break;
         }
@@ -1510,12 +1515,8 @@ pub fn check_missed_entry_points(phys_address: u32, state_flags: CachedStateFlag
             let last_jump_type = unsafe { ::cpu2::cpu::debug_last_jump.name() };
             let last_jump_addr =
                 unsafe { ::cpu2::cpu::debug_last_jump.phys_address() }.unwrap_or(0);
-            let last_jump_opcode = if last_jump_addr != 0 {
-                cpu::read32(last_jump_addr)
-            }
-            else {
-                0
-            };
+            let last_jump_opcode =
+                if last_jump_addr != 0 { cpu::read32(last_jump_addr) } else { 0 };
 
             let opcode = cpu::read32(phys_address);
             dbg_log!(

src/rust/modrm.rs

@@ -10,12 +10,7 @@ use regs::{EAX, EBP, EBX, ECX, EDI, EDX, ESI, ESP};
 use wasmgen::wasm_util::WasmBuf;
 
 pub fn skip(ctx: &mut CpuContext, modrm_byte: u8) {
-    if ctx.asize_32() {
-        skip32(ctx, modrm_byte)
-    }
-    else {
-        skip16(ctx, modrm_byte)
-    }
+    if ctx.asize_32() { skip32(ctx, modrm_byte) } else { skip16(ctx, modrm_byte) }
 }
 
 fn skip16(ctx: &mut CpuContext, modrm_byte: u8) {
@@ -70,12 +65,7 @@ fn skip32(ctx: &mut CpuContext, modrm_byte: u8) {
 }
 
 pub fn gen(ctx: &mut JitContext, modrm_byte: u8) {
-    if ctx.cpu.asize_32() {
-        gen32(ctx, modrm_byte)
-    }
-    else {
-        gen16(ctx, modrm_byte)
-    }
+    if ctx.cpu.asize_32() { gen32(ctx, modrm_byte) } else { gen16(ctx, modrm_byte) }
 }
 
 enum Imm16 {
@@ -348,12 +338,7 @@ fn can_optimize_get_seg(ctx: &mut JitContext, segment: u32) -> bool {
 
 pub fn jit_add_seg_offset(ctx: &mut JitContext, default_segment: u32) {
     let prefix = ctx.cpu.prefixes & PREFIX_MASK_SEGMENT;
-    let seg = if prefix != 0 {
-        prefix - 1
-    }
-    else {
-        default_segment
-    };
+    let seg = if prefix != 0 { prefix - 1 } else { default_segment };
 
     if can_optimize_get_seg(ctx, seg) || prefix == SEG_PREFIX_ZERO {
         return;

src/rust/wasmgen/module_init.rs

@@ -1,4 +1,4 @@
-use util::{SafeToU16, SafeToU8};
+use util::{SafeToU8, SafeToU16};
 use wasmgen::wasm_opcodes as op;
 use wasmgen::wasm_util::WasmBuf;