 Fabian
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37c3d1f83c
Generate direct control flow, using wasm blocks and loops
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4 лет назад |
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Fabian
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9853bdb868
Merge 16-bit and 32-bit 0f tables (saves 200kB on v86.wasm)
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4 лет назад |
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Fabian
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11dfeb1ee7
Fix minor descrepancy between analyser and jit
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4 лет назад |
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Fabian
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a26eb43719
Fix: Inhibit interrupts for one instruction after STI (fixes ReactOS)
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4 лет назад |
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Fabian
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acb8ad5423
Avoid console.assert (doesn't throw)
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4 лет назад |
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Fabian
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a73988a817
Make loop, loopz, loopnz and jcxz custom generated
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4 лет назад |
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Fabian
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c207400922
Fix Rust warnings
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4 лет назад |
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Fabian
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4bb3c14e57
Comment
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4 лет назад |
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Fabian
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0263764a5c
Remove unused unguarded_register property during analysis
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4 лет назад |
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Fabian
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a8308b988d
Store registers in locals
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6 лет назад |
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Fabian
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440b67eda5
Support for gen_safe_write128 and code generation for MOVAPS/MOVDQA (0F29/660F7F)
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6 лет назад |
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Fabian
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ec059a9f27
Codegen for fpu instructions (D8 group)
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6 лет назад |
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Fabian
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a5cbf53da5
Fix jit in presence of new page fault handling
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6 лет назад |
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Fabian
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1253b72906
Generate prefix handling for string instructions
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6 лет назад |
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Fabian
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3a8d644d75
Port jit to Rust
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6 лет назад |
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Fabian
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2609041e64
Don't fail when invalid instructions are analyzed/jitted
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6 лет назад |
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Fabian
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cba5491fc4
Multiple jit block entry points
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6 лет назад |
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Fabian
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ded423b1c5
x86 table: Add remaining 0f instructions, simplify gen scripts
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6 лет назад |
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Fabian
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a9b5f153a8
Move around and add some assertions
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6 лет назад |
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Fabian
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65bf2e350d
Don't generate duplicate flags checks
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6 лет назад |
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Fabian
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f8349af093
New block analysis, generation of state machine with multiple basic blocks
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6 лет назад |
