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test-i386.c 92 KB

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  1. /*
  2. * x86 CPU test
  3. *
  4. * Copyright (c) 2003 Fabrice Bellard
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, see <http://www.gnu.org/licenses/>.
  18. */
  19. #define _GNU_SOURCE
  20. #include "compiler.h"
  21. #include <assert.h>
  22. #include <stdlib.h>
  23. #include <stdio.h>
  24. #include <string.h>
  25. #include <inttypes.h>
  26. #include <math.h>
  27. #include <signal.h>
  28. #include <setjmp.h>
  29. #include <errno.h>
  30. #include <sys/ucontext.h>
  31. #include <sys/mman.h>
  32. #include <sys/user.h>
  33. #if !defined(__x86_64__)
  34. #define TEST_VM86
  35. #define TEST_SEGS
  36. #endif
  37. //#define LINUX_VM86_IOPL_FIX
  38. //#define TEST_P4_FLAGS
  39. //#ifdef __SSE__
  40. #if 1
  41. #define TEST_SSE
  42. #define TEST_CMOV 1
  43. #define TEST_FCOMI 1
  44. #else
  45. #undef TEST_SSE
  46. #define TEST_CMOV 1
  47. #define TEST_FCOMI 1
  48. #endif
  49. #if defined(__x86_64__)
  50. #define FMT64X "%016lx"
  51. #define FMTLX "%016lx"
  52. #define X86_64_ONLY(x) x
  53. #else
  54. #define FMT64X "%016" PRIx64
  55. #define FMTLX "%08lx"
  56. #define X86_64_ONLY(x)
  57. #endif
  58. #ifdef TEST_VM86
  59. #include <asm/vm86.h>
  60. #endif
  61. #define xglue(x, y) x ## y
  62. #define glue(x, y) xglue(x, y)
  63. #define stringify(s) tostring(s)
  64. #define tostring(s) #s
  65. #define UNUSED(s) (void)(s)
  66. #define CC_C 0x0001
  67. #define CC_P 0x0004
  68. #define CC_A 0x0010
  69. #define CC_Z 0x0040
  70. #define CC_S 0x0080
  71. #define CC_O 0x0800
  72. #define __init_call __attribute__ ((unused,__section__ ("initcall")))
  73. #define CC_MASK (CC_C | CC_P | CC_Z | CC_S | CC_O | CC_A)
  74. #if defined(__x86_64__)
  75. static inline long i2l(long v)
  76. {
  77. return v | ((v ^ 0xabcd) << 32);
  78. }
  79. #else
  80. static inline long i2l(long v)
  81. {
  82. return v;
  83. }
  84. #endif
  85. #define OP add
  86. #include "test-i386.h"
  87. #define OP sub
  88. #include "test-i386.h"
  89. #define OP xor
  90. #include "test-i386.h"
  91. #define OP and
  92. #include "test-i386.h"
  93. #define OP or
  94. #include "test-i386.h"
  95. #define OP cmp
  96. #include "test-i386.h"
  97. #define OP adc
  98. #define OP_CC
  99. #include "test-i386.h"
  100. #define OP sbb
  101. #define OP_CC
  102. #include "test-i386.h"
  103. #define OP inc
  104. #define OP_CC
  105. #define OP1
  106. #include "test-i386.h"
  107. #define OP dec
  108. #define OP_CC
  109. #define OP1
  110. #include "test-i386.h"
  111. #define OP neg
  112. #define OP_CC
  113. #define OP1
  114. #include "test-i386.h"
  115. #define OP not
  116. #define OP_CC
  117. #define OP1
  118. #include "test-i386.h"
  119. #undef CC_MASK
  120. #define CC_MASK (CC_C | CC_P | CC_Z | CC_S | CC_O)
  121. #define OP shl
  122. #include "test-i386-shift.h"
  123. #define OP shr
  124. #include "test-i386-shift.h"
  125. #define OP sar
  126. #include "test-i386-shift.h"
  127. #define OP rol
  128. #include "test-i386-shift.h"
  129. #define OP ror
  130. #include "test-i386-shift.h"
  131. #define OP rcr
  132. #define OP_CC
  133. #include "test-i386-shift.h"
  134. #define OP rcl
  135. #define OP_CC
  136. #include "test-i386-shift.h"
  137. #define OP shld
  138. #define OP_SHIFTD
  139. #define OP_NOBYTE
  140. #include "test-i386-shift.h"
  141. #define OP shrd
  142. #define OP_SHIFTD
  143. #define OP_NOBYTE
  144. #include "test-i386-shift.h"
  145. /* XXX: should be more precise ? */
  146. #undef CC_MASK
  147. #define CC_MASK (CC_C)
  148. #define OP bt
  149. #define OP_NOBYTE
  150. #include "test-i386-shift.h"
  151. #define OP bts
  152. #define OP_NOBYTE
  153. #include "test-i386-shift.h"
  154. #define OP btr
  155. #define OP_NOBYTE
  156. #include "test-i386-shift.h"
  157. #define OP btc
  158. #define OP_NOBYTE
  159. #include "test-i386-shift.h"
  160. /* lea test (modrm support) */
  161. #define TEST_LEAQ(STR)\
  162. {\
  163. asm("lea " STR ", %0"\
  164. : "=r" (res)\
  165. : "a" (eax), "b" (ebx), "c" (ecx), "d" (edx), "S" (esi), "D" (edi));\
  166. printf("lea %s = " FMTLX "\n", STR, res);\
  167. }
  168. #define TEST_LEA(STR)\
  169. {\
  170. asm("lea " STR ", %0"\
  171. : "=r" (res)\
  172. : "a" (eax), "b" (ebx), "c" (ecx), "d" (edx), "S" (esi), "D" (edi));\
  173. printf("lea %s = " FMTLX "\n", STR, res);\
  174. }
  175. #define TEST_LEA16(STR)\
  176. {\
  177. asm(".code16 ; .byte 0x67 ; leal " STR ", %0 ; .code32"\
  178. : "=r" (res)\
  179. : "a" (eax), "b" (ebx), "c" (ecx), "d" (edx), "S" (esi), "D" (edi));\
  180. printf("lea %s = %08lx\n", STR, res);\
  181. }
  182. void test_lea(void)
  183. {
  184. long eax, ebx, ecx, edx, esi, edi, res;
  185. eax = i2l(0x0001);
  186. ebx = i2l(0x0002);
  187. ecx = i2l(0x0004);
  188. edx = i2l(0x0008);
  189. esi = i2l(0x0010);
  190. edi = i2l(0x0020);
  191. TEST_LEA("0x4000");
  192. TEST_LEA("(%%eax)");
  193. TEST_LEA("(%%ebx)");
  194. TEST_LEA("(%%ecx)");
  195. TEST_LEA("(%%edx)");
  196. TEST_LEA("(%%esi)");
  197. TEST_LEA("(%%edi)");
  198. TEST_LEA("0x40(%%eax)");
  199. TEST_LEA("0x40(%%ebx)");
  200. TEST_LEA("0x40(%%ecx)");
  201. TEST_LEA("0x40(%%edx)");
  202. TEST_LEA("0x40(%%esi)");
  203. TEST_LEA("0x40(%%edi)");
  204. TEST_LEA("0x4000(%%eax)");
  205. TEST_LEA("0x4000(%%ebx)");
  206. TEST_LEA("0x4000(%%ecx)");
  207. TEST_LEA("0x4000(%%edx)");
  208. TEST_LEA("0x4000(%%esi)");
  209. TEST_LEA("0x4000(%%edi)");
  210. TEST_LEA("(%%eax, %%ecx)");
  211. TEST_LEA("(%%ebx, %%edx)");
  212. TEST_LEA("(%%ecx, %%ecx)");
  213. TEST_LEA("(%%edx, %%ecx)");
  214. TEST_LEA("(%%esi, %%ecx)");
  215. TEST_LEA("(%%edi, %%ecx)");
  216. TEST_LEA("0x40(%%eax, %%ecx)");
  217. TEST_LEA("0x4000(%%ebx, %%edx)");
  218. TEST_LEA("(%%ecx, %%ecx, 2)");
  219. TEST_LEA("(%%edx, %%ecx, 4)");
  220. TEST_LEA("(%%esi, %%ecx, 8)");
  221. TEST_LEA("(,%%eax, 2)");
  222. TEST_LEA("(,%%ebx, 4)");
  223. TEST_LEA("(,%%ecx, 8)");
  224. TEST_LEA("0x40(,%%eax, 2)");
  225. TEST_LEA("0x40(,%%ebx, 4)");
  226. TEST_LEA("0x40(,%%ecx, 8)");
  227. TEST_LEA("-10(%%ecx, %%ecx, 2)");
  228. TEST_LEA("-10(%%edx, %%ecx, 4)");
  229. TEST_LEA("-10(%%esi, %%ecx, 8)");
  230. TEST_LEA("0x4000(%%ecx, %%ecx, 2)");
  231. TEST_LEA("0x4000(%%edx, %%ecx, 4)");
  232. TEST_LEA("0x4000(%%esi, %%ecx, 8)");
  233. #if defined(__x86_64__)
  234. TEST_LEAQ("0x4000");
  235. TEST_LEAQ("0x4000(%%rip)");
  236. TEST_LEAQ("(%%rax)");
  237. TEST_LEAQ("(%%rbx)");
  238. TEST_LEAQ("(%%rcx)");
  239. TEST_LEAQ("(%%rdx)");
  240. TEST_LEAQ("(%%rsi)");
  241. TEST_LEAQ("(%%rdi)");
  242. TEST_LEAQ("0x40(%%rax)");
  243. TEST_LEAQ("0x40(%%rbx)");
  244. TEST_LEAQ("0x40(%%rcx)");
  245. TEST_LEAQ("0x40(%%rdx)");
  246. TEST_LEAQ("0x40(%%rsi)");
  247. TEST_LEAQ("0x40(%%rdi)");
  248. TEST_LEAQ("0x4000(%%rax)");
  249. TEST_LEAQ("0x4000(%%rbx)");
  250. TEST_LEAQ("0x4000(%%rcx)");
  251. TEST_LEAQ("0x4000(%%rdx)");
  252. TEST_LEAQ("0x4000(%%rsi)");
  253. TEST_LEAQ("0x4000(%%rdi)");
  254. TEST_LEAQ("(%%rax, %%rcx)");
  255. TEST_LEAQ("(%%rbx, %%rdx)");
  256. TEST_LEAQ("(%%rcx, %%rcx)");
  257. TEST_LEAQ("(%%rdx, %%rcx)");
  258. TEST_LEAQ("(%%rsi, %%rcx)");
  259. TEST_LEAQ("(%%rdi, %%rcx)");
  260. TEST_LEAQ("0x40(%%rax, %%rcx)");
  261. TEST_LEAQ("0x4000(%%rbx, %%rdx)");
  262. TEST_LEAQ("(%%rcx, %%rcx, 2)");
  263. TEST_LEAQ("(%%rdx, %%rcx, 4)");
  264. TEST_LEAQ("(%%rsi, %%rcx, 8)");
  265. TEST_LEAQ("(,%%rax, 2)");
  266. TEST_LEAQ("(,%%rbx, 4)");
  267. TEST_LEAQ("(,%%rcx, 8)");
  268. TEST_LEAQ("0x40(,%%rax, 2)");
  269. TEST_LEAQ("0x40(,%%rbx, 4)");
  270. TEST_LEAQ("0x40(,%%rcx, 8)");
  271. TEST_LEAQ("-10(%%rcx, %%rcx, 2)");
  272. TEST_LEAQ("-10(%%rdx, %%rcx, 4)");
  273. TEST_LEAQ("-10(%%rsi, %%rcx, 8)");
  274. TEST_LEAQ("0x4000(%%rcx, %%rcx, 2)");
  275. TEST_LEAQ("0x4000(%%rdx, %%rcx, 4)");
  276. TEST_LEAQ("0x4000(%%rsi, %%rcx, 8)");
  277. #else
  278. /* limited 16 bit addressing test */
  279. TEST_LEA16("0x4000");
  280. TEST_LEA16("(%%bx)");
  281. TEST_LEA16("(%%si)");
  282. TEST_LEA16("(%%di)");
  283. TEST_LEA16("0x40(%%bx)");
  284. TEST_LEA16("0x40(%%si)");
  285. TEST_LEA16("0x40(%%di)");
  286. TEST_LEA16("0x4000(%%bx)");
  287. TEST_LEA16("0x4000(%%si)");
  288. TEST_LEA16("(%%bx,%%si)");
  289. TEST_LEA16("(%%bx,%%di)");
  290. TEST_LEA16("0x40(%%bx,%%si)");
  291. TEST_LEA16("0x40(%%bx,%%di)");
  292. TEST_LEA16("0x4000(%%bx,%%si)");
  293. TEST_LEA16("0x4000(%%bx,%%di)");
  294. #endif
  295. }
  296. #define TEST_JCC(JCC, v1, v2)\
  297. {\
  298. int res;\
  299. asm("movl $1, %0\n\t"\
  300. "cmpl %2, %1\n\t"\
  301. "j" JCC " 1f\n\t"\
  302. "movl $0, %0\n\t"\
  303. "1:\n\t"\
  304. : "=r" (res)\
  305. : "r" (v1), "r" (v2));\
  306. printf("%-10s %d\n", "j" JCC, res);\
  307. \
  308. asm("movl $0, %0\n\t"\
  309. "cmpl %2, %1\n\t"\
  310. "set" JCC " %b0\n\t"\
  311. : "=r" (res)\
  312. : "r" (v1), "r" (v2));\
  313. printf("%-10s %d\n", "set" JCC, res);\
  314. if (TEST_CMOV) {\
  315. long val = i2l(1);\
  316. long res = i2l(0x12345678);\
  317. X86_64_ONLY(\
  318. asm("cmpl %2, %1\n\t"\
  319. "cmov" JCC "q %3, %0\n\t"\
  320. : "=r" (res)\
  321. : "r" (v1), "r" (v2), "m" (val), "0" (res));\
  322. printf("%-10s R=" FMTLX "\n", "cmov" JCC "q", res);)\
  323. asm("cmpl %2, %1\n\t"\
  324. "cmov" JCC "l %k3, %k0\n\t"\
  325. : "=r" (res)\
  326. : "r" (v1), "r" (v2), "m" (val), "0" (res));\
  327. printf("%-10s R=" FMTLX "\n", "cmov" JCC "l", res);\
  328. asm("cmpl %2, %1\n\t"\
  329. "cmov" JCC "w %w3, %w0\n\t"\
  330. : "=r" (res)\
  331. : "r" (v1), "r" (v2), "r" (1), "0" (res));\
  332. printf("%-10s R=" FMTLX "\n", "cmov" JCC "w", res);\
  333. } \
  334. }
  335. /* various jump tests */
  336. void test_jcc(void)
  337. {
  338. TEST_JCC("ne", 1, 1);
  339. TEST_JCC("ne", 1, 0);
  340. TEST_JCC("e", 1, 1);
  341. TEST_JCC("e", 1, 0);
  342. TEST_JCC("l", 1, 1);
  343. TEST_JCC("l", 1, 0);
  344. TEST_JCC("l", 1, -1);
  345. TEST_JCC("le", 1, 1);
  346. TEST_JCC("le", 1, 0);
  347. TEST_JCC("le", 1, -1);
  348. TEST_JCC("ge", 1, 1);
  349. TEST_JCC("ge", 1, 0);
  350. TEST_JCC("ge", -1, 1);
  351. TEST_JCC("g", 1, 1);
  352. TEST_JCC("g", 1, 0);
  353. TEST_JCC("g", 1, -1);
  354. TEST_JCC("b", 1, 1);
  355. TEST_JCC("b", 1, 0);
  356. TEST_JCC("b", 1, -1);
  357. TEST_JCC("be", 1, 1);
  358. TEST_JCC("be", 1, 0);
  359. TEST_JCC("be", 1, -1);
  360. TEST_JCC("ae", 1, 1);
  361. TEST_JCC("ae", 1, 0);
  362. TEST_JCC("ae", 1, -1);
  363. TEST_JCC("a", 1, 1);
  364. TEST_JCC("a", 1, 0);
  365. TEST_JCC("a", 1, -1);
  366. TEST_JCC("p", 1, 1);
  367. TEST_JCC("p", 1, 0);
  368. TEST_JCC("np", 1, 1);
  369. TEST_JCC("np", 1, 0);
  370. TEST_JCC("o", 0x7fffffff, 0);
  371. TEST_JCC("o", 0x7fffffff, -1);
  372. TEST_JCC("no", 0x7fffffff, 0);
  373. TEST_JCC("no", 0x7fffffff, -1);
  374. TEST_JCC("s", 0, 1);
  375. TEST_JCC("s", 0, -1);
  376. TEST_JCC("s", 0, 0);
  377. TEST_JCC("ns", 0, 1);
  378. TEST_JCC("ns", 0, -1);
  379. TEST_JCC("ns", 0, 0);
  380. }
  381. #define TEST_LOOP(insn) \
  382. {\
  383. for(i = 0; i < sizeof(ecx_vals) / sizeof(long); i++) {\
  384. ecx = ecx_vals[i];\
  385. for(zf = 0; zf < 2; zf++) {\
  386. asm("test %2, %2\n\t"\
  387. "movl $1, %0\n\t"\
  388. insn " 1f\n\t" \
  389. "movl $0, %0\n\t"\
  390. "1:\n\t"\
  391. : "=a" (res)\
  392. : "c" (ecx), "b" (!zf)); \
  393. printf("%-10s ECX=" FMTLX " ZF=%ld r=%d\n", insn, ecx, zf, res); \
  394. }\
  395. }\
  396. }
  397. void test_loop(void)
  398. {
  399. long ecx, zf;
  400. const long ecx_vals[] = {
  401. 0,
  402. 1,
  403. 0x10000,
  404. 0x10001,
  405. #if defined(__x86_64__)
  406. 0x100000000L,
  407. 0x100000001L,
  408. #endif
  409. };
  410. int i, res;
  411. #if !defined(__x86_64__)
  412. TEST_LOOP("jcxz");
  413. TEST_LOOP("loopw");
  414. TEST_LOOP("loopzw");
  415. TEST_LOOP("loopnzw");
  416. #endif
  417. TEST_LOOP("jecxz");
  418. TEST_LOOP("loopl");
  419. TEST_LOOP("loopzl");
  420. TEST_LOOP("loopnzl");
  421. }
  422. #undef CC_MASK
  423. #ifdef TEST_P4_FLAGS
  424. #define CC_MASK (CC_C | CC_P | CC_Z | CC_S | CC_O | CC_A)
  425. #else
  426. #define CC_MASK (CC_O | CC_C)
  427. #endif
  428. #define OP mul
  429. #include "test-i386-muldiv.h"
  430. #define OP imul
  431. #include "test-i386-muldiv.h"
  432. void test_imulw2(long op0, long op1)
  433. {
  434. long res, s1, s0, flags;
  435. s0 = op0;
  436. s1 = op1;
  437. res = s0;
  438. flags = 0;
  439. asm volatile ("push %4\n\t"
  440. "popf\n\t"
  441. "imulw %w2, %w0\n\t"
  442. "pushf\n\t"
  443. "pop %1\n\t"
  444. : "=q" (res), "=g" (flags)
  445. : "q" (s1), "0" (res), "1" (flags));
  446. printf("%-10s A=" FMTLX " B=" FMTLX " R=" FMTLX " CC=%04lx\n",
  447. "imulw", s0, s1, res, flags & CC_MASK);
  448. }
  449. void test_imull2(long op0, long op1)
  450. {
  451. long res, s1, s0, flags;
  452. s0 = op0;
  453. s1 = op1;
  454. res = s0;
  455. flags = 0;
  456. asm volatile ("push %4\n\t"
  457. "popf\n\t"
  458. "imull %k2, %k0\n\t"
  459. "pushf\n\t"
  460. "pop %1\n\t"
  461. : "=q" (res), "=g" (flags)
  462. : "q" (s1), "0" (res), "1" (flags));
  463. printf("%-10s A=" FMTLX " B=" FMTLX " R=" FMTLX " CC=%04lx\n",
  464. "imull", s0, s1, res, flags & CC_MASK);
  465. }
  466. #if defined(__x86_64__)
  467. void test_imulq2(long op0, long op1)
  468. {
  469. long res, s1, s0, flags;
  470. s0 = op0;
  471. s1 = op1;
  472. res = s0;
  473. flags = 0;
  474. asm volatile ("push %4\n\t"
  475. "popf\n\t"
  476. "imulq %2, %0\n\t"
  477. "pushf\n\t"
  478. "pop %1\n\t"
  479. : "=q" (res), "=g" (flags)
  480. : "q" (s1), "0" (res), "1" (flags));
  481. printf("%-10s A=" FMTLX " B=" FMTLX " R=" FMTLX " CC=%04lx\n",
  482. "imulq", s0, s1, res, flags & CC_MASK);
  483. }
  484. #endif
  485. #define TEST_IMUL_IM(size, rsize, op0, op1)\
  486. {\
  487. long res, flags, s1;\
  488. flags = 0;\
  489. res = 0;\
  490. s1 = op1;\
  491. asm volatile ("push %3\n\t"\
  492. "popf\n\t"\
  493. "imul" size " $" #op0 ", %" rsize "2, %" rsize "0\n\t" \
  494. "pushf\n\t"\
  495. "pop %1\n\t"\
  496. : "=r" (res), "=g" (flags)\
  497. : "r" (s1), "1" (flags), "0" (res));\
  498. printf("%-10s A=" FMTLX " B=" FMTLX " R=" FMTLX " CC=%04lx\n",\
  499. "imul" size " im", (long)op0, (long)op1, res, flags & CC_MASK);\
  500. }
  501. #undef CC_MASK
  502. #define CC_MASK (0)
  503. #define OP div
  504. #include "test-i386-muldiv.h"
  505. #define OP idiv
  506. #include "test-i386-muldiv.h"
  507. void test_mul(void)
  508. {
  509. test_imulb(0x1234561d, 4);
  510. test_imulb(3, -4);
  511. test_imulb(0x80, 0x80);
  512. test_imulb(0x10, 0x10);
  513. test_imulw(0, 0x1234001d, 45);
  514. test_imulw(0, 23, -45);
  515. test_imulw(0, 0x8000, 0x8000);
  516. test_imulw(0, 0x100, 0x100);
  517. test_imull(0, 0x1234001d, 45);
  518. test_imull(0, 23, -45);
  519. test_imull(0, 0x80000000, 0x80000000);
  520. test_imull(0, 0x10000, 0x10000);
  521. test_mulb(0x1234561d, 4);
  522. test_mulb(3, -4);
  523. test_mulb(0x80, 0x80);
  524. test_mulb(0x10, 0x10);
  525. test_mulw(0, 0x1234001d, 45);
  526. test_mulw(0, 23, -45);
  527. test_mulw(0, 0x8000, 0x8000);
  528. test_mulw(0, 0x100, 0x100);
  529. test_mull(0, 0x1234001d, 45);
  530. test_mull(0, 23, -45);
  531. test_mull(0, 0x80000000, 0x80000000);
  532. test_mull(0, 0x10000, 0x10000);
  533. test_mull(0, 0xffffffff, 0xffffffff);
  534. test_mull(0, 0xfffffffe, 0xffffffff);
  535. test_mull(0, 0xffffffff, 0xfffffffe);
  536. test_mull(0, 0xffffffff, 0);
  537. test_mull(0, 0xffffffff, 1);
  538. test_mull(0, 0xffffffff, 2);
  539. test_mull(0, 0xffffffff, 3);
  540. test_mull(0, 0, 0xffffffff);
  541. test_mull(0, 1, 0xffffffff);
  542. test_mull(0, 2, 0xffffffff);
  543. test_mull(0, 3, 0xffffffff);
  544. test_imulw2(0x1234001d, 45);
  545. test_imulw2(23, -45);
  546. test_imulw2(0x8000, 0x8000);
  547. test_imulw2(0x100, 0x100);
  548. test_imull2(0x1234001d, 45);
  549. test_imull2(23, -45);
  550. test_imull2(0x80000000, 0x80000000);
  551. test_imull2(0x10000, 0x10000);
  552. TEST_IMUL_IM("w", "w", 45, 0x1234);
  553. TEST_IMUL_IM("w", "w", -45, 23);
  554. TEST_IMUL_IM("w", "w", 0x8000, 0x80000000);
  555. TEST_IMUL_IM("w", "w", 0x7fff, 0x1000);
  556. TEST_IMUL_IM("l", "k", 45, 0x1234);
  557. TEST_IMUL_IM("l", "k", -45, 23);
  558. TEST_IMUL_IM("l", "k", 0x8000, 0x80000000);
  559. TEST_IMUL_IM("l", "k", 0x7fff, 0x1000);
  560. test_idivb(0x12341678, 0x127e);
  561. test_idivb(0x43210123, -5);
  562. test_idivb(0x12340004, -1);
  563. test_idivb(-20, 3);
  564. test_idivb(20, -3);
  565. test_idivb(-20, -3);
  566. test_idivw(0, 0x12345678, 12347);
  567. test_idivw(0, -23223, -45);
  568. test_idivw(0, 0x12348000, -1);
  569. test_idivw(0x12343, 0x12345678, 0x81238567);
  570. test_idivw(-20, 0, 300);
  571. test_idivw(20, 0, -300);
  572. test_idivw(-20, 0, -300);
  573. test_idivl(0, 0x12345678, 12347);
  574. test_idivl(0, -233223, -45);
  575. test_idivl(0, 0x80000000, -1);
  576. test_idivl(0x12343, 0x12345678, 0x81234567);
  577. test_divb(0x12341678, 0x127e);
  578. test_divb(0x43210123, -5);
  579. test_divb(0x12340004, -1);
  580. test_divw(0, 0x12345678, 12347);
  581. test_divw(0, -23223, -45);
  582. test_divw(0, 0x12348000, -1);
  583. test_divw(0x12343, 0x12345678, 0x81238567);
  584. test_divl(0, 0x12345678, 12347);
  585. test_divl(0, -233223, -45);
  586. test_divl(0, 0x80000000, -1);
  587. test_divl(0x12343, 0x12345678, 0x81234567);
  588. test_divl(0xfffffffe, 0xffffffff, 0xffffffff);
  589. test_divl(0xffffffe, 0xffffffff, 0xfffffff);
  590. test_divl(0xfffffe, 0xffffffff, 0xffffff);
  591. test_divl(0xffffe, 0xffffffff, 0xfffff);
  592. test_divl(0xfffe, 0xffffffff, 0xffff);
  593. test_divl(0xffe, 0xffffffff, 0xfff);
  594. test_divl(0xfe, 0xffffffff, 0xff);
  595. test_divl(0xe, 0xffffffff, 0xf);
  596. test_divl(0x7ffffffe, 0xffffffff, 0x7fffffff);
  597. test_divl(0x7fffffe, 0xffffffff, 0x7ffffff);
  598. test_divl(0x7ffffe, 0xffffffff, 0x7fffff);
  599. test_divl(0x7fffe, 0xffffffff, 0x7ffff);
  600. test_divl(0x7ffe, 0xffffffff, 0x7fff);
  601. test_divl(0x7fe, 0xffffffff, 0x7ff);
  602. test_divl(0x7e, 0xffffffff, 0x7f);
  603. test_divl(0x3ffffffe, 0xffffffff, 0x3fffffff);
  604. test_divl(0x3fffffe, 0xffffffff, 0x3ffffff);
  605. test_divl(0x3ffffe, 0xffffffff, 0x3fffff);
  606. test_divl(0x3fffe, 0xffffffff, 0x3ffff);
  607. test_divl(0x3ffe, 0xffffffff, 0x3fff);
  608. test_divl(0x3fe, 0xffffffff, 0x3ff);
  609. test_divl(0x3e, 0xffffffff, 0x3f);
  610. test_divl(0x1ffffffe, 0xffffffff, 0x1fffffff);
  611. test_divl(0x1fffffe, 0xffffffff, 0x1ffffff);
  612. test_divl(0x1ffffe, 0xffffffff, 0x1fffff);
  613. test_divl(0x1fffe, 0xffffffff, 0x1ffff);
  614. test_divl(0x1ffe, 0xffffffff, 0x1fff);
  615. test_divl(0x1fe, 0xffffffff, 0x1ff);
  616. test_divl(0x1e, 0xffffffff, 0x1f);
  617. int i;
  618. for(i = 0; i < 16; i++)
  619. {
  620. test_divl(0, 0xfffffffe, i + 1);
  621. test_divl(0, 0xffffffff, i + 1);
  622. test_divl(1, 0xfffffffe, i + 2);
  623. test_divl(1, 0xffffffff, i + 2);
  624. test_divl(2, 0xfffffffe, i + 3);
  625. test_divl(2, 0xffffffff, i + 3);
  626. test_divl(3, 0xfffffffe, i + 4);
  627. test_divl(3, 0xffffffff, i + 4);
  628. test_divl(4, 0xfffffffe, i + 5);
  629. test_divl(4, 0xffffffff, i + 5);
  630. test_divl(0xfffffffd, 0x00000000 + i, 0xfffffffe);
  631. test_divl(0xfffffffd, 0xfffffff0 + i, 0xfffffffe);
  632. test_divl(0xfffffffe, 0x00000000 + i, 0xffffffff);
  633. test_divl(0xfffffffe, 0xfffffff0 + i, 0xffffffff);
  634. test_divl(0, i, 0xfffffffa);
  635. test_divl(0, i, 0xfffffffb);
  636. test_divl(0, i, 0xfffffffc);
  637. test_divl(0, i, 0xfffffffd);
  638. test_divl(0, i, 0xfffffffe);
  639. test_divl(0, i, 0xffffffff);
  640. test_idivl(0, 1, i + 1);
  641. test_idivl(-1, -1, i + 1);
  642. test_idivl(0, 1, -(i + 1));
  643. test_idivl(-1, -1, -(i + 1));
  644. test_idivl(0, 0x7fffffff, i + 1);
  645. test_idivl(-1, 0x80000001, i + 1);
  646. test_idivl(0, 0x7fffffff, -(i + 1));
  647. test_idivl(-1, 0x80000001, -(i + 1));
  648. }
  649. #if defined(__x86_64__)
  650. test_imulq(0, 0x1234001d1234001d, 45);
  651. test_imulq(0, 23, -45);
  652. test_imulq(0, 0x8000000000000000, 0x8000000000000000);
  653. test_imulq(0, 0x100000000, 0x100000000);
  654. test_mulq(0, 0x1234001d1234001d, 45);
  655. test_mulq(0, 23, -45);
  656. test_mulq(0, 0x8000000000000000, 0x8000000000000000);
  657. test_mulq(0, 0x100000000, 0x100000000);
  658. test_imulq2(0x1234001d1234001d, 45);
  659. test_imulq2(23, -45);
  660. test_imulq2(0x8000000000000000, 0x8000000000000000);
  661. test_imulq2(0x100000000, 0x100000000);
  662. TEST_IMUL_IM("q", "", 45, 0x12341234);
  663. TEST_IMUL_IM("q", "", -45, 23);
  664. TEST_IMUL_IM("q", "", 0x8000, 0x8000000000000000);
  665. TEST_IMUL_IM("q", "", 0x7fff, 0x10000000);
  666. test_idivq(0, 0x12345678abcdef, 12347);
  667. test_idivq(0, -233223, -45);
  668. test_idivq(0, 0x8000000000000000, -1);
  669. test_idivq(0x12343, 0x12345678, 0x81234567);
  670. test_divq(0, 0x12345678abcdef, 12347);
  671. test_divq(0, -233223, -45);
  672. test_divq(0, 0x8000000000000000, -1);
  673. test_divq(0x12343, 0x12345678, 0x81234567);
  674. #endif
  675. }
  676. #define TEST_BSX(op, size, op0)\
  677. {\
  678. long res, val, resz;\
  679. val = op0;\
  680. asm("xor %1, %1\n"\
  681. "mov $0x12345678, %0\n"\
  682. #op " %" size "2, %" size "0 ; setz %b1" \
  683. : "=&r" (res), "=&q" (resz)\
  684. : "r" (val));\
  685. printf("%-10s A=" FMTLX " R=" FMTLX " %ld\n", #op, val, res, resz);\
  686. }
  687. void test_bsx(void)
  688. {
  689. TEST_BSX(bsrw, "w", 0);
  690. TEST_BSX(bsrw, "w", 0x12340128);
  691. TEST_BSX(bsrw, "w", 0xffffffff);
  692. TEST_BSX(bsrw, "w", 0xffff7fff);
  693. TEST_BSX(bsfw, "w", 0);
  694. TEST_BSX(bsfw, "w", 0x12340128);
  695. TEST_BSX(bsfw, "w", 0xffffffff);
  696. TEST_BSX(bsfw, "w", 0xfffffff7);
  697. TEST_BSX(bsrl, "k", 0);
  698. TEST_BSX(bsrl, "k", 0x00340128);
  699. TEST_BSX(bsrl, "k", 0xffffffff);
  700. TEST_BSX(bsrl, "k", 0x7fffffff);
  701. TEST_BSX(bsfl, "k", 0);
  702. TEST_BSX(bsfl, "k", 0x00340128);
  703. TEST_BSX(bsfl, "k", 0xffffffff);
  704. TEST_BSX(bsfl, "k", 0xfffffff7);
  705. #if defined(__x86_64__)
  706. TEST_BSX(bsrq, "", 0);
  707. TEST_BSX(bsrq, "", 0x003401281234);
  708. TEST_BSX(bsfq, "", 0);
  709. TEST_BSX(bsfq, "", 0x003401281234);
  710. #endif
  711. }
  712. #define TEST_POPCNT(size, op0)\
  713. {\
  714. long res, val, resz;\
  715. val = op0;\
  716. asm("xor %1, %1\n"\
  717. "mov $0x12345678, %0\n"\
  718. "popcnt %" size "2, %" size "0 ; pushf; pop %1;" \
  719. : "=&r" (res), "=&q" (resz)\
  720. : "r" (val));\
  721. printf("popcnt A=" FMTLX " R=" FMTLX " flags=%lx\n", val, res, resz);\
  722. }
  723. void test_popcnt(void)
  724. {
  725. TEST_POPCNT("w", 0);
  726. }
  727. /**********************************************/
  728. union float64u {
  729. double d;
  730. uint64_t l;
  731. };
  732. union float64u q_nan = { .l = 0xFFF8000000000000LL };
  733. union float64u s_nan = { .l = 0xFFF0000000000000LL };
  734. void test_fops(double a, double b)
  735. {
  736. int ib = (int)b;
  737. int dest = 0;
  738. printf("a=%f b=%f a+b=%f\n", a, b, a + b);
  739. printf("a=%f b=%f a-b=%f\n", a, b, a - b);
  740. printf("a=%f b=%f a*b=%f\n", a, b, a * b);
  741. printf("a=%f b=%f a/b=%f\n", a, b, a / b);
  742. printf("a=%f b=%f =%f\n", a, b, a + a + a + 3 * b / a * (a * a * a / b / b / (a + 1.0) - 3.5 + a * b / (3.7 * a / (a - b * b) + 6.5 * a / (b * b * a / -b - a * b) + 5.5 * (b - a))));
  743. //printf("a=%f b=%f fmod(a, b)=%f\n", a, b, fmod(a, b)); // difference in sign bit on zero and nan
  744. printf("a=%f fma(a,b,a)=%f\n", a, fma(a, b, a));
  745. printf("a=%f fdim(a,b)=%f\n", a, fdim(a, b));
  746. printf("a=%f copysign(a,b)=%f\n", a, copysign(a, b));
  747. printf("a=%f sqrt(a)=%f\n", a, sqrt(a));
  748. printf("a=%f sin(a)=%f\n", a, sin(a));
  749. printf("a=%f cos(a)=%f\n", a, cos(a));
  750. printf("a=%f tan(a)=%f\n", a, tan(a));
  751. if(a >= 0)
  752. {
  753. printf("a=%f log(a)=%f\n", a, log(a));
  754. printf("a=%f log10(a)=%f\n", a, log10(a));
  755. printf("a=%f log1p(a)=%f\n", a, log1p(a));
  756. printf("a=%f log2(a)=%f\n", a, log2(a));
  757. }
  758. printf("a=%f logb(a)=%f\n", a, logb(a));
  759. printf("a=%f ilogb(a)=%d\n", a, ilogb(a));
  760. printf("a=%f exp(a)=%f\n", a, exp(a));
  761. printf("a=%f exp2(a)=%f\n", a, exp2(a));
  762. printf("a=%f frexp(a)=%f, %d\n", a, frexp(a, &dest), dest);
  763. printf("a=%f ldexp(a,b)=%f\n", a, ldexp(a, ib));
  764. printf("a=%f scalbn(a,b)=%f\n", a, scalbn(a, ib));
  765. printf("a=%f sinh(a)=%f\n", a, sinh(a));
  766. printf("a=%f cosh(a)=%f\n", a, cosh(a));
  767. printf("a=%f tanh(a)=%f\n", a, tanh(a));
  768. printf("a=%f fabs(a)=%f\n", a, fabs(a));
  769. printf("a=%f pow(a,b)=%f\n", a, pow(a,b));
  770. printf("a=%f b=%f atan2(a, b)=%f\n", a, b, atan2(a, b));
  771. /* just to test some op combining */
  772. printf("a=%f asin(sin(a))=%f\n", a, asin(sin(a)));
  773. printf("a=%f acos(cos(a))=%f\n", a, acos(cos(a)));
  774. printf("a=%f atan(tan(a))=%f\n", a, atan(tan(a)));
  775. }
  776. void fpu_clear_exceptions(void)
  777. {
  778. struct QEMU_PACKED {
  779. uint16_t fpuc;
  780. uint16_t dummy1;
  781. uint16_t fpus;
  782. uint16_t dummy2;
  783. uint16_t fptag;
  784. uint16_t dummy3;
  785. uint32_t ignored[4];
  786. long double fpregs[8];
  787. } float_env32;
  788. asm volatile ("fnstenv %0\n" : "=m" (float_env32));
  789. float_env32.fpus &= ~0x7f;
  790. asm volatile ("fldenv %0\n" : : "m" (float_env32));
  791. }
  792. /* XXX: display exception bits when supported */
  793. #define FPUS_EMASK 0x007f
  794. void test_fcmp(double a, double b)
  795. {
  796. long eflags, fpus;
  797. fpu_clear_exceptions();
  798. asm("fcom %2\n"
  799. "fstsw %%ax\n"
  800. : "=a" (fpus)
  801. : "t" (a), "u" (b));
  802. printf("fcom(%f %f)=%04lx\n",
  803. a, b, fpus & (0x4500 | FPUS_EMASK & ~1));
  804. fpu_clear_exceptions();
  805. asm("fucom %2\n"
  806. "fstsw %%ax\n"
  807. : "=a" (fpus)
  808. : "t" (a), "u" (b));
  809. printf("fucom(%f %f)=%04lx\n",
  810. a, b, fpus & (0x4500 | FPUS_EMASK));
  811. if (TEST_FCOMI) {
  812. /* test f(u)comi instruction */
  813. fpu_clear_exceptions();
  814. asm("fcomi %3, %2\n"
  815. "fstsw %%ax\n"
  816. "pushf\n"
  817. "pop %0\n"
  818. : "=r" (eflags), "=a" (fpus)
  819. : "t" (a), "u" (b));
  820. printf("fcomi(%f %f)=%04lx %02lx\n",
  821. a, b, fpus & FPUS_EMASK & ~1, eflags & (CC_Z | CC_P | CC_C));
  822. fpu_clear_exceptions();
  823. asm("fucomi %3, %2\n"
  824. "fstsw %%ax\n"
  825. "pushf\n"
  826. "pop %0\n"
  827. : "=r" (eflags), "=a" (fpus)
  828. : "t" (a), "u" (b));
  829. printf("fucomi(%f %f)=%04lx %02lx\n",
  830. a, b, fpus & FPUS_EMASK, eflags & (CC_Z | CC_P | CC_C));
  831. }
  832. fpu_clear_exceptions();
  833. asm volatile("fxam\n"
  834. "fstsw %%ax\n"
  835. : "=a" (fpus)
  836. : "t" (a));
  837. printf("fxam(%f)=%04lx\n", a, fpus & 0x4700);
  838. fpu_clear_exceptions();
  839. }
  840. void test_fcvt(double a)
  841. {
  842. float fa;
  843. long double la;
  844. int16_t fpuc;
  845. int i;
  846. int64_t lla;
  847. int ia;
  848. int16_t wa;
  849. double ra;
  850. fa = a;
  851. la = a;
  852. printf("(float)%f = %f\n", a, fa);
  853. printf("(long double)%f = %Lf\n", a, la);
  854. printf("a=" FMT64X "\n", *(uint64_t *)&a);
  855. printf("la=" FMT64X " %04x\n", *(uint64_t *)&la,
  856. *(unsigned short *)((char *)(&la) + 8));
  857. /* test all roundings */
  858. asm volatile ("fstcw %0" : "=m" (fpuc));
  859. for(i=0;i<4;i++) {
  860. uint16_t val16;
  861. val16 = (fpuc & ~0x0c00) | (i << 10);
  862. asm volatile ("fldcw %0" : : "m" (val16));
  863. asm volatile ("fist %0" : "=m" (wa) : "t" (a));
  864. asm volatile ("fistl %0" : "=m" (ia) : "t" (a));
  865. asm volatile ("fistpll %0" : "=m" (lla) : "t" (a) : "st");
  866. asm volatile ("frndint ; fstl %0" : "=m" (ra) : "t" (a));
  867. asm volatile ("fldcw %0" : : "m" (fpuc));
  868. printf("(short)a = %d\n", wa);
  869. printf("(int)a = %d\n", ia);
  870. printf("(int64_t)a = " FMT64X "\n", lla);
  871. printf("rint(a) = %f\n", ra);
  872. }
  873. }
  874. #define TEST(N) \
  875. asm("fld" #N : "=t" (a)); \
  876. printf("fld" #N "= %f\n", a);
  877. void test_fconst(void)
  878. {
  879. double a;
  880. TEST(1);
  881. TEST(l2t);
  882. TEST(l2e);
  883. TEST(pi);
  884. TEST(lg2);
  885. TEST(ln2);
  886. TEST(z);
  887. }
  888. void test_fbcd(double a)
  889. {
  890. unsigned short bcd[5];
  891. double b;
  892. asm("fbstp %0" : "=m" (bcd[0]) : "t" (a) : "st");
  893. //asm("fbld %1" : "=t" (b) : "m" (bcd[0]));
  894. printf("a=%f bcd=%04x%04x%04x%04x%04x b=%f\n",
  895. a, bcd[4], bcd[3], bcd[2], bcd[1], bcd[0], b);
  896. }
  897. #define TEST_ENV(env, save, restore)\
  898. {\
  899. memset((env), 0xaa, sizeof(*(env)));\
  900. for(i=0;i<5;i++)\
  901. asm volatile ("fldl %0" : : "m" (dtab[i]));\
  902. asm volatile (save " %0\n" : : "m" (*(env)));\
  903. asm volatile (restore " %0\n": : "m" (*(env)));\
  904. for(i=0;i<5;i++)\
  905. asm volatile ("fstpl %0" : "=m" (rtab[i]));\
  906. for(i=0;i<5;i++)\
  907. printf("res[%d]=%f\n", i, rtab[i]);\
  908. printf("fpuc=%04x fpus=%04x fptag=%04x\n",\
  909. (env)->fpuc,\
  910. (env)->fpus & 0xff00,\
  911. (env)->fptag);\
  912. }
  913. void test_fenv(void)
  914. {
  915. struct __attribute__((__packed__)) {
  916. uint16_t fpuc;
  917. uint16_t dummy1;
  918. uint16_t fpus;
  919. uint16_t dummy2;
  920. uint16_t fptag;
  921. uint16_t dummy3;
  922. uint32_t ignored[4];
  923. long double fpregs[8];
  924. } float_env32;
  925. struct __attribute__((__packed__)) {
  926. uint16_t fpuc;
  927. uint16_t fpus;
  928. uint16_t fptag;
  929. uint16_t ignored[4];
  930. long double fpregs[8];
  931. } float_env16;
  932. double dtab[8];
  933. double rtab[8];
  934. int i;
  935. for(i=0;i<8;i++)
  936. dtab[i] = i + 1;
  937. asm volatile ("fninit");
  938. //TEST_ENV(&float_env16, "data16 fnstenv", "data16 fldenv");
  939. //TEST_ENV(&float_env16, "data16 fnsave", "data16 frstor");
  940. TEST_ENV(&float_env32, "fnstenv", "fldenv");
  941. TEST_ENV(&float_env32, "fnsave", "frstor");
  942. /* test for ffree */
  943. for(i=0;i<5;i++)
  944. asm volatile ("fldl %0" : : "m" (dtab[i]));
  945. asm volatile("ffree %st(2)");
  946. asm volatile ("fnstenv %0\n" : : "m" (float_env32));
  947. asm volatile ("fninit");
  948. printf("fptag=%04x\n", float_env32.fptag);
  949. }
  950. #define TEST_FCMOV(a, b, eflags, CC)\
  951. {\
  952. double res;\
  953. asm("push %3\n"\
  954. "popf\n"\
  955. "fcmov" CC " %2, %0\n"\
  956. : "=t" (res)\
  957. : "0" (a), "u" (b), "g" (eflags));\
  958. printf("fcmov%s eflags=0x%04lx-> %f\n", \
  959. CC, (long)eflags, res);\
  960. }
  961. void test_fcmov(void)
  962. {
  963. double a, b;
  964. long eflags, i;
  965. a = 1.0;
  966. b = 2.0;
  967. for(i = 0; i < 4; i++) {
  968. eflags = 0;
  969. if (i & 1)
  970. eflags |= CC_C;
  971. if (i & 2)
  972. eflags |= CC_Z;
  973. TEST_FCMOV(a, b, eflags, "b");
  974. TEST_FCMOV(a, b, eflags, "e");
  975. TEST_FCMOV(a, b, eflags, "be");
  976. TEST_FCMOV(a, b, eflags, "nb");
  977. TEST_FCMOV(a, b, eflags, "ne");
  978. TEST_FCMOV(a, b, eflags, "nbe");
  979. }
  980. TEST_FCMOV(a, b, 0, "u");
  981. TEST_FCMOV(a, b, CC_P, "u");
  982. TEST_FCMOV(a, b, 0, "nu");
  983. TEST_FCMOV(a, b, CC_P, "nu");
  984. }
  985. void test_floats(void)
  986. {
  987. test_fops(2, 3);
  988. test_fops(1.4, -5);
  989. test_fops(-20.5, 128);
  990. test_fops(-0.5, -4);
  991. test_fcmp(2, -1);
  992. test_fcmp(2, 2);
  993. test_fcmp(2, 3);
  994. test_fcmp(2, q_nan.d);
  995. test_fcmp(q_nan.d, -1);
  996. test_fcmp(-1.0/0.0, -1);
  997. test_fcmp(1.0/0.0, -1);
  998. test_fcvt(0.5);
  999. test_fcvt(-0.5);
  1000. test_fcvt(1.0/7.0);
  1001. test_fcvt(-1.0/9.0);
  1002. test_fcvt(32768);
  1003. // largest and smallest, odd and even numbers that have one bit left for the fractional part (2**52-1)
  1004. test_fcvt(4503599627370494.5);
  1005. test_fcvt(4503599627370495.5);
  1006. test_fcvt(-4503599627370494.5);
  1007. test_fcvt(-4503599627370495.5);
  1008. test_fcvt(-1e20);
  1009. test_fcvt(-1.0/0.0);
  1010. test_fcvt(1.0/0.0);
  1011. test_fcvt(q_nan.d);
  1012. test_fconst();
  1013. test_fbcd(0.0);
  1014. test_fbcd(-0.0);
  1015. test_fbcd(1.0);
  1016. test_fbcd(-1.0);
  1017. test_fbcd(1234567890123456.0);
  1018. test_fbcd(-123451234567890.0);
  1019. test_fbcd(341234567890123456.0);
  1020. test_fbcd(-345123451234567890.0);
  1021. test_fbcd(999999999999999900.0);
  1022. test_fbcd(-999999999999999900.0);
  1023. test_fbcd(1000000000000000000.0);
  1024. test_fbcd(-1000000000000000000.0);
  1025. test_fbcd(1000000000000000000000.0);
  1026. test_fbcd(-1000000000000000000000.0);
  1027. test_fenv();
  1028. if (TEST_CMOV) {
  1029. test_fcmov();
  1030. }
  1031. }
  1032. /**********************************************/
  1033. #if !defined(__x86_64__)
  1034. #define TEST_BCD(op, op0, cc_in, cc_mask)\
  1035. {\
  1036. int res, flags;\
  1037. res = op0;\
  1038. flags = cc_in;\
  1039. asm ("push %3\n\t"\
  1040. "popf\n\t"\
  1041. #op "\n\t"\
  1042. "pushf\n\t"\
  1043. "pop %1\n\t"\
  1044. : "=a" (res), "=g" (flags)\
  1045. : "0" (res), "1" (flags));\
  1046. printf("%-10s A=%08x R=%08x CCIN=%04x CC=%04x\n",\
  1047. #op, op0, res, cc_in, flags & cc_mask);\
  1048. }
  1049. void test_bcd(void)
  1050. {
  1051. TEST_BCD(daa, 0x12340503, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
  1052. TEST_BCD(daa, 0x12340506, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
  1053. TEST_BCD(daa, 0x12340507, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
  1054. TEST_BCD(daa, 0x12340559, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
  1055. TEST_BCD(daa, 0x12340560, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
  1056. TEST_BCD(daa, 0x1234059f, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
  1057. TEST_BCD(daa, 0x123405a0, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
  1058. TEST_BCD(daa, 0x12340503, 0, (CC_C | CC_P | CC_Z | CC_S | CC_A));
  1059. TEST_BCD(daa, 0x12340506, 0, (CC_C | CC_P | CC_Z | CC_S | CC_A));
  1060. TEST_BCD(daa, 0x12340503, CC_C, (CC_C | CC_P | CC_Z | CC_S | CC_A));
  1061. TEST_BCD(daa, 0x12340506, CC_C, (CC_C | CC_P | CC_Z | CC_S | CC_A));
  1062. TEST_BCD(daa, 0x12340503, CC_C | CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
  1063. TEST_BCD(daa, 0x12340506, CC_C | CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
  1064. TEST_BCD(das, 0x12340503, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
  1065. TEST_BCD(das, 0x12340506, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
  1066. TEST_BCD(das, 0x12340507, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
  1067. TEST_BCD(das, 0x12340559, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
  1068. TEST_BCD(das, 0x12340560, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
  1069. TEST_BCD(das, 0x1234059f, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
  1070. TEST_BCD(das, 0x123405a0, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
  1071. TEST_BCD(das, 0x12340503, 0, (CC_C | CC_P | CC_Z | CC_S | CC_A));
  1072. TEST_BCD(das, 0x12340506, 0, (CC_C | CC_P | CC_Z | CC_S | CC_A));
  1073. TEST_BCD(das, 0x12340503, CC_C, (CC_C | CC_P | CC_Z | CC_S | CC_A));
  1074. TEST_BCD(das, 0x12340506, CC_C, (CC_C | CC_P | CC_Z | CC_S | CC_A));
  1075. TEST_BCD(das, 0x12340503, CC_C | CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
  1076. TEST_BCD(das, 0x12340506, CC_C | CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
  1077. TEST_BCD(aaa, 0x12340205, CC_A, (CC_C | CC_A));
  1078. TEST_BCD(aaa, 0x12340306, CC_A, (CC_C | CC_A));
  1079. TEST_BCD(aaa, 0x1234040a, CC_A, (CC_C | CC_A));
  1080. TEST_BCD(aaa, 0x123405fa, CC_A, (CC_C | CC_A));
  1081. TEST_BCD(aaa, 0x12340205, 0, (CC_C | CC_A));
  1082. TEST_BCD(aaa, 0x12340306, 0, (CC_C | CC_A));
  1083. TEST_BCD(aaa, 0x1234040a, 0, (CC_C | CC_A));
  1084. TEST_BCD(aaa, 0x123405fa, 0, (CC_C | CC_A));
  1085. TEST_BCD(aas, 0x12340205, CC_A, (CC_C | CC_A));
  1086. TEST_BCD(aas, 0x12340306, CC_A, (CC_C | CC_A));
  1087. TEST_BCD(aas, 0x1234040a, CC_A, (CC_C | CC_A));
  1088. TEST_BCD(aas, 0x123405fa, CC_A, (CC_C | CC_A));
  1089. TEST_BCD(aas, 0x12340205, 0, (CC_C | CC_A));
  1090. TEST_BCD(aas, 0x12340306, 0, (CC_C | CC_A));
  1091. TEST_BCD(aas, 0x1234040a, 0, (CC_C | CC_A));
  1092. TEST_BCD(aas, 0x123405fa, 0, (CC_C | CC_A));
  1093. TEST_BCD(aam, 0x12340547, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_O | CC_A));
  1094. TEST_BCD(aad, 0x12340407, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_O | CC_A));
  1095. }
  1096. #endif
  1097. #define TEST_XCHG(op, size, opconst)\
  1098. {\
  1099. long op0, op1;\
  1100. op0 = i2l(0x12345678);\
  1101. op1 = i2l(0xfbca7654);\
  1102. asm(#op " %" size "0, %" size "1" \
  1103. : "=q" (op0), opconst (op1) \
  1104. : "0" (op0));\
  1105. printf("%-10s A=" FMTLX " B=" FMTLX "\n",\
  1106. #op, op0, op1);\
  1107. }
  1108. #define TEST_CMPXCHG(op, size, opconst, eax)\
  1109. {\
  1110. long op0, op1, op2;\
  1111. op0 = i2l(0x12345678);\
  1112. op1 = i2l(0xfbca7654);\
  1113. op2 = i2l(eax);\
  1114. asm(#op " %" size "0, %" size "1" \
  1115. : "=q" (op0), opconst (op1) \
  1116. : "0" (op0), "a" (op2));\
  1117. printf("%-10s EAX=" FMTLX " A=" FMTLX " C=" FMTLX "\n",\
  1118. #op, op2, op0, op1);\
  1119. }
  1120. void test_xchg(void)
  1121. {
  1122. #if defined(__x86_64__)
  1123. TEST_XCHG(xchgq, "", "+q");
  1124. #endif
  1125. TEST_XCHG(xchgl, "k", "+q");
  1126. TEST_XCHG(xchgw, "w", "+q");
  1127. TEST_XCHG(xchgb, "b", "+q");
  1128. #if defined(__x86_64__)
  1129. TEST_XCHG(xchgq, "", "=m");
  1130. #endif
  1131. TEST_XCHG(xchgl, "k", "+m");
  1132. TEST_XCHG(xchgw, "w", "+m");
  1133. TEST_XCHG(xchgb, "b", "+m");
  1134. #if defined(__x86_64__)
  1135. TEST_XCHG(xaddq, "", "+q");
  1136. #endif
  1137. TEST_XCHG(xaddl, "k", "+q");
  1138. TEST_XCHG(xaddw, "w", "+q");
  1139. TEST_XCHG(xaddb, "b", "+q");
  1140. {
  1141. int res;
  1142. res = 0x12345678;
  1143. asm("xaddl %1, %0" : "=r" (res) : "0" (res));
  1144. printf("xaddl same res=%08x\n", res);
  1145. }
  1146. #if defined(__x86_64__)
  1147. TEST_XCHG(xaddq, "", "+m");
  1148. #endif
  1149. TEST_XCHG(xaddl, "k", "+m");
  1150. TEST_XCHG(xaddw, "w", "+m");
  1151. TEST_XCHG(xaddb, "b", "+m");
  1152. #if defined(__x86_64__)
  1153. TEST_CMPXCHG(cmpxchgq, "", "+q", 0xfbca7654);
  1154. #endif
  1155. TEST_CMPXCHG(cmpxchgl, "k", "+q", 0xfbca7654);
  1156. TEST_CMPXCHG(cmpxchgw, "w", "+q", 0xfbca7654);
  1157. TEST_CMPXCHG(cmpxchgb, "b", "+q", 0xfbca7654);
  1158. #if defined(__x86_64__)
  1159. TEST_CMPXCHG(cmpxchgq, "", "+q", 0xfffefdfc);
  1160. #endif
  1161. TEST_CMPXCHG(cmpxchgl, "k", "+q", 0xfffefdfc);
  1162. TEST_CMPXCHG(cmpxchgw, "w", "+q", 0xfffefdfc);
  1163. TEST_CMPXCHG(cmpxchgb, "b", "+q", 0xfffefdfc);
  1164. #if defined(__x86_64__)
  1165. TEST_CMPXCHG(cmpxchgq, "", "+m", 0xfbca7654);
  1166. #endif
  1167. TEST_CMPXCHG(cmpxchgl, "k", "+m", 0xfbca7654);
  1168. TEST_CMPXCHG(cmpxchgw, "w", "+m", 0xfbca7654);
  1169. TEST_CMPXCHG(cmpxchgb, "b", "+m", 0xfbca7654);
  1170. #if defined(__x86_64__)
  1171. TEST_CMPXCHG(cmpxchgq, "", "+m", 0xfffefdfc);
  1172. #endif
  1173. TEST_CMPXCHG(cmpxchgl, "k", "+m", 0xfffefdfc);
  1174. TEST_CMPXCHG(cmpxchgw, "w", "+m", 0xfffefdfc);
  1175. TEST_CMPXCHG(cmpxchgb, "b", "+m", 0xfffefdfc);
  1176. {
  1177. uint64_t op0, op1, op2;
  1178. long eax, edx;
  1179. long i, eflags;
  1180. for(i = 0; i < 2; i++) {
  1181. op0 = 0x123456789abcdLL;
  1182. eax = i2l(op0 & 0xffffffff);
  1183. edx = i2l(op0 >> 32);
  1184. if (i == 0)
  1185. op1 = 0xfbca765423456LL;
  1186. else
  1187. op1 = op0;
  1188. op2 = 0x6532432432434LL;
  1189. asm("cmpxchg8b %2\n"
  1190. "pushf\n"
  1191. "pop %3\n"
  1192. : "=a" (eax), "=d" (edx), "=m" (op1), "=g" (eflags)
  1193. : "0" (eax), "1" (edx), "m" (op1), "b" ((int)op2), "c" ((int)(op2 >> 32)));
  1194. printf("cmpxchg8b: eax=" FMTLX " edx=" FMTLX " op1=" FMT64X " CC=%02lx\n",
  1195. eax, edx, op1, eflags & CC_Z);
  1196. }
  1197. }
  1198. }
  1199. #ifdef TEST_SEGS
  1200. /**********************************************/
  1201. /* segmentation tests */
  1202. #include <sys/syscall.h>
  1203. #include <unistd.h>
  1204. #include <asm/ldt.h>
  1205. #include <linux/version.h>
  1206. static inline int modify_ldt(int func, void * ptr, unsigned long bytecount)
  1207. {
  1208. int result = syscall(__NR_modify_ldt, func, ptr, bytecount);
  1209. if(result == -1)
  1210. {
  1211. fprintf(stderr, "Error: modify_ldt not available on this kernel. Check MODIFY_LDT_SYSCALL in /proc/config.gz.\n");
  1212. exit(1);
  1213. }
  1214. return result;
  1215. }
  1216. #if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 5, 66)
  1217. #define modify_ldt_ldt_s user_desc
  1218. #endif
  1219. #define MK_SEL(n) (((n) << 3) | 7)
  1220. uint8_t seg_data1[4096];
  1221. uint8_t seg_data2[4096];
  1222. #define TEST_LR(op, size, seg, mask)\
  1223. {\
  1224. int res, res2;\
  1225. uint16_t mseg = seg;\
  1226. res = 0x12345678;\
  1227. asm (op " %" size "2, %" size "0\n" \
  1228. "movl $0, %1\n"\
  1229. "jnz 1f\n"\
  1230. "movl $1, %1\n"\
  1231. "1:\n"\
  1232. : "=r" (res), "=r" (res2) : "m" (mseg), "0" (res));\
  1233. printf(op ": Z=%d %08x\n", res2, res & ~(mask));\
  1234. }
  1235. #define TEST_ARPL(op, size, op1, op2)\
  1236. {\
  1237. long a, b, c; \
  1238. a = (op1); \
  1239. b = (op2); \
  1240. asm volatile(op " %" size "3, %" size "0\n"\
  1241. "movl $0,%1\n"\
  1242. "jnz 1f\n"\
  1243. "movl $1,%1\n"\
  1244. "1:\n"\
  1245. : "=r" (a), "=r" (c) : "0" (a), "r" (b)); \
  1246. printf(op size " A=" FMTLX " B=" FMTLX " R=" FMTLX " z=%ld\n",\
  1247. (long)(op1), (long)(op2), a, c);\
  1248. }
  1249. /* NOTE: we use Linux modify_ldt syscall */
  1250. void test_segs(void)
  1251. {
  1252. struct modify_ldt_ldt_s ldt;
  1253. long long ldt_table[3];
  1254. int res, res2;
  1255. char tmp;
  1256. struct {
  1257. uint32_t offset;
  1258. uint16_t seg;
  1259. } __attribute__((__packed__)) segoff;
  1260. ldt.entry_number = 1;
  1261. ldt.base_addr = (unsigned long)&seg_data1;
  1262. ldt.limit = (sizeof(seg_data1) + 0xfff) >> 12;
  1263. ldt.seg_32bit = 1;
  1264. ldt.contents = MODIFY_LDT_CONTENTS_DATA;
  1265. ldt.read_exec_only = 0;
  1266. ldt.limit_in_pages = 1;
  1267. ldt.seg_not_present = 0;
  1268. ldt.useable = 1;
  1269. modify_ldt(1, &ldt, sizeof(ldt)); /* write ldt entry */
  1270. ldt.entry_number = 2;
  1271. ldt.base_addr = (unsigned long)&seg_data2;
  1272. ldt.limit = (sizeof(seg_data2) + 0xfff) >> 12;
  1273. ldt.seg_32bit = 1;
  1274. ldt.contents = MODIFY_LDT_CONTENTS_DATA;
  1275. ldt.read_exec_only = 0;
  1276. ldt.limit_in_pages = 1;
  1277. ldt.seg_not_present = 0;
  1278. ldt.useable = 1;
  1279. modify_ldt(1, &ldt, sizeof(ldt)); /* write ldt entry */
  1280. modify_ldt(0, &ldt_table, sizeof(ldt_table)); /* read ldt entries */
  1281. {
  1282. int i;
  1283. for(i=0;i<3;i++)
  1284. printf("%d: %016Lx\n", i, ldt_table[i]);
  1285. }
  1286. /* do some tests with fs or gs */
  1287. asm volatile ("movl %0, %%fs" : : "r" (MK_SEL(1)));
  1288. seg_data1[1] = 0xaa;
  1289. seg_data2[1] = 0x55;
  1290. asm volatile ("fs movzbl 0x1, %0" : "=r" (res));
  1291. printf("FS[1] = %02x\n", res);
  1292. asm volatile ("pushl %%gs\n"
  1293. "movl %1, %%gs\n"
  1294. "gs movzbl 0x1, %0\n"
  1295. "popl %%gs\n"
  1296. : "=r" (res)
  1297. : "r" (MK_SEL(2)));
  1298. printf("GS[1] = %02x\n", res);
  1299. /* tests with ds/ss (implicit segment case) */
  1300. tmp = 0xa5;
  1301. asm volatile ("pushl %%ebp\n\t"
  1302. "pushl %%ds\n\t"
  1303. "movl %2, %%ds\n\t"
  1304. "movl %3, %%ebp\n\t"
  1305. "movzbl 0x1, %0\n\t"
  1306. "movzbl (%%ebp), %1\n\t"
  1307. "popl %%ds\n\t"
  1308. "popl %%ebp\n\t"
  1309. : "=r" (res), "=r" (res2)
  1310. : "r" (MK_SEL(1)), "r" (&tmp));
  1311. printf("DS[1] = %02x\n", res);
  1312. printf("SS[tmp] = %02x\n", res2);
  1313. segoff.seg = MK_SEL(2);
  1314. segoff.offset = 0xabcdef12;
  1315. asm volatile("lfs %2, %0\n\t"
  1316. "movl %%fs, %1\n\t"
  1317. : "=r" (res), "=g" (res2)
  1318. : "m" (segoff));
  1319. printf("FS:reg = %04x:%08x\n", res2, res);
  1320. TEST_LR("larw", "w", MK_SEL(2), 0x0100);
  1321. TEST_LR("larl", "", MK_SEL(2), 0x0100);
  1322. TEST_LR("lslw", "w", MK_SEL(2), 0);
  1323. TEST_LR("lsll", "", MK_SEL(2), 0);
  1324. TEST_LR("larw", "w", 0xfff8, 0);
  1325. TEST_LR("larl", "", 0xfff8, 0);
  1326. TEST_LR("lslw", "w", 0xfff8, 0);
  1327. TEST_LR("lsll", "", 0xfff8, 0);
  1328. TEST_ARPL("arpl", "w", 0x12345678 | 3, 0x762123c | 1);
  1329. TEST_ARPL("arpl", "w", 0x12345678 | 1, 0x762123c | 3);
  1330. TEST_ARPL("arpl", "w", 0x12345678 | 1, 0x762123c | 1);
  1331. }
  1332. /* 16 bit code test */
  1333. extern char code16_start, code16_end;
  1334. extern char code16_func1;
  1335. extern char code16_func2;
  1336. extern char code16_func3;
  1337. void test_code16(void)
  1338. {
  1339. struct modify_ldt_ldt_s ldt;
  1340. int res, res2;
  1341. /* build a code segment */
  1342. ldt.entry_number = 1;
  1343. ldt.base_addr = (unsigned long)&code16_start;
  1344. ldt.limit = &code16_end - &code16_start;
  1345. ldt.seg_32bit = 0;
  1346. ldt.contents = MODIFY_LDT_CONTENTS_CODE;
  1347. ldt.read_exec_only = 0;
  1348. ldt.limit_in_pages = 0;
  1349. ldt.seg_not_present = 0;
  1350. ldt.useable = 1;
  1351. modify_ldt(1, &ldt, sizeof(ldt)); /* write ldt entry */
  1352. /* call the first function */
  1353. // XXX: Temporarily disabled: Fails to compile on newer gcc, wait for upstream fix
  1354. #if 0
  1355. asm volatile ("lcall %1, %2"
  1356. : "=a" (res)
  1357. : "i" (MK_SEL(1)), "i" (&code16_func1): "memory", "cc");
  1358. printf("func1() = 0x%08x\n", res);
  1359. asm volatile ("lcall %2, %3"
  1360. : "=a" (res), "=c" (res2)
  1361. : "i" (MK_SEL(1)), "i" (&code16_func2): "memory", "cc");
  1362. printf("func2() = 0x%08x spdec=%d\n", res, res2);
  1363. asm volatile ("lcall %1, %2"
  1364. : "=a" (res)
  1365. : "i" (MK_SEL(1)), "i" (&code16_func3): "memory", "cc");
  1366. printf("func3() = 0x%08x\n", res);
  1367. #endif
  1368. }
  1369. #endif
  1370. #if defined(__x86_64__)
  1371. asm(".globl func_lret\n"
  1372. "func_lret:\n"
  1373. "movl $0x87654641, %eax\n"
  1374. "lretq\n");
  1375. #else
  1376. asm(".globl func_lret\n"
  1377. "func_lret:\n"
  1378. "movl $0x87654321, %eax\n"
  1379. "lret\n"
  1380. ".globl func_iret\n"
  1381. "func_iret:\n"
  1382. "movl $0xabcd4321, %eax\n"
  1383. "iret\n");
  1384. #endif
  1385. extern char func_lret;
  1386. extern char func_iret;
  1387. void test_misc(void)
  1388. {
  1389. char table[256];
  1390. long res, i;
  1391. for(i=0;i<256;i++) table[i] = 256 - i;
  1392. res = 0x12345678;
  1393. asm ("xlat" : "=a" (res) : "b" (table), "0" (res));
  1394. printf("xlat: EAX=" FMTLX "\n", res);
  1395. #if defined(__x86_64__)
  1396. #if 0
  1397. {
  1398. /* XXX: see if Intel Core2 and AMD64 behavior really
  1399. differ. Here we implemented the Intel way which is not
  1400. compatible yet with QEMU. */
  1401. static struct QEMU_PACKED {
  1402. uint64_t offset;
  1403. uint16_t seg;
  1404. } desc;
  1405. long cs_sel;
  1406. asm volatile ("mov %%cs, %0" : "=r" (cs_sel));
  1407. asm volatile ("push %1\n"
  1408. "call func_lret\n"
  1409. : "=a" (res)
  1410. : "r" (cs_sel) : "memory", "cc");
  1411. printf("func_lret=" FMTLX "\n", res);
  1412. desc.offset = (long)&func_lret;
  1413. desc.seg = cs_sel;
  1414. asm volatile ("xor %%rax, %%rax\n"
  1415. "rex64 lcall *(%%rcx)\n"
  1416. : "=a" (res)
  1417. : "c" (&desc)
  1418. : "memory", "cc");
  1419. printf("func_lret2=" FMTLX "\n", res);
  1420. asm volatile ("push %2\n"
  1421. "mov $ 1f, %%rax\n"
  1422. "push %%rax\n"
  1423. "rex64 ljmp *(%%rcx)\n"
  1424. "1:\n"
  1425. : "=a" (res)
  1426. : "c" (&desc), "b" (cs_sel)
  1427. : "memory", "cc");
  1428. printf("func_lret3=" FMTLX "\n", res);
  1429. }
  1430. #endif
  1431. #else
  1432. // XXX: Temporarily disabled: Fails to compile on newer gcc, wait for upstream fix
  1433. #if 0
  1434. asm volatile ("push %%cs ; call %1"
  1435. : "=a" (res)
  1436. : "m" (func_lret): "memory", "cc");
  1437. printf("func_lret=" FMTLX "\n", res);
  1438. asm volatile ("pushf ; push %%cs ; call %1"
  1439. : "=a" (res)
  1440. : "m" (func_iret): "memory", "cc");
  1441. printf("func_iret=" FMTLX "\n", res);
  1442. #endif
  1443. #endif
  1444. #if defined(__x86_64__)
  1445. /* specific popl test */
  1446. asm volatile ("push $12345432 ; push $0x9abcdef ; pop (%%rsp) ; pop %0"
  1447. : "=g" (res));
  1448. printf("popl esp=" FMTLX "\n", res);
  1449. #else
  1450. /* specific popl test */
  1451. asm volatile ("pushl $12345432 ; pushl $0x9abcdef ; popl (%%esp) ; popl %0"
  1452. : "=g" (res));
  1453. printf("popl esp=" FMTLX "\n", res);
  1454. /* specific popw test */
  1455. asm volatile ("pushl $12345432 ; pushl $0x9abcdef ; popw (%%esp) ; addl $2, %%esp ; popl %0"
  1456. : "=g" (res));
  1457. printf("popw esp=" FMTLX "\n", res);
  1458. #endif
  1459. }
  1460. void byte_read(uint8_t* buffer, uint16_t offset, size_t num_bytes);
  1461. // 8 pages in every direction
  1462. #define STR_BUFFER_SIZE (4096 * 16)
  1463. uint8_t __attribute__((aligned (4096))) str_buffer[STR_BUFFER_SIZE];
  1464. #define TEST_STRING1(OP, size_bytes, size, DF, REP, count, offset1, offset2)\
  1465. {\
  1466. long esi, edi, eax, ecx, eflags, i;\
  1467. \
  1468. for(i = 0; i < (count + 1) * size_bytes; i++) {\
  1469. str_buffer[sizeof(str_buffer)/2 + offset1 + i] = i + 0x56;\
  1470. str_buffer[sizeof(str_buffer)/2 + offset1 - i - 1] = i + 0x97;\
  1471. str_buffer[sizeof(str_buffer)/2 + offset2 + i] = i + 0xa5;\
  1472. str_buffer[sizeof(str_buffer)/2 + offset2 - i - 1] = i + 0x3e;\
  1473. }\
  1474. esi = (long)(str_buffer + sizeof(str_buffer)/2 + offset1);\
  1475. edi = (long)(str_buffer + sizeof(str_buffer)/2 + offset2);\
  1476. eax = i2l(0x12345678);\
  1477. ecx = count;\
  1478. \
  1479. asm volatile ("push $0\n\t"\
  1480. "popf\n\t"\
  1481. DF "\n\t"\
  1482. REP #OP size "\n\t"\
  1483. "cld\n\t"\
  1484. "pushf\n\t"\
  1485. "pop %4\n\t"\
  1486. : "=S" (esi), "=D" (edi), "=a" (eax), "=c" (ecx), "=g" (eflags)\
  1487. : "0" (esi), "1" (edi), "2" (eax), "3" (ecx));\
  1488. printf("%-10s ESI=" FMTLX " EDI=" FMTLX " EAX=" FMTLX " ECX=" FMTLX " EFL=%04x\n",\
  1489. REP #OP size, esi, edi, eax, ecx,\
  1490. (int)(eflags & (CC_C | CC_P | CC_Z | CC_S | CC_O | CC_A)));\
  1491. byte_read(str_buffer, offset1, 16); \
  1492. if(count > 16) byte_read(str_buffer, offset1 + count * size_bytes - 16, 16);\
  1493. if(count > 16) byte_read(str_buffer, offset1 - count * size_bytes, 16);\
  1494. byte_read(str_buffer, offset2, 16); \
  1495. if(count > 16) byte_read(str_buffer, offset2 + count * size_bytes - 16, 16);\
  1496. if(count > 16) byte_read(str_buffer, offset2 - count * size_bytes, 16);\
  1497. }
  1498. #define TEST_STRING(OP, REP, count, offset1, offset2)\
  1499. TEST_STRING1(OP, 1, "b", "", REP, count, offset1, offset2);\
  1500. TEST_STRING1(OP, 2, "w", "", REP, count, offset1, offset2);\
  1501. TEST_STRING1(OP, 4, "l", "", REP, count, offset1, offset2);\
  1502. TEST_STRING1(OP, 1, "b", "std", REP, count, offset1, offset2);\
  1503. TEST_STRING1(OP, 2, "w", "std", REP, count, offset1, offset2);\
  1504. TEST_STRING1(OP, 4, "l", "std", REP, count, offset1, offset2);
  1505. void test_string(void)
  1506. {
  1507. TEST_STRING(stos, "", 17, 4096, 4096 + 64);
  1508. TEST_STRING(stos, "rep ", 17, 4096, 4096 + 64);
  1509. TEST_STRING(lods, "", 17, 4096, 4096 + 64);
  1510. TEST_STRING(lods, "rep ", 17, 4096, 4096 + 64);
  1511. TEST_STRING(movs, "", 17, 4096, 4096 + 64);
  1512. TEST_STRING(movs, "rep ", 17, 4096, 4096 + 64);
  1513. /* XXX: better tests */
  1514. TEST_STRING(scas, "", 17, 4096, 4096 + 64);
  1515. TEST_STRING(scas, "repz ", 17, 4096, 4096 + 64);
  1516. TEST_STRING(scas, "repnz ", 17, 4096, 4096 + 64);
  1517. TEST_STRING(cmps, "", 17, 4096, 4096 + 64);
  1518. TEST_STRING(cmps, "repz ", 17, 4096, 4096 + 64);
  1519. TEST_STRING(cmps, "repnz ", 17, 4096, 4096 + 64);
  1520. int counts[] = { 0, 1, 2, 3, 4095, 4096, 4097, 2047, 2048, 2049, 1023, 1024, 1025 };
  1521. int offsets[] = { 0, 1, 2, 3, 4095, 4096, 4097, 2047, 2048, 2049, 1023, 1024, 1025 };
  1522. for(int count = 0; count < sizeof(counts) / sizeof(int); count++)
  1523. {
  1524. for(int offset1 = 0; offset1 < sizeof(offsets) / sizeof(int); offset1++)
  1525. {
  1526. TEST_STRING(stos, "rep ", counts[count], offsets[offset1], offsets[offset1]);
  1527. for(int offset2 = 0; offset2 < sizeof(offsets) / sizeof(int); offset2++)
  1528. {
  1529. TEST_STRING(movs, "rep ", counts[count], offsets[offset1], offsets[offset2]);
  1530. }
  1531. }
  1532. }
  1533. }
  1534. #ifdef TEST_VM86
  1535. /* VM86 test */
  1536. static inline void set_bit(uint8_t *a, unsigned int bit)
  1537. {
  1538. a[bit / 8] |= (1 << (bit % 8));
  1539. }
  1540. static inline uint8_t *seg_to_linear(unsigned int seg, unsigned int reg)
  1541. {
  1542. return (uint8_t *)((seg << 4) + (reg & 0xffff));
  1543. }
  1544. static inline void pushw(struct vm86_regs *r, int val)
  1545. {
  1546. r->esp = (r->esp & ~0xffff) | ((r->esp - 2) & 0xffff);
  1547. *(uint16_t *)seg_to_linear(r->ss, r->esp) = val;
  1548. }
  1549. static inline int vm86(int func, struct vm86plus_struct *v86)
  1550. {
  1551. return syscall(__NR_vm86, func, v86);
  1552. }
  1553. extern char vm86_code_start;
  1554. extern char vm86_code_end;
  1555. #define VM86_CODE_CS 0x100
  1556. #define VM86_CODE_IP 0x100
  1557. void test_vm86(void)
  1558. {
  1559. struct vm86plus_struct ctx;
  1560. struct vm86_regs *r;
  1561. uint8_t *vm86_mem;
  1562. int seg, ret;
  1563. vm86_mem = mmap((void *)0x00000000, 0x110000,
  1564. PROT_WRITE | PROT_READ | PROT_EXEC,
  1565. MAP_FIXED | MAP_ANON | MAP_PRIVATE, -1, 0);
  1566. if (vm86_mem == MAP_FAILED) {
  1567. printf("ERROR: could not map vm86 memory");
  1568. return;
  1569. }
  1570. memset(&ctx, 0, sizeof(ctx));
  1571. /* init basic registers */
  1572. r = &ctx.regs;
  1573. r->eip = VM86_CODE_IP;
  1574. r->esp = 0xfffe;
  1575. seg = VM86_CODE_CS;
  1576. r->cs = seg;
  1577. r->ss = seg;
  1578. r->ds = seg;
  1579. r->es = seg;
  1580. r->fs = seg;
  1581. r->gs = seg;
  1582. //r->eflags = VIF_MASK;
  1583. /* move code to proper address. We use the same layout as a .com
  1584. dos program. */
  1585. memcpy(vm86_mem + (VM86_CODE_CS << 4) + VM86_CODE_IP,
  1586. &vm86_code_start, &vm86_code_end - &vm86_code_start);
  1587. /* mark int 0x21 as being emulated */
  1588. set_bit((uint8_t *)&ctx.int_revectored, 0x21);
  1589. for(;;) {
  1590. ret = vm86(VM86_ENTER, &ctx);
  1591. switch(VM86_TYPE(ret)) {
  1592. case VM86_INTx:
  1593. {
  1594. int int_num, ah, v;
  1595. int_num = VM86_ARG(ret);
  1596. if (int_num != 0x21)
  1597. goto unknown_int;
  1598. ah = (r->eax >> 8) & 0xff;
  1599. switch(ah) {
  1600. case 0x00: /* exit */
  1601. goto the_end;
  1602. case 0x02: /* write char */
  1603. {
  1604. uint8_t c = r->edx;
  1605. putchar(c);
  1606. }
  1607. break;
  1608. case 0x09: /* write string */
  1609. {
  1610. uint8_t c, *ptr;
  1611. ptr = seg_to_linear(r->ds, r->edx);
  1612. for(;;) {
  1613. c = *ptr++;
  1614. if (c == '$')
  1615. break;
  1616. putchar(c);
  1617. }
  1618. r->eax = (r->eax & ~0xff) | '$';
  1619. }
  1620. break;
  1621. case 0xff: /* extension: write eflags number in edx */
  1622. v = (int)r->edx;
  1623. #ifndef LINUX_VM86_IOPL_FIX
  1624. v &= ~0x3000;
  1625. #endif
  1626. printf("%08x\n", v);
  1627. break;
  1628. default:
  1629. unknown_int:
  1630. printf("unsupported int 0x%02x\n", int_num);
  1631. goto the_end;
  1632. }
  1633. }
  1634. break;
  1635. case VM86_SIGNAL:
  1636. /* a signal came, we just ignore that */
  1637. break;
  1638. case VM86_STI:
  1639. break;
  1640. default:
  1641. printf("ERROR: unhandled vm86 return code (0x%x)\n", ret);
  1642. goto the_end;
  1643. }
  1644. }
  1645. the_end:
  1646. printf("VM86 end\n");
  1647. munmap(vm86_mem, 0x110000);
  1648. }
  1649. #endif
  1650. /* exception tests */
  1651. #if defined(__i386__) && !defined(REG_EAX)
  1652. #define REG_EAX EAX
  1653. #define REG_EBX EBX
  1654. #define REG_ECX ECX
  1655. #define REG_EDX EDX
  1656. #define REG_ESI ESI
  1657. #define REG_EDI EDI
  1658. #define REG_EBP EBP
  1659. #define REG_ESP ESP
  1660. #define REG_EIP EIP
  1661. #define REG_EFL EFL
  1662. #define REG_TRAPNO TRAPNO
  1663. #define REG_ERR ERR
  1664. #endif
  1665. #if defined(__x86_64__)
  1666. #define REG_EIP REG_RIP
  1667. #endif
  1668. jmp_buf jmp_env;
  1669. int v1;
  1670. int tab[2];
  1671. void sig_handler(int sig, siginfo_t *info, void *puc)
  1672. {
  1673. ucontext_t *uc = puc;
  1674. printf("si_signo=%d si_errno=%d si_code=%d",
  1675. info->si_signo, info->si_errno, info->si_code);
  1676. printf(" si_addr=0x%08lx",
  1677. (unsigned long)info->si_addr);
  1678. printf("\n");
  1679. printf("trapno=" FMTLX " err=" FMTLX,
  1680. (long)uc->uc_mcontext.gregs[REG_TRAPNO],
  1681. (long)uc->uc_mcontext.gregs[REG_ERR]);
  1682. printf(" EIP=" FMTLX, (long)uc->uc_mcontext.gregs[REG_EIP]);
  1683. printf("\n");
  1684. longjmp(jmp_env, 1);
  1685. }
  1686. void test_exceptions(void)
  1687. {
  1688. struct sigaction act;
  1689. volatile int val;
  1690. act.sa_sigaction = sig_handler;
  1691. sigemptyset(&act.sa_mask);
  1692. act.sa_flags = SA_SIGINFO | SA_NODEFER;
  1693. sigaction(SIGFPE, &act, NULL);
  1694. sigaction(SIGILL, &act, NULL);
  1695. sigaction(SIGSEGV, &act, NULL);
  1696. sigaction(SIGBUS, &act, NULL);
  1697. sigaction(SIGTRAP, &act, NULL);
  1698. /* test division by zero reporting */
  1699. printf("DIVZ exception:\n");
  1700. if (setjmp(jmp_env) == 0) {
  1701. /* now divide by zero */
  1702. v1 = 0;
  1703. v1 = 2 / v1;
  1704. }
  1705. #if 0
  1706. #if !defined(__x86_64__)
  1707. printf("BOUND exception:\n");
  1708. if (setjmp(jmp_env) == 0) {
  1709. /* bound exception */
  1710. tab[0] = 1;
  1711. tab[1] = 10;
  1712. asm volatile ("bound %0, %1" : : "r" (11), "m" (tab[0]));
  1713. }
  1714. #endif
  1715. #endif
  1716. #ifdef TEST_SEGS
  1717. printf("segment exceptions:\n");
  1718. if (setjmp(jmp_env) == 0) {
  1719. /* load an invalid segment */
  1720. asm volatile ("movl %0, %%fs" : : "r" ((0x1234 << 3) | 1));
  1721. }
  1722. if (setjmp(jmp_env) == 0) {
  1723. /* null data segment is valid */
  1724. asm volatile ("movl %0, %%fs" : : "r" (3));
  1725. /* null stack segment */
  1726. asm volatile ("movl %0, %%ss" : : "r" (3));
  1727. }
  1728. {
  1729. struct modify_ldt_ldt_s ldt;
  1730. ldt.entry_number = 1;
  1731. ldt.base_addr = (unsigned long)&seg_data1;
  1732. ldt.limit = (sizeof(seg_data1) + 0xfff) >> 12;
  1733. ldt.seg_32bit = 1;
  1734. ldt.contents = MODIFY_LDT_CONTENTS_DATA;
  1735. ldt.read_exec_only = 0;
  1736. ldt.limit_in_pages = 1;
  1737. ldt.seg_not_present = 1;
  1738. ldt.useable = 1;
  1739. modify_ldt(1, &ldt, sizeof(ldt)); /* write ldt entry */
  1740. if (setjmp(jmp_env) == 0) {
  1741. /* segment not present */
  1742. asm volatile ("movl %0, %%fs" : : "r" (MK_SEL(1)));
  1743. }
  1744. }
  1745. #endif
  1746. /* test SEGV reporting */
  1747. printf("PF exception:\n");
  1748. if (setjmp(jmp_env) == 0) {
  1749. val = 1;
  1750. /* we add a nop to test a weird PC retrieval case */
  1751. asm volatile ("nop");
  1752. /* now store in an invalid address */
  1753. *(char *)0x1234 = 1;
  1754. }
  1755. /* test SEGV reporting */
  1756. printf("PF exception:\n");
  1757. if (setjmp(jmp_env) == 0) {
  1758. val = 1;
  1759. /* read from an invalid address */
  1760. v1 = *(char *)0x1234;
  1761. }
  1762. /* test illegal instruction reporting */
  1763. printf("UD2 exception:\n");
  1764. if (setjmp(jmp_env) == 0) {
  1765. /* now execute an invalid instruction */
  1766. asm volatile("ud2");
  1767. }
  1768. #if 0
  1769. printf("lock nop exception:\n");
  1770. if (setjmp(jmp_env) == 0) {
  1771. /* now execute an invalid instruction */
  1772. asm volatile(".byte 0xf0, 0x90");
  1773. }
  1774. #endif
  1775. printf("INT exception:\n");
  1776. if (setjmp(jmp_env) == 0) {
  1777. asm volatile ("int $0xfd");
  1778. }
  1779. if (setjmp(jmp_env) == 0) {
  1780. asm volatile ("int $0x01");
  1781. }
  1782. if (setjmp(jmp_env) == 0) {
  1783. asm volatile (".byte 0xcd, 0x03");
  1784. }
  1785. if (setjmp(jmp_env) == 0) {
  1786. asm volatile ("int $0x04");
  1787. }
  1788. if (setjmp(jmp_env) == 0) {
  1789. asm volatile ("int $0x05");
  1790. }
  1791. printf("INT3 exception:\n");
  1792. if (setjmp(jmp_env) == 0) {
  1793. asm volatile ("int3");
  1794. }
  1795. printf("CLI exception:\n");
  1796. if (setjmp(jmp_env) == 0) {
  1797. asm volatile ("cli");
  1798. }
  1799. printf("STI exception:\n");
  1800. if (setjmp(jmp_env) == 0) {
  1801. asm volatile ("cli");
  1802. }
  1803. #if !defined(__x86_64__)
  1804. printf("INTO exception:\n");
  1805. if (setjmp(jmp_env) == 0) {
  1806. /* overflow exception */
  1807. asm volatile ("addl $1, %0 ; into" : : "r" (0x7fffffff));
  1808. }
  1809. #endif
  1810. printf("OUTB exception:\n");
  1811. if (setjmp(jmp_env) == 0) {
  1812. asm volatile ("outb %%al, %%dx" : : "d" (0x4321), "a" (0));
  1813. }
  1814. printf("INB exception:\n");
  1815. if (setjmp(jmp_env) == 0) {
  1816. asm volatile ("inb %%dx, %%al" : "=a" (val) : "d" (0x4321));
  1817. }
  1818. printf("REP OUTSB exception:\n");
  1819. if (setjmp(jmp_env) == 0) {
  1820. asm volatile ("rep outsb" : : "d" (0x4321), "S" (tab), "c" (1));
  1821. }
  1822. printf("REP INSB exception:\n");
  1823. if (setjmp(jmp_env) == 0) {
  1824. asm volatile ("rep insb" : : "d" (0x4321), "D" (tab), "c" (1));
  1825. }
  1826. printf("HLT exception:\n");
  1827. if (setjmp(jmp_env) == 0) {
  1828. asm volatile ("hlt");
  1829. }
  1830. #if 0
  1831. printf("single step exception:\n");
  1832. val = 0;
  1833. if (setjmp(jmp_env) == 0) {
  1834. asm volatile ("pushf\n"
  1835. "orl $0x00100, (%%esp)\n"
  1836. "popf\n"
  1837. "movl $0xabcd, %0\n"
  1838. "movl $0x0, %0\n" : "=m" (val) : : "cc", "memory");
  1839. }
  1840. printf("val=0x%x\n", val);
  1841. #endif
  1842. }
  1843. #if !defined(__x86_64__)
  1844. /* specific precise single step test */
  1845. void sig_trap_handler(int sig, siginfo_t *info, void *puc)
  1846. {
  1847. ucontext_t *uc = puc;
  1848. printf("EIP=" FMTLX "\n", (long)uc->uc_mcontext.gregs[REG_EIP]);
  1849. }
  1850. const uint8_t sstep_buf1[4] = { 1, 2, 3, 4};
  1851. uint8_t sstep_buf2[4];
  1852. void test_single_step(void)
  1853. {
  1854. struct sigaction act;
  1855. volatile int val;
  1856. int i;
  1857. val = 0;
  1858. act.sa_sigaction = sig_trap_handler;
  1859. sigemptyset(&act.sa_mask);
  1860. act.sa_flags = SA_SIGINFO;
  1861. sigaction(SIGTRAP, &act, NULL);
  1862. asm volatile ("pushf\n"
  1863. "orl $0x00100, (%%esp)\n"
  1864. "popf\n"
  1865. "movl $0xabcd, %0\n"
  1866. /* jmp test */
  1867. "movl $3, %%ecx\n"
  1868. "1:\n"
  1869. "addl $1, %0\n"
  1870. "decl %%ecx\n"
  1871. "jnz 1b\n"
  1872. /* movsb: the single step should stop at each movsb iteration */
  1873. "movl $sstep_buf1, %%esi\n"
  1874. "movl $sstep_buf2, %%edi\n"
  1875. "movl $0, %%ecx\n"
  1876. "rep movsb\n"
  1877. "movl $3, %%ecx\n"
  1878. "rep movsb\n"
  1879. "movl $1, %%ecx\n"
  1880. "rep movsb\n"
  1881. /* cmpsb: the single step should stop at each cmpsb iteration */
  1882. "movl $sstep_buf1, %%esi\n"
  1883. "movl $sstep_buf2, %%edi\n"
  1884. "movl $0, %%ecx\n"
  1885. "rep cmpsb\n"
  1886. "movl $4, %%ecx\n"
  1887. "rep cmpsb\n"
  1888. /* getpid() syscall: single step should skip one
  1889. instruction */
  1890. "movl $20, %%eax\n"
  1891. "int $0x80\n"
  1892. "movl $0, %%eax\n"
  1893. /* when modifying SS, trace is not done on the next
  1894. instruction */
  1895. "movl %%ss, %%ecx\n"
  1896. "movl %%ecx, %%ss\n"
  1897. "addl $1, %0\n"
  1898. "movl $1, %%eax\n"
  1899. "movl %%ecx, %%ss\n"
  1900. "jmp 1f\n"
  1901. "addl $1, %0\n"
  1902. "1:\n"
  1903. "movl $1, %%eax\n"
  1904. "pushl %%ecx\n"
  1905. "popl %%ss\n"
  1906. "addl $1, %0\n"
  1907. "movl $1, %%eax\n"
  1908. "pushf\n"
  1909. "andl $~0x00100, (%%esp)\n"
  1910. "popf\n"
  1911. : "=m" (val)
  1912. :
  1913. : "cc", "memory", "eax", "ecx", "esi", "edi");
  1914. printf("val=%d\n", val);
  1915. for(i = 0; i < 4; i++)
  1916. printf("sstep_buf2[%d] = %d\n", i, sstep_buf2[i]);
  1917. }
  1918. /* self modifying code test */
  1919. uint8_t code[] = {
  1920. 0xb8, 0x1, 0x00, 0x00, 0x00, /* movl $1, %eax */
  1921. 0xc3, /* ret */
  1922. };
  1923. asm(".section \".data\"\n"
  1924. "smc_code2:\n"
  1925. "movl 4(%esp), %eax\n"
  1926. "movl %eax, smc_patch_addr2 + 1\n"
  1927. "nop\n"
  1928. "nop\n"
  1929. "nop\n"
  1930. "nop\n"
  1931. "nop\n"
  1932. "nop\n"
  1933. "nop\n"
  1934. "nop\n"
  1935. "smc_patch_addr2:\n"
  1936. "movl $1, %eax\n"
  1937. "ret\n"
  1938. ".previous\n"
  1939. );
  1940. typedef int FuncType(void);
  1941. extern int smc_code2(int);
  1942. void test_self_modifying_code(void)
  1943. {
  1944. int i;
  1945. printf("self modifying code:\n");
  1946. printf("func1 = 0x%x\n", ((FuncType *)code)());
  1947. for(i = 2; i <= 4; i++) {
  1948. code[1] = i;
  1949. printf("func%d = 0x%x\n", i, ((FuncType *)code)());
  1950. }
  1951. /* more difficult test : the modified code is just after the
  1952. modifying instruction. It is forbidden in Intel specs, but it
  1953. is used by old DOS programs */
  1954. for(i = 2; i <= 4; i++) {
  1955. printf("smc_code2(%d) = %d\n", i, smc_code2(i));
  1956. }
  1957. }
  1958. #endif
  1959. long enter_stack[4096];
  1960. #if defined(__x86_64__)
  1961. #define RSP "%%rsp"
  1962. #define RBP "%%rbp"
  1963. #else
  1964. #define RSP "%%esp"
  1965. #define RBP "%%ebp"
  1966. #endif
  1967. #if !defined(__x86_64__)
  1968. /* causes an infinite loop, disable it for now. */
  1969. #define TEST_ENTER(size, stack_type, level)
  1970. #else
  1971. #define TEST_ENTER(size, stack_type, level)\
  1972. {\
  1973. long esp_save, esp_val, ebp_val, ebp_save, i;\
  1974. stack_type *ptr, *stack_end, *stack_ptr;\
  1975. memset(enter_stack, 0, sizeof(enter_stack));\
  1976. stack_end = stack_ptr = (stack_type *)(enter_stack + 4096);\
  1977. ebp_val = (long)stack_ptr;\
  1978. for(i=1;i<=32;i++)\
  1979. *--stack_ptr = i;\
  1980. esp_val = (long)stack_ptr;\
  1981. asm("mov " RSP ", %[esp_save]\n"\
  1982. "mov " RBP ", %[ebp_save]\n"\
  1983. "mov %[esp_val], " RSP "\n"\
  1984. "mov %[ebp_val], " RBP "\n"\
  1985. "enter" size " $8, $" #level "\n"\
  1986. "mov " RSP ", %[esp_val]\n"\
  1987. "mov " RBP ", %[ebp_val]\n"\
  1988. "mov %[esp_save], " RSP "\n"\
  1989. "mov %[ebp_save], " RBP "\n"\
  1990. : [esp_save] "=r" (esp_save),\
  1991. [ebp_save] "=r" (ebp_save),\
  1992. [esp_val] "=r" (esp_val),\
  1993. [ebp_val] "=r" (ebp_val)\
  1994. : "[esp_val]" (esp_val),\
  1995. "[ebp_val]" (ebp_val));\
  1996. printf("level=%d:\n", level);\
  1997. printf("esp_val=" FMTLX "\n", esp_val - (long)stack_end);\
  1998. printf("ebp_val=" FMTLX "\n", ebp_val - (long)stack_end);\
  1999. for(ptr = (stack_type *)esp_val; ptr < stack_end; ptr++)\
  2000. printf(FMTLX "\n", (long)ptr[0]);\
  2001. }
  2002. #endif
  2003. static void test_enter(void)
  2004. {
  2005. #if defined(__x86_64__)
  2006. TEST_ENTER("q", uint64_t, 0);
  2007. TEST_ENTER("q", uint64_t, 1);
  2008. TEST_ENTER("q", uint64_t, 2);
  2009. TEST_ENTER("q", uint64_t, 31);
  2010. #else
  2011. TEST_ENTER("l", uint32_t, 0);
  2012. TEST_ENTER("l", uint32_t, 1);
  2013. TEST_ENTER("l", uint32_t, 2);
  2014. TEST_ENTER("l", uint32_t, 31);
  2015. #endif
  2016. TEST_ENTER("w", uint16_t, 0);
  2017. TEST_ENTER("w", uint16_t, 1);
  2018. TEST_ENTER("w", uint16_t, 2);
  2019. TEST_ENTER("w", uint16_t, 31);
  2020. }
  2021. #ifdef TEST_SSE
  2022. typedef int __m64 __attribute__ ((vector_size(8)));
  2023. typedef float __m128 __attribute__ ((vector_size(16)));
  2024. typedef union {
  2025. double d[2];
  2026. float s[4];
  2027. uint32_t l[4];
  2028. uint64_t q[2];
  2029. __m128 dq;
  2030. } XMMReg;
  2031. static uint64_t __attribute__((aligned(16))) test_values[4][2] = {
  2032. { 0x456723c698694873, 0xdc515cff944a58ec },
  2033. { 0x1f297ccd58bad7ab, 0x41f21efba9e3e146 },
  2034. { 0x007c62c2085427f8, 0x231be9e8cde7438d },
  2035. { 0x0f76255a085427f8, 0xc233e9e8c4c9439a },
  2036. };
  2037. #define SSE_OP(op)\
  2038. {\
  2039. asm volatile (#op " %2, %0" : "=x" (r.dq) : "0" (a.dq), "x" (b.dq));\
  2040. printf("%-9s: a=" FMT64X "" FMT64X " b=" FMT64X "" FMT64X " r=" FMT64X "" FMT64X "\n",\
  2041. #op,\
  2042. a.q[1], a.q[0],\
  2043. b.q[1], b.q[0],\
  2044. r.q[1], r.q[0]);\
  2045. }
  2046. #define SSE_OP2(op)\
  2047. {\
  2048. int i;\
  2049. for(i=0;i<sizeof(test_values)/sizeof(uint64_t)/4;i++) {\
  2050. a.q[0] = test_values[2*i][0];\
  2051. a.q[1] = test_values[2*i][1];\
  2052. b.q[0] = test_values[2*i+1][0];\
  2053. b.q[1] = test_values[2*i+1][1];\
  2054. SSE_OP(op);\
  2055. }\
  2056. }
  2057. #define MMX_OP2(op)\
  2058. {\
  2059. int i;\
  2060. for(i=0;i<sizeof(test_values)/sizeof(uint64_t)/4;i++) {\
  2061. a.q[0] = test_values[2*i][0];\
  2062. b.q[0] = test_values[2*i+1][0];\
  2063. asm volatile (#op " %2, %0" : "=y" (r.q[0]) : "0" (a.q[0]), "y" (b.q[0]));\
  2064. printf("%-9s: a=" FMT64X " b=" FMT64X " r=" FMT64X "\n",\
  2065. #op,\
  2066. a.q[0],\
  2067. b.q[0],\
  2068. r.q[0]);\
  2069. }\
  2070. SSE_OP2(op);\
  2071. }
  2072. #define SHUF_OP_MMX(op, ib)\
  2073. {\
  2074. int i;\
  2075. for(i=0;i<sizeof(test_values)/sizeof(uint64_t)/4;i++) {\
  2076. a.q[0] = test_values[2*i][0];\
  2077. b.q[0] = test_values[2*i+1][0];\
  2078. asm volatile (#op " $" #ib ", %2, %0" : "=y" (r.q[0]) : "0" (a.q[0]), "y" (b.q[0])); \
  2079. printf("%-9s: a=" FMT64X " b=" FMT64X " ib=%02x r=" FMT64X "\n",\
  2080. #op,\
  2081. a.q[0],\
  2082. b.q[0],\
  2083. ib,\
  2084. r.q[0]);\
  2085. }\
  2086. }
  2087. #define SHUF_OP(op, ib)\
  2088. {\
  2089. a.q[0] = test_values[0][0];\
  2090. a.q[1] = test_values[0][1];\
  2091. b.q[0] = test_values[1][0];\
  2092. b.q[1] = test_values[1][1];\
  2093. asm volatile (#op " $" #ib ", %2, %0" : "=x" (r.dq) : "0" (a.dq), "x" (b.dq));\
  2094. printf("%-9s: a=" FMT64X "" FMT64X " b=" FMT64X "" FMT64X " ib=%02x r=" FMT64X "" FMT64X "\n",\
  2095. #op,\
  2096. a.q[1], a.q[0],\
  2097. b.q[1], b.q[0],\
  2098. ib,\
  2099. r.q[1], r.q[0]);\
  2100. }
  2101. #define PSHUF_OP(op, ib)\
  2102. {\
  2103. int i;\
  2104. for(i=0;i<sizeof(test_values)/sizeof(uint64_t)/4;i++) {\
  2105. a.q[0] = test_values[2*i][0];\
  2106. a.q[1] = test_values[2*i][1];\
  2107. asm volatile (#op " $" #ib ", %1, %0" : "=x" (r.dq) : "x" (a.dq));\
  2108. printf("%-9s: a=" FMT64X "" FMT64X " ib=%02x r=" FMT64X "" FMT64X "\n",\
  2109. #op,\
  2110. a.q[1], a.q[0],\
  2111. ib,\
  2112. r.q[1], r.q[0]);\
  2113. }\
  2114. }
  2115. // To use mm0-7 registers instead of xmm registers
  2116. #define SHIFT_IM_MMX(op, ib) \
  2117. {\
  2118. int i;\
  2119. for(i=0;i<sizeof(test_values)/sizeof(uint64_t)/4;i++) {\
  2120. a.q[0] = test_values[2*i][0];\
  2121. asm volatile (#op " $" #ib ", %0" : "=y" (r.q[0]) : "0" (a.q[0]));\
  2122. printf("%-9s: a=" FMT64X " ib=%02x r=" FMT64X "\n",\
  2123. #op,\
  2124. a.q[0],\
  2125. ib,\
  2126. r.q[0]);\
  2127. }\
  2128. }
  2129. #define SHIFT_IM(op, ib)\
  2130. {\
  2131. int i;\
  2132. for(i=0;i<sizeof(test_values)/sizeof(uint64_t)/4;i++) {\
  2133. a.q[0] = test_values[2*i][0];\
  2134. a.q[1] = test_values[2*i][1];\
  2135. asm volatile (#op " $" #ib ", %0" : "=x" (r.dq) : "0" (a.dq));\
  2136. printf("%-9s: a=" FMT64X "" FMT64X " ib=%02x r=" FMT64X "" FMT64X "\n",\
  2137. #op,\
  2138. a.q[1], a.q[0],\
  2139. ib,\
  2140. r.q[1], r.q[0]);\
  2141. }\
  2142. }
  2143. #define SHIFT_REG_MMX(op, ib)\
  2144. {\
  2145. int i;\
  2146. for(i=0;i<sizeof(test_values)/sizeof(uint64_t)/4;i++) {\
  2147. a.q[0] = test_values[2*i][0];\
  2148. b.q[0] = ib;\
  2149. asm volatile (#op " %2, %0" : "=y" (r.q[0]) : "0" (a.q[0]), "y" (b.q[0]));\
  2150. printf("%-9s: a=" FMT64X " b=" FMT64X " ib=%02llx r=" FMT64X "\n",\
  2151. #op,\
  2152. a.q[0],\
  2153. b.q[0],\
  2154. (uint64_t)ib,\
  2155. r.q[0]);\
  2156. }\
  2157. }
  2158. // To use mm0-7 registers instead of xmm registers
  2159. #define SHIFT_OP_MMX(op, ib)\
  2160. {\
  2161. SHIFT_IM_MMX(op, ib);\
  2162. SHIFT_REG_MMX(op, ib);\
  2163. }
  2164. #define SHIFT_REG(op, ib)\
  2165. {\
  2166. int i;\
  2167. for(i=0;i<sizeof(test_values)/sizeof(uint64_t)/4;i++) {\
  2168. a.q[0] = test_values[2*i][0];\
  2169. a.q[1] = test_values[2*i][1];\
  2170. b.q[0] = ib;\
  2171. b.q[1] = 0;\
  2172. asm volatile (#op " %2, %0" : "=x" (r.dq) : "0" (a.dq), "x" (b.dq));\
  2173. printf("%-9s: a=" FMT64X "" FMT64X " b=" FMT64X "" FMT64X " r=" FMT64X "" FMT64X "\n",\
  2174. #op,\
  2175. a.q[1], a.q[0],\
  2176. b.q[1], b.q[0],\
  2177. r.q[1], r.q[0]);\
  2178. }\
  2179. }
  2180. #define SHIFT_OP(op, ib)\
  2181. {\
  2182. SHIFT_OP_MMX(op, ib)\
  2183. SHIFT_IM(op, ib);\
  2184. SHIFT_REG(op, ib);\
  2185. }
  2186. #define MOVMSK(op)\
  2187. {\
  2188. int i, reg;\
  2189. for(i=0;i<sizeof(test_values)/sizeof(uint64_t)/4;i++) {\
  2190. a.q[0] = test_values[2*i][0];\
  2191. a.q[1] = test_values[2*i][1];\
  2192. asm volatile (#op " %1, %0" : "=r" (reg) : "x" (a.dq));\
  2193. printf("%-9s: a=" FMT64X "" FMT64X " r=%08x\n",\
  2194. #op,\
  2195. a.q[1], a.q[0],\
  2196. reg);\
  2197. }\
  2198. }
  2199. #define SSE_OPS(a) \
  2200. SSE_OP(a ## ps);\
  2201. SSE_OP(a ## ss);
  2202. #define SSE_OPD(a) \
  2203. SSE_OP(a ## pd);\
  2204. SSE_OP(a ## sd);
  2205. #define SSE_COMI(op, field)\
  2206. {\
  2207. unsigned long eflags;\
  2208. XMMReg a, b;\
  2209. a.field[0] = a1;\
  2210. b.field[0] = b1;\
  2211. asm volatile (#op " %2, %1\n"\
  2212. "pushf\n"\
  2213. "pop %0\n"\
  2214. : "=rm" (eflags)\
  2215. : "x" (a.dq), "x" (b.dq));\
  2216. printf("%-9s: a=%f b=%f cc=%04lx\n",\
  2217. #op, a1, b1,\
  2218. eflags & (CC_C | CC_P | CC_Z | CC_S | CC_O | CC_A));\
  2219. }
  2220. void test_sse_comi(double a1, double b1)
  2221. {
  2222. SSE_COMI(ucomiss, s);
  2223. SSE_COMI(ucomisd, d);
  2224. SSE_COMI(comiss, s);
  2225. SSE_COMI(comisd, d);
  2226. }
  2227. #define CVT_OP_XMM(op)\
  2228. {\
  2229. asm volatile (#op " %1, %0" : "+x" (r.dq) : "x" (a.dq));\
  2230. printf("%-9s: a=" FMT64X "" FMT64X " r=" FMT64X "" FMT64X "\n",\
  2231. #op,\
  2232. a.q[1], a.q[0],\
  2233. r.q[1], r.q[0]);\
  2234. }
  2235. /* Force %xmm0 usage to avoid the case where both register index are 0
  2236. to test instruction decoding more extensively */
  2237. #define CVT_OP_XMM2MMX(op)\
  2238. {\
  2239. asm volatile (#op " %1, %0" : "=y" (r.q[0]) : "x" (a.dq) \
  2240. : "%xmm0"); \
  2241. asm volatile("emms\n"); \
  2242. printf("%-9s: a=" FMT64X "" FMT64X " r=" FMT64X "\n",\
  2243. #op,\
  2244. a.q[1], a.q[0],\
  2245. r.q[0]);\
  2246. }
  2247. #define CVT_OP_MMX2XMM(op)\
  2248. {\
  2249. asm volatile (#op " %1, %0" : "=x" (r.dq) : "y" (a.q[0]));\
  2250. asm volatile("emms\n"); \
  2251. printf("%-9s: a=" FMT64X " r=" FMT64X "" FMT64X "\n",\
  2252. #op,\
  2253. a.q[0],\
  2254. r.q[1], r.q[0]);\
  2255. }
  2256. #define CVT_OP_REG2XMM(op)\
  2257. {\
  2258. asm volatile (#op " %1, %0" : "+x" (r.dq) : "r" (a.l[0]));\
  2259. printf("%-9s: a=%08x r=" FMT64X "" FMT64X "\n",\
  2260. #op,\
  2261. a.l[0],\
  2262. r.q[1], r.q[0]);\
  2263. }
  2264. #define CVT_OP_XMM2REG(op)\
  2265. {\
  2266. asm volatile (#op " %1, %0" : "=r" (r.l[0]) : "x" (a.dq));\
  2267. printf("%-9s: a=" FMT64X "" FMT64X " r=%08x\n",\
  2268. #op,\
  2269. a.q[1], a.q[0],\
  2270. r.l[0]);\
  2271. }
  2272. struct fpxstate {
  2273. uint16_t fpuc;
  2274. uint16_t fpus;
  2275. uint16_t fptag;
  2276. uint16_t fop;
  2277. uint32_t fpuip;
  2278. uint16_t cs_sel;
  2279. uint16_t dummy0;
  2280. uint32_t fpudp;
  2281. uint16_t ds_sel;
  2282. uint16_t dummy1;
  2283. uint32_t mxcsr;
  2284. uint32_t mxcsr_mask;
  2285. uint8_t fpregs1[8 * 16];
  2286. uint8_t xmm_regs[8 * 16];
  2287. uint8_t dummy2[224];
  2288. };
  2289. static struct fpxstate fpx_state __attribute__((aligned(16)));
  2290. static struct fpxstate fpx_state2 __attribute__((aligned(16)));
  2291. void test_fxsave(void)
  2292. {
  2293. struct fpxstate *fp = &fpx_state;
  2294. struct fpxstate *fp2 = &fpx_state2;
  2295. int i, nb_xmm;
  2296. XMMReg a, b;
  2297. a.q[0] = test_values[0][0];
  2298. a.q[1] = test_values[0][1];
  2299. b.q[0] = test_values[1][0];
  2300. b.q[1] = test_values[1][1];
  2301. asm("movdqa %2, %%xmm0\n"
  2302. "movdqa %3, %%xmm7\n"
  2303. #if defined(__x86_64__)
  2304. "movdqa %2, %%xmm15\n"
  2305. #endif
  2306. " fninit\n"
  2307. " fld1\n"
  2308. " fld1\n"
  2309. " fldz\n"
  2310. " fxsave %0\n"
  2311. " fxrstor %0\n"
  2312. " fxsave %1\n"
  2313. " fninit\n"
  2314. : "=m" (*(uint32_t *)fp2), "=m" (*(uint32_t *)fp)
  2315. : "m" (a), "m" (b));
  2316. printf("fpuc=%04x\n", fp->fpuc);
  2317. printf("fpus=%04x\n", fp->fpus);
  2318. printf("fptag=%04x\n", fp->fptag);
  2319. for(i = 0; i < 3; i++) {
  2320. printf("ST%d: " FMT64X " %04x\n",
  2321. i,
  2322. *(uint64_t *)&fp->fpregs1[i * 16],
  2323. *(uint16_t *)&fp->fpregs1[i * 16 + 8]);
  2324. }
  2325. printf("mxcsr=%08x\n", fp->mxcsr & 0x1f80);
  2326. #if defined(__x86_64__)
  2327. nb_xmm = 16;
  2328. #else
  2329. nb_xmm = 8;
  2330. #endif
  2331. for(i = 0; i < nb_xmm; i++) {
  2332. printf("xmm%d: " FMT64X "" FMT64X "\n",
  2333. i,
  2334. *(uint64_t *)&fp->xmm_regs[i * 16],
  2335. *(uint64_t *)&fp->xmm_regs[i * 16 + 8]);
  2336. }
  2337. }
  2338. void test_sse(void)
  2339. {
  2340. XMMReg r, a, b;
  2341. int i;
  2342. MMX_OP2(punpcklbw);
  2343. MMX_OP2(punpcklwd);
  2344. MMX_OP2(punpckldq);
  2345. MMX_OP2(packsswb);
  2346. MMX_OP2(pcmpgtb);
  2347. MMX_OP2(pcmpgtw);
  2348. MMX_OP2(pcmpgtd);
  2349. MMX_OP2(packuswb);
  2350. MMX_OP2(punpckhbw);
  2351. MMX_OP2(punpckhwd);
  2352. MMX_OP2(punpckhdq);
  2353. MMX_OP2(packssdw);
  2354. MMX_OP2(pcmpeqb);
  2355. MMX_OP2(pcmpeqw);
  2356. MMX_OP2(pcmpeqd);
  2357. MMX_OP2(paddq);
  2358. MMX_OP2(pmullw);
  2359. MMX_OP2(psubusb);
  2360. MMX_OP2(psubusw);
  2361. MMX_OP2(pminub);
  2362. MMX_OP2(pand);
  2363. MMX_OP2(paddusb);
  2364. MMX_OP2(paddusw);
  2365. MMX_OP2(pmaxub);
  2366. MMX_OP2(pandn);
  2367. MMX_OP2(pmulhuw);
  2368. MMX_OP2(pmulhw);
  2369. MMX_OP2(psubsb);
  2370. MMX_OP2(psubsw);
  2371. MMX_OP2(pminsw);
  2372. MMX_OP2(por);
  2373. MMX_OP2(paddsb);
  2374. MMX_OP2(paddsw);
  2375. MMX_OP2(pmaxsw);
  2376. MMX_OP2(pxor);
  2377. MMX_OP2(pmuludq);
  2378. MMX_OP2(pmaddwd);
  2379. MMX_OP2(psadbw);
  2380. MMX_OP2(psubb);
  2381. MMX_OP2(psubw);
  2382. MMX_OP2(psubd);
  2383. MMX_OP2(psubq);
  2384. MMX_OP2(paddb);
  2385. MMX_OP2(paddw);
  2386. MMX_OP2(psrlw);
  2387. MMX_OP2(paddd);
  2388. MMX_OP2(pavgb);
  2389. MMX_OP2(pavgw);
  2390. asm volatile ("pinsrw $1, %1, %0" : "+y" (r.q[0]) : "r" (0x12345678));
  2391. printf("%-9s: r=" FMT64X "\n", "pinsrw", r.q[0]);
  2392. asm volatile ("pinsrw $5, %1, %0" : "+x" (r.dq) : "r" (0x12345678));
  2393. printf("%-9s: r=" FMT64X "" FMT64X "\n", "pinsrw", r.q[1], r.q[0]);
  2394. a.q[0] = test_values[0][0];
  2395. a.q[1] = test_values[0][1];
  2396. asm volatile ("pextrw $1, %1, %0" : "=r" (r.l[0]) : "y" (a.q[0]));
  2397. printf("%-9s: r=%08x\n", "pextrw", r.l[0]);
  2398. asm volatile ("pextrw $5, %1, %0" : "=r" (r.l[0]) : "x" (a.dq));
  2399. printf("%-9s: r=%08x\n", "pextrw", r.l[0]);
  2400. asm volatile ("pmovmskb %1, %0" : "=r" (r.l[0]) : "y" (a.q[0]));
  2401. printf("%-9s: r=%08x\n", "pmovmskb", r.l[0]);
  2402. asm volatile ("pmovmskb %1, %0" : "=r" (r.l[0]) : "x" (a.dq));
  2403. printf("%-9s: r=%08x\n", "pmovmskb", r.l[0]);
  2404. {
  2405. r.q[0] = -1;
  2406. r.q[1] = -1;
  2407. a.q[0] = test_values[0][0];
  2408. a.q[1] = test_values[0][1];
  2409. b.q[0] = test_values[1][0];
  2410. b.q[1] = test_values[1][1];
  2411. asm volatile("maskmovq %1, %0" :
  2412. : "y" (a.q[0]), "y" (b.q[0]), "D" (&r)
  2413. : "memory");
  2414. printf("%-9s: r=" FMT64X " a=" FMT64X " b=" FMT64X "\n",
  2415. "maskmov",
  2416. r.q[0],
  2417. a.q[0],
  2418. b.q[0]);
  2419. asm volatile("maskmovdqu %1, %0" :
  2420. : "x" (a.dq), "x" (b.dq), "D" (&r)
  2421. : "memory");
  2422. printf("%-9s: r=" FMT64X "" FMT64X " a=" FMT64X "" FMT64X " b=" FMT64X "" FMT64X "\n",
  2423. "maskmov",
  2424. r.q[1], r.q[0],
  2425. a.q[1], a.q[0],
  2426. b.q[1], b.q[0]);
  2427. }
  2428. asm volatile ("emms");
  2429. SSE_OP2(punpcklqdq);
  2430. SSE_OP2(punpckhqdq);
  2431. SSE_OP2(andps);
  2432. SSE_OP2(andpd);
  2433. SSE_OP2(andnps);
  2434. SSE_OP2(andnpd);
  2435. SSE_OP2(orps);
  2436. SSE_OP2(orpd);
  2437. SSE_OP2(xorps);
  2438. SSE_OP2(xorpd);
  2439. SSE_OP2(unpcklps);
  2440. SSE_OP2(unpcklpd);
  2441. SSE_OP2(unpckhps);
  2442. SSE_OP2(unpckhpd);
  2443. SHUF_OP(shufps, 0x78);
  2444. SHUF_OP(shufpd, 0x02);
  2445. SHUF_OP_MMX(pshufw, 0x78);
  2446. SHUF_OP_MMX(pshufw, 0x02);
  2447. PSHUF_OP(pshufd, 0x78);
  2448. PSHUF_OP(pshuflw, 0x78);
  2449. PSHUF_OP(pshufhw, 0x78);
  2450. SHIFT_OP(psrlw, 0);
  2451. SHIFT_OP(psrlw, 7);
  2452. SHIFT_OP(psrlw, 15);
  2453. SHIFT_OP(psrlw, 16);
  2454. SHIFT_REG(psrlw, 0x100000000);
  2455. SHIFT_REG_MMX(psrlw, 0x100000000);
  2456. SHIFT_OP(psraw, 0);
  2457. SHIFT_OP(psraw, 7);
  2458. SHIFT_OP(psraw, 15);
  2459. SHIFT_OP(psraw, 16);
  2460. SHIFT_REG(psraw, 0x100000000);
  2461. SHIFT_REG_MMX(psraw, 0x100000000);
  2462. SHIFT_OP(psllw, 0);
  2463. SHIFT_OP(psllw, 7);
  2464. SHIFT_OP(psllw, 15);
  2465. SHIFT_OP(psllw, 16);
  2466. SHIFT_REG(psllw, 0x100000000);
  2467. SHIFT_REG_MMX(psllw, 0x100000000);
  2468. SHIFT_OP(psrld, 0);
  2469. SHIFT_OP(psrld, 7);
  2470. SHIFT_OP(psrld, 31);
  2471. SHIFT_OP(psrld, 32);
  2472. SHIFT_REG(psrld, 0x100000000);
  2473. SHIFT_REG_MMX(psrld, 0x100000000);
  2474. SHIFT_OP(psrad, 0);
  2475. SHIFT_OP(psrad, 7);
  2476. SHIFT_OP(psrad, 31);
  2477. SHIFT_OP(psrad, 32);
  2478. SHIFT_REG(psrad, 0x100000000);
  2479. SHIFT_REG_MMX(psrad, 0x100000000);
  2480. SHIFT_OP(pslld, 0);
  2481. SHIFT_OP(pslld, 7);
  2482. SHIFT_OP(pslld, 31);
  2483. SHIFT_OP(pslld, 32);
  2484. SHIFT_REG(pslld, 0x100000000);
  2485. SHIFT_REG_MMX(pslld, 0x100000000);
  2486. SHIFT_OP(psrlq, 0);
  2487. SHIFT_OP(psrlq, 7);
  2488. SHIFT_OP(psrlq, 32);
  2489. SHIFT_OP(psrlq, 63);
  2490. SHIFT_OP(psrlq, 64);
  2491. SHIFT_REG(psrlq, 0x100000000);
  2492. SHIFT_REG_MMX(psrlq, 0x100000000);
  2493. SHIFT_OP(psllq, 0);
  2494. SHIFT_OP(psllq, 7);
  2495. SHIFT_OP(psllq, 32);
  2496. SHIFT_OP(psllq, 63);
  2497. SHIFT_OP(psllq, 64);
  2498. SHIFT_REG(psllq, 0x100000000);
  2499. SHIFT_REG_MMX(psllq, 0x100000000);
  2500. // byte-wise shifts
  2501. SHIFT_IM(psrldq, 0);
  2502. SHIFT_IM(psrldq, 1);
  2503. SHIFT_IM(psrldq, 7);
  2504. SHIFT_IM(psrldq, 8);
  2505. SHIFT_IM(psrldq, 11);
  2506. SHIFT_IM(psrldq, 15);
  2507. SHIFT_IM(psrldq, 16);
  2508. SHIFT_IM(pslldq, 0);
  2509. SHIFT_IM(pslldq, 1);
  2510. SHIFT_IM(pslldq, 7);
  2511. SHIFT_IM(pslldq, 8);
  2512. SHIFT_IM(pslldq, 11);
  2513. SHIFT_IM(pslldq, 15);
  2514. SHIFT_IM(pslldq, 16);
  2515. MOVMSK(movmskps);
  2516. MOVMSK(movmskpd);
  2517. /* FPU specific ops */
  2518. {
  2519. uint32_t mxcsr;
  2520. asm volatile("stmxcsr %0" : "=m" (mxcsr));
  2521. printf("mxcsr=%08x\n", mxcsr & 0x1f80);
  2522. asm volatile("ldmxcsr %0" : : "m" (mxcsr));
  2523. }
  2524. asm volatile ("emms");
  2525. test_sse_comi(2, -1);
  2526. test_sse_comi(2, 2);
  2527. test_sse_comi(2, 3);
  2528. test_sse_comi(2, q_nan.d);
  2529. test_sse_comi(q_nan.d, -1);
  2530. for(i = 0; i < 2; i++) {
  2531. a.s[0] = 2.7;
  2532. a.s[1] = 3.4;
  2533. a.s[2] = 4;
  2534. a.s[3] = -6.3;
  2535. b.s[0] = 45.7;
  2536. b.s[1] = 353.4;
  2537. b.s[2] = 4;
  2538. b.s[3] = 56.3;
  2539. if (i == 1) {
  2540. a.s[0] = q_nan.d;
  2541. b.s[3] = q_nan.d;
  2542. }
  2543. SSE_OPS(add);
  2544. SSE_OPS(mul);
  2545. SSE_OPS(sub);
  2546. SSE_OPS(min);
  2547. SSE_OPS(div);
  2548. SSE_OPS(max);
  2549. SSE_OPS(sqrt);
  2550. SSE_OPS(cmpeq);
  2551. SSE_OPS(cmplt);
  2552. SSE_OPS(cmple);
  2553. SSE_OPS(cmpunord);
  2554. SSE_OPS(cmpneq);
  2555. SSE_OPS(cmpnlt);
  2556. SSE_OPS(cmpnle);
  2557. SSE_OPS(cmpord);
  2558. a.d[0] = 2.7;
  2559. a.d[1] = -3.4;
  2560. b.d[0] = 45.7;
  2561. b.d[1] = -53.4;
  2562. if (i == 1) {
  2563. a.d[0] = q_nan.d;
  2564. b.d[1] = q_nan.d;
  2565. }
  2566. SSE_OPD(add);
  2567. SSE_OPD(mul);
  2568. SSE_OPD(sub);
  2569. SSE_OPD(min);
  2570. SSE_OPD(div);
  2571. SSE_OPD(max);
  2572. SSE_OPD(sqrt);
  2573. SSE_OPD(cmpeq);
  2574. SSE_OPD(cmplt);
  2575. SSE_OPD(cmple);
  2576. SSE_OPD(cmpunord);
  2577. SSE_OPD(cmpneq);
  2578. SSE_OPD(cmpnlt);
  2579. SSE_OPD(cmpnle);
  2580. SSE_OPD(cmpord);
  2581. }
  2582. // approximating instructions: Pick some nice round values
  2583. a.s[0] = 1024.0;
  2584. a.s[1] = 1.0 / 256.0;
  2585. b.s[0] = 1024.0;
  2586. b.s[1] = 1.0 / 256.0;
  2587. SSE_OPS(rsqrt);
  2588. SSE_OPS(rcp);
  2589. /* float to float/int */
  2590. a.s[0] = 2.7;
  2591. a.s[1] = 3.4;
  2592. a.s[2] = 4;
  2593. a.s[3] = -6.3;
  2594. CVT_OP_XMM(cvtps2pd);
  2595. CVT_OP_XMM(cvtss2sd);
  2596. CVT_OP_XMM2MMX(cvtps2pi);
  2597. CVT_OP_XMM2MMX(cvttps2pi);
  2598. CVT_OP_XMM2REG(cvtss2si);
  2599. CVT_OP_XMM2REG(cvttss2si);
  2600. CVT_OP_XMM(cvtps2dq);
  2601. CVT_OP_XMM(cvttps2dq);
  2602. a.d[0] = 2.6;
  2603. a.d[1] = -3.4;
  2604. CVT_OP_XMM(cvtpd2ps);
  2605. CVT_OP_XMM(cvtsd2ss);
  2606. CVT_OP_XMM2MMX(cvtpd2pi);
  2607. CVT_OP_XMM2MMX(cvttpd2pi);
  2608. CVT_OP_XMM2REG(cvtsd2si);
  2609. CVT_OP_XMM2REG(cvttsd2si);
  2610. CVT_OP_XMM(cvtpd2dq);
  2611. CVT_OP_XMM(cvttpd2dq);
  2612. /* sse/mmx moves */
  2613. CVT_OP_XMM2MMX(movdq2q);
  2614. CVT_OP_MMX2XMM(movq2dq);
  2615. /* int to float */
  2616. a.l[0] = -6;
  2617. a.l[1] = 2;
  2618. a.l[2] = 100;
  2619. a.l[3] = -60000;
  2620. CVT_OP_MMX2XMM(cvtpi2ps);
  2621. CVT_OP_MMX2XMM(cvtpi2pd);
  2622. CVT_OP_REG2XMM(cvtsi2ss);
  2623. CVT_OP_REG2XMM(cvtsi2sd);
  2624. CVT_OP_XMM(cvtdq2ps);
  2625. CVT_OP_XMM(cvtdq2pd);
  2626. /* XXX: test PNI insns */
  2627. #if 0
  2628. SSE_OP2(movshdup);
  2629. #endif
  2630. asm volatile ("emms");
  2631. }
  2632. #endif
  2633. #define TEST_CONV_RAX(op)\
  2634. {\
  2635. unsigned long a, r;\
  2636. a = i2l(0x8234a6f8);\
  2637. r = a;\
  2638. asm volatile(#op : "=a" (r) : "0" (r));\
  2639. printf("%-10s A=" FMTLX " R=" FMTLX "\n", #op, a, r);\
  2640. }
  2641. #define TEST_CONV_RAX_RDX(op)\
  2642. {\
  2643. unsigned long a, d, r, rh; \
  2644. a = i2l(0x8234a6f8);\
  2645. d = i2l(0x8345a1f2);\
  2646. r = a;\
  2647. rh = d;\
  2648. asm volatile(#op : "=a" (r), "=d" (rh) : "0" (r), "1" (rh)); \
  2649. printf("%-10s A=" FMTLX " R=" FMTLX ":" FMTLX "\n", #op, a, r, rh); \
  2650. }
  2651. void test_conv(void)
  2652. {
  2653. TEST_CONV_RAX(cbw);
  2654. TEST_CONV_RAX(cwde);
  2655. #if defined(__x86_64__)
  2656. TEST_CONV_RAX(cdqe);
  2657. #endif
  2658. TEST_CONV_RAX_RDX(cwd);
  2659. TEST_CONV_RAX_RDX(cdq);
  2660. #if defined(__x86_64__)
  2661. TEST_CONV_RAX_RDX(cqo);
  2662. #endif
  2663. {
  2664. unsigned long a, r;
  2665. a = i2l(0x12345678);
  2666. asm volatile("bswapl %k0" : "=r" (r) : "0" (a));
  2667. printf("%-10s: A=" FMTLX " R=" FMTLX "\n", "bswapl", a, r);
  2668. }
  2669. #if defined(__x86_64__)
  2670. {
  2671. unsigned long a, r;
  2672. a = i2l(0x12345678);
  2673. asm volatile("bswapq %0" : "=r" (r) : "0" (a));
  2674. printf("%-10s: A=" FMTLX " R=" FMTLX "\n", "bswapq", a, r);
  2675. }
  2676. #endif
  2677. }
  2678. void byte_read(uint8_t* buffer, uint16_t offset, size_t num_bytes)
  2679. {
  2680. uint64_t v1 = 0;
  2681. for(size_t i = 0; i < num_bytes && i < 8; i++)
  2682. {
  2683. if(setjmp(jmp_env) == 0)
  2684. {
  2685. v1 |= (uint64_t)buffer[offset + i] << (i * 8);
  2686. }
  2687. }
  2688. uint64_t v2 = 0;
  2689. for(size_t i = 8; i < num_bytes; i++)
  2690. {
  2691. if(setjmp(jmp_env) == 0)
  2692. {
  2693. v2 |= (uint64_t)buffer[offset + i] << ((i - 8) * 8);
  2694. }
  2695. }
  2696. if(num_bytes > 8)
  2697. {
  2698. printf("%-12s: offset=%x value=%08llx%08llx\n", "byte_r", offset, v2, v1);
  2699. }
  2700. else
  2701. {
  2702. printf("%-12s: offset=%x value=%llx\n", "byte_r", offset, v1);
  2703. }
  2704. }
  2705. uint64_t seq_counter = 0x8070605040302010;
  2706. uint64_t get_seq64()
  2707. {
  2708. seq_counter += 0x0101010101010101;
  2709. return seq_counter;
  2710. }
  2711. void byte_write_seq(uint8_t* target, uint16_t offset, size_t num_bytes)
  2712. {
  2713. uint64_t v = get_seq64();
  2714. if(num_bytes < 8) v &= (1LL << (num_bytes * 8)) - 1;
  2715. for(size_t i = 0; i < num_bytes; i++)
  2716. {
  2717. if(setjmp(jmp_env) == 0)
  2718. {
  2719. target[offset + i] = (v >> (i * 8 % 64)) & 0xFF;
  2720. }
  2721. }
  2722. if(num_bytes > 8)
  2723. {
  2724. printf("%-12s: offset=%x value=%08llx%08llx\n", "byte_w", offset, v, v);
  2725. }
  2726. else
  2727. {
  2728. printf("%-12s: offset=%x value=%llx\n", "byte_w", offset, v);
  2729. }
  2730. }
  2731. #define GENERATE_CHUNK_READ(INSTR, BITS, CONSTR) \
  2732. void chunk_read ## BITS(uint8_t* addr, uint16_t offset) \
  2733. { \
  2734. uint ## BITS ## _t chunk = 0; \
  2735. if(setjmp(jmp_env) == 0) { \
  2736. asm volatile(INSTR " %1, %0" : \
  2737. "=" CONSTR (chunk) : \
  2738. "m" (*(addr + offset)), "0" (chunk)); \
  2739. } \
  2740. printf("%-12s: offset=%x value=%" PRIx ## BITS "\n", \
  2741. "chunk" #BITS "_r", \
  2742. offset, \
  2743. chunk); \
  2744. }
  2745. #define GENERATE_CHUNK_WRITE(INSTR, BITS, CONSTR) \
  2746. void chunk_write ## BITS(uint8_t* addr, uint16_t offset) \
  2747. { \
  2748. uint ## BITS ## _t chunk = get_seq64(); \
  2749. if(setjmp(jmp_env) == 0) { \
  2750. asm volatile(INSTR " %0, %1" : \
  2751. "=" CONSTR (chunk) : \
  2752. "m" (*(addr + offset)), "0" (chunk)); \
  2753. } \
  2754. printf("%-12s: offset=%x value=%" PRIx ## BITS "\n", \
  2755. "chunk" #BITS "_w", \
  2756. offset, \
  2757. chunk); \
  2758. }
  2759. #define GENERATE_CHUNK_FNS(INSTR, BITS, CONSTR) \
  2760. GENERATE_CHUNK_READ(INSTR, BITS, CONSTR) \
  2761. GENERATE_CHUNK_WRITE(INSTR, BITS, CONSTR)
  2762. #define TEST_CHUNK_READ(BITS, ADDR, OFFSET) \
  2763. byte_write_seq(ADDR, OFFSET, (BITS) >> 3); \
  2764. chunk_read ## BITS(ADDR, OFFSET);
  2765. #define TEST_CHUNK_WRITE(BITS, ADDR, OFFSET) \
  2766. if(!skip_write_test) { \
  2767. byte_write_seq(ADDR, OFFSET, (BITS) >> 3); \
  2768. mask_pf_address = 1; \
  2769. chunk_write ## BITS(ADDR, OFFSET); \
  2770. mask_pf_address = 0; \
  2771. byte_read(ADDR, OFFSET, (BITS) >> 3); \
  2772. }
  2773. #define TEST_CHUNK_READ_WRITE(BITS, ADDR, OFFSET) \
  2774. if(BITS <= 32) { \
  2775. byte_write_seq(ADDR, OFFSET, (BITS) >> 3); \
  2776. mask_pf_error = 1; \
  2777. mask_pf_address = 1; \
  2778. chunk_read_write ## BITS(ADDR, OFFSET); \
  2779. mask_pf_address = 0; \
  2780. mask_pf_error = 0; \
  2781. byte_read(ADDR, OFFSET, (BITS) >> 3); \
  2782. }
  2783. // Based on BITS, we calculate the offset where cross-page reads/writes would begin
  2784. #define TEST_CROSS_PAGE(BITS, ADDR) \
  2785. for(size_t offset = (PAGE_SIZE + 1 - (BITS >> 3)); \
  2786. offset < PAGE_SIZE; offset++) \
  2787. { \
  2788. TEST_CHUNK_READ(BITS, ADDR, offset); \
  2789. TEST_CHUNK_WRITE(BITS, ADDR, offset); \
  2790. TEST_CHUNK_READ_WRITE(BITS, ADDR, offset); \
  2791. }
  2792. GENERATE_CHUNK_FNS("movw", 16, "r");
  2793. GENERATE_CHUNK_FNS("mov", 32, "r");
  2794. #ifdef TEST_SSE
  2795. GENERATE_CHUNK_FNS("movq", 64, "y");
  2796. void chunk_read_write16(uint8_t* addr, uint16_t offset)
  2797. {
  2798. uint16_t chunk = get_seq64();
  2799. if(setjmp(jmp_env) == 0)
  2800. {
  2801. asm volatile("addw %0, %1" :
  2802. "=r" (chunk) :
  2803. "m" (*(addr + offset)), "0" (chunk));
  2804. }
  2805. printf("%-12s: offset=%x value=%" PRIx16 "\n",
  2806. "chunk16_rw",
  2807. offset,
  2808. chunk);
  2809. }
  2810. void chunk_read_write32(uint8_t* addr, uint16_t offset)
  2811. {
  2812. uint32_t chunk = get_seq64();
  2813. if(setjmp(jmp_env) == 0)
  2814. {
  2815. asm volatile("add %0, %1" :
  2816. "=r" (chunk) :
  2817. "m" (*(addr + offset)), "0" (chunk));
  2818. }
  2819. printf("%-12s: offset=%x value=%" PRIx32 "\n",
  2820. "chunk32_rw",
  2821. offset,
  2822. chunk);
  2823. }
  2824. // No 64 or 128-bit read-write x86 instructions support a memory address as the destination
  2825. void chunk_read_write64(uint8_t* addr, uint16_t offset)
  2826. {
  2827. UNUSED(addr);
  2828. UNUSED(offset);
  2829. }
  2830. void chunk_read_write128(uint8_t* addr, uint16_t offset)
  2831. {
  2832. UNUSED(addr);
  2833. UNUSED(offset);
  2834. }
  2835. void chunk_read128(uint8_t* addr, uint16_t offset)
  2836. {
  2837. XMMReg chunk;
  2838. chunk.q[0] = chunk.q[1] = 0.0;
  2839. if(setjmp(jmp_env) == 0)
  2840. {
  2841. asm volatile("movdqu %1, %0" :
  2842. "=x" (chunk.dq) :
  2843. "m" (*(addr + offset)), "0" (chunk.dq)
  2844. );
  2845. }
  2846. printf("%-12s: offset=%x value=" FMT64X FMT64X "\n",
  2847. "chunk128_r",
  2848. offset,
  2849. chunk.q[1],
  2850. chunk.q[0]);
  2851. }
  2852. void chunk_write128(uint8_t* addr, uint16_t offset)
  2853. {
  2854. XMMReg chunk;
  2855. chunk.q[0] = get_seq64();
  2856. chunk.q[1] = get_seq64();
  2857. if(setjmp(jmp_env) == 0)
  2858. {
  2859. asm volatile("movdqu %0, %1" :
  2860. "=x" (chunk.dq) :
  2861. "m" (*(addr + offset)), "0" (chunk.dq)
  2862. );
  2863. }
  2864. printf("%-12s: offset=%x value=" FMT64X FMT64X "\n",
  2865. "chunk128_w",
  2866. offset,
  2867. chunk.q[1],
  2868. chunk.q[0]);
  2869. }
  2870. #endif
  2871. void* const TEST_ADDRESS = (void *)0x70000000;
  2872. uint8_t* first_page = NULL;
  2873. uint8_t* second_page = NULL;
  2874. uint8_t* throwaway_page = NULL;
  2875. void setup_pages(int first_page_type, int second_page_type)
  2876. {
  2877. const int prot = PROT_READ | PROT_WRITE;
  2878. if(first_page_type)
  2879. {
  2880. // mmap 2 consecutive pages
  2881. first_page = mmap(TEST_ADDRESS, 2 * PAGE_SIZE, prot, MAP_PRIVATE | MAP_ANONYMOUS, -1, 0);
  2882. assert(first_page == TEST_ADDRESS);
  2883. }
  2884. else
  2885. {
  2886. first_page = NULL;
  2887. }
  2888. // throwaway mmap to reduce likelhood of first_page and second_page mapping to consecutive physical frames
  2889. throwaway_page = mmap(NULL, PAGE_SIZE, prot, MAP_PRIVATE | MAP_ANONYMOUS, -1, 0);
  2890. assert(throwaway_page != MAP_FAILED && throwaway_page != TEST_ADDRESS && throwaway_page != TEST_ADDRESS + PAGE_SIZE);
  2891. if(second_page_type)
  2892. {
  2893. second_page = mmap(TEST_ADDRESS + PAGE_SIZE, PAGE_SIZE, prot, MAP_PRIVATE | MAP_ANONYMOUS | MAP_FIXED, -1, 0);
  2894. assert(second_page == TEST_ADDRESS + PAGE_SIZE);
  2895. }
  2896. else
  2897. {
  2898. munmap(TEST_ADDRESS + PAGE_SIZE, PAGE_SIZE);
  2899. second_page = NULL;
  2900. }
  2901. // Trigger page-faults causing virtual pages to be allocated to physical frames
  2902. if(first_page != NULL) memset(first_page, 0x42, PAGE_SIZE);
  2903. memset(throwaway_page, 0x42, PAGE_SIZE);
  2904. if(second_page != NULL) memset(second_page, 0x42, PAGE_SIZE);
  2905. if(first_page_type == PROT_READ)
  2906. {
  2907. mprotect(first_page, PAGE_SIZE, PROT_READ);
  2908. }
  2909. if(second_page_type == PROT_READ)
  2910. {
  2911. mprotect(second_page, PAGE_SIZE, PROT_READ);
  2912. }
  2913. }
  2914. void free_pages()
  2915. {
  2916. munmap(TEST_ADDRESS, PAGE_SIZE);
  2917. munmap(TEST_ADDRESS + PAGE_SIZE, PAGE_SIZE);
  2918. munmap(throwaway_page, PAGE_SIZE);
  2919. }
  2920. // XXX: Workarounds for qemu bugs: Can be removed when running tests in kvm mode
  2921. int mask_pf_error = 0;
  2922. int mask_pf_address = 0;
  2923. int skip_write_test = 0;
  2924. void pagefault_handler(int sig, siginfo_t *info, void *puc)
  2925. {
  2926. ucontext_t *uc = puc;
  2927. printf("page fault: addr=0x%08lx err=0x%lx eip=0x%08lx\n",
  2928. (unsigned long)info->si_addr & (mask_pf_address ? ~0xfff : ~0),
  2929. (long)uc->uc_mcontext.gregs[REG_ERR] & (mask_pf_error ? ~2 : ~0),
  2930. (long)uc->uc_mcontext.gregs[REG_EIP]);
  2931. assert(info->si_addr >= TEST_ADDRESS && info->si_addr < TEST_ADDRESS + 2 * PAGE_SIZE);
  2932. longjmp(jmp_env, 1);
  2933. }
  2934. void test_page_boundaries()
  2935. {
  2936. const int prot_rw = PROT_READ | PROT_WRITE;
  2937. const int prot_ronly = PROT_READ;
  2938. setup_pages(prot_rw, prot_rw);
  2939. TEST_CROSS_PAGE(16, TEST_ADDRESS);
  2940. TEST_CROSS_PAGE(32, TEST_ADDRESS);
  2941. #ifdef TEST_SSE
  2942. TEST_CROSS_PAGE(64, TEST_ADDRESS);
  2943. TEST_CROSS_PAGE(128, TEST_ADDRESS);
  2944. #endif
  2945. struct sigaction act;
  2946. act.sa_sigaction = pagefault_handler;
  2947. sigemptyset(&act.sa_mask);
  2948. act.sa_flags = SA_SIGINFO | SA_NODEFER;
  2949. sigaction(SIGSEGV, &act, NULL);
  2950. free_pages();
  2951. printf("With non-present page faults in first page:\n");
  2952. setup_pages(0, prot_rw);
  2953. TEST_CROSS_PAGE(16, TEST_ADDRESS);
  2954. TEST_CROSS_PAGE(32, TEST_ADDRESS);
  2955. #ifdef TEST_SSE
  2956. TEST_CROSS_PAGE(64, TEST_ADDRESS);
  2957. TEST_CROSS_PAGE(128, TEST_ADDRESS);
  2958. #endif
  2959. free_pages();
  2960. printf("With read-only page faults in first page:\n");
  2961. setup_pages(prot_ronly, prot_rw);
  2962. TEST_CROSS_PAGE(16, TEST_ADDRESS);
  2963. TEST_CROSS_PAGE(32, TEST_ADDRESS);
  2964. #ifdef TEST_SSE
  2965. TEST_CROSS_PAGE(64, TEST_ADDRESS);
  2966. TEST_CROSS_PAGE(128, TEST_ADDRESS);
  2967. #endif
  2968. free_pages();
  2969. printf("With non-present page faults in second page:\n");
  2970. setup_pages(prot_rw, 0);
  2971. TEST_CROSS_PAGE(16, TEST_ADDRESS);
  2972. TEST_CROSS_PAGE(32, TEST_ADDRESS);
  2973. #ifdef TEST_SSE
  2974. TEST_CROSS_PAGE(64, TEST_ADDRESS);
  2975. skip_write_test = 1;
  2976. TEST_CROSS_PAGE(128, TEST_ADDRESS);
  2977. skip_write_test = 0;
  2978. #endif
  2979. free_pages();
  2980. printf("With read-only page faults in second page:\n");
  2981. setup_pages(prot_rw, prot_ronly);
  2982. TEST_CROSS_PAGE(16, TEST_ADDRESS);
  2983. TEST_CROSS_PAGE(32, TEST_ADDRESS);
  2984. #ifdef TEST_SSE
  2985. TEST_CROSS_PAGE(64, TEST_ADDRESS);
  2986. skip_write_test = 1;
  2987. TEST_CROSS_PAGE(128, TEST_ADDRESS);
  2988. skip_write_test = 0;
  2989. #endif
  2990. }
  2991. extern void *__start_initcall;
  2992. extern void *__stop_initcall;
  2993. int main(int argc, char **argv)
  2994. {
  2995. // Uncomment to disable buffering, useful for debugging segfaults
  2996. //setvbuf(stdout, NULL, _IONBF, 0);
  2997. void **ptr;
  2998. void (*func)(void);
  2999. ptr = &__start_initcall;
  3000. while (ptr != &__stop_initcall) {
  3001. func = *ptr++;
  3002. func();
  3003. }
  3004. test_bsx();
  3005. test_popcnt();
  3006. test_mul();
  3007. test_jcc();
  3008. test_loop();
  3009. test_floats();
  3010. #if !defined(__x86_64__)
  3011. test_bcd();
  3012. #endif
  3013. test_xchg();
  3014. test_string();
  3015. test_misc();
  3016. test_lea();
  3017. #ifdef TEST_SEGS
  3018. test_segs();
  3019. test_code16();
  3020. #endif
  3021. #ifdef TEST_VM86
  3022. test_vm86();
  3023. #endif
  3024. #if !defined(__x86_64__)
  3025. test_exceptions();
  3026. test_self_modifying_code();
  3027. //test_single_step();
  3028. #endif
  3029. test_enter();
  3030. test_conv();
  3031. #ifdef TEST_SSE
  3032. test_sse();
  3033. test_fxsave();
  3034. #endif
  3035. test_page_boundaries();
  3036. return 0;
  3037. }