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x86_table.js

x86_table.js 47 KB
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  1. "use strict";
    2. 

  2. 

  3. const { hex } = require("./util");
    4. 

  4. 

  5. // http://ref.x86asm.net/coder32.html
    6. 

  6. 

  7. const zf = 1 << 6;
    8. 

  8. const of = 1 << 11;
    9. 

  9. const cf = 1 << 0;
    10. 

  10. const af = 1 << 4;
    11. 

  11. const pf = 1 << 2;
    12. 

  12. const sf = 1 << 7;
    13. 

  13. 

  14. // Test intel-specific behaviour
    15. 

  15. // Setting this to true can make some tests fail
    16. 

  16. const TESTS_ASSUME_INTEL = false;
    17. 

  17. 

  18. // === Types of instructions
    19. 

  19. //
    20. 

  20. // create entry | check for compiled code | instruction
    21. 

  21. // -------------+-------------------------+-----------------------------------------------------------
    22. 

  22. //      1       |        optional         | pop ds (may change cpu state)
    23. 

  23. //              |                         | trigger_ud, div (exception that doesn't generate conditional return from BB)
    24. 

  24. //              |                         | port io, popf, sti (may call interrupt or continue at next instruction)
    25. 

  25. //              |                         | hlt
    26. 

  26. // -------------+-------------------------+-----------------------------------------------------------
    27. 

  27. //      1       |            1            | call [eax], jmp [eax], int, iret, ret, jmpf, callf, sysenter, sysexit
    28. 

  28. //              |                         | Special case: normal instruction with fallthough to next page
    29. 

  29. //              |                         | Special case: after execution of compiled code
    30. 

  30. //              |                         | -> may create redundant entry points depending on last instruction?
    31. 

  31. // -------------+-------------------------+-----------------------------------------------------------
    32. 

  32. //      1       |            0            | rep movs, rep lods, rep stos, rep cmps, rep scas
    33. 

  33. //              |                         | -> Executed as follows:
    34. 

  34. //              |                         |   - Upto including the first call in compiled mode
    35. 

  35. //              |                         |   - Back to main loop and repeated in interpreted mode (as entry point is after instruction, not on)
    36. 

  36. //              |                         |   - When finished entry pointer *after* instruction is hit and execution continues in compiled mode
    37. 

  37. // -------------+-------------------------+-----------------------------------------------------------
    38. 

  38. //      0       |        optional         | jmp foo, jnz foo
    39. 

  39. //              |                         | (foo is in the same page as the instruction)
    40. 

  40. // -------------+-------------------------+-----------------------------------------------------------
    41. 

  41. //      1       |            1            | call foo
    42. 

  42. //              |                         | (foo is in the same page as the instruction)
    43. 

  43. //              |                         | -> The entry point is not created for jumps within
    44. 

  44. //              |                         |    this page, but speculatively for calls from
    45. 

  45. //              |                         |    other pages to the function in this page
    46. 

  46. // -------------+-------------------------+-----------------------------------------------------------
    47. 

  47. //      1       |            1            | call foo, jmp foo, jnz foo
    48. 

  48. //              |                         | (foo is in a different page than the instruction)
    49. 

  49. 

  50. 

  51. // e: a modrm byte follows the operand
    52. 

  52. // os: the instruction behaves differently depending on the operand size
    53. 

  53. // fixed_g: the reg field of the modrm byte selects an instruction
    54. 

  54. // skip: skip automatically generated tests (nasmtests)
    55. 

  55. // mask_flags: flags bits to mask in generated tests
    56. 

  56. // prefix: is a prefix instruction
    57. 

  57. // imm8, imm8s, imm16, imm1632, immaddr, extra_imm8, extra_imm16: one or two immediate bytes follows the instruction
    58. 

  58. // custom: will callback jit to generate custom code
    59. 

  59. // block_boundary: may change eip in a way not handled by the jit
    60. 

  60. // no_next_instruction: jit will stop analysing after instruction (e.g., unconditional jump, ret)
    61. 

  61. const encodings = [
    62. 

  62.     { opcode: 0x06, os: 1, custom: 1 },
    63. 

  63.     { opcode: 0x07, os: 1, skip: 1, block_boundary: 1 }, // pop es: block_boundary since it uses non-raising cpu exceptions
    64. 

  64.     { opcode: 0x0E, os: 1, custom: 1 },
    65. 

  65.     { opcode: 0x0F, os: 1, prefix: 1 },
    66. 

  66.     { opcode: 0x16, os: 1, custom: 1 },
    67. 

  67.     { opcode: 0x17, block_boundary: 1, os: 1, skip: 1 }, // pop ss
    68. 

  68.     { opcode: 0x1E, os: 1, custom: 1 },
    69. 

  69.     { opcode: 0x1F, block_boundary: 1, os: 1, skip: 1 }, // pop ds
    70. 

  70.     { opcode: 0x26, prefix: 1 },
    71. 

  71.     { opcode: 0x27, mask_flags: of },
    72. 

  72.     { opcode: 0x2E, prefix: 1 },
    73. 

  73.     { opcode: 0x2F, mask_flags: of },
    74. 

  74.     { opcode: 0x36, prefix: 1 },
    75. 

  75.     { opcode: 0x37, mask_flags: of | sf | pf | zf },
    76. 

  76.     { opcode: 0x3E, prefix: 1 },
    77. 

  77.     { opcode: 0x3F, mask_flags: of | sf | pf | zf },
    78. 

  78. 

  79.     { opcode: 0x60, os: 1, block_boundary: 1 }, // pusha
    80. 

  80.     { opcode: 0x61, os: 1, block_boundary: 1 }, // popa
    81. 

  81.     { opcode: 0x62, e: 1, skip: 1 },
    82. 

  82.     { opcode: 0x63, e: 1, block_boundary: 1 }, // arpl
    83. 

  83.     { opcode: 0x64, prefix: 1 },
    84. 

  84.     { opcode: 0x65, prefix: 1 },
    85. 

  85.     { opcode: 0x66, prefix: 1 },
    86. 

  86.     { opcode: 0x67, prefix: 1 },
    87. 

  87. 

  88.     { opcode: 0x68, custom: 1, os: 1, imm1632: 1 },
    89. 

  89.     { opcode: 0x69, os: 1, e: 1, custom: 1, imm1632: 1, mask_flags: TESTS_ASSUME_INTEL ? af : sf | zf | af | pf },
    90. 

  90.     { opcode: 0x6A, custom: 1, os: 1, imm8s: 1 },
    91. 

  91.     { opcode: 0x6B, os: 1, e: 1, custom: 1, imm8s: 1, mask_flags: TESTS_ASSUME_INTEL ? af : sf | zf | af | pf },
    92. 

  92. 

  93.     { opcode: 0x6C, block_boundary: 1, custom: 1, is_string: 1, skip: 1 },          // ins
    94. 

  94.     { opcode: 0xF26C, block_boundary: 1, custom: 1, is_string: 1, skip: 1 },
    95. 

  95.     { opcode: 0xF36C, block_boundary: 1, custom: 1, is_string: 1, skip: 1 },
    96. 

  96.     { opcode: 0x6D, block_boundary: 1, custom: 1, is_string: 1, os: 1, skip: 1 },
    97. 

  97.     { opcode: 0xF26D, block_boundary: 1, custom: 1, is_string: 1, os: 1, skip: 1 },
    98. 

  98.     { opcode: 0xF36D, block_boundary: 1, custom: 1, is_string: 1, os: 1, skip: 1 },
    99. 

  99. 

  100.     { opcode: 0x6E, block_boundary: 1, custom: 1, is_string: 1, skip: 1 },          // outs
    101. 

  101.     { opcode: 0xF26E, block_boundary: 1, custom: 1, is_string: 1, skip: 1 },
    102. 

  102.     { opcode: 0xF36E, block_boundary: 1, custom: 1, is_string: 1, skip: 1 },
    103. 

  103.     { opcode: 0x6F, block_boundary: 1, custom: 1, is_string: 1, os: 1, skip: 1 },
    104. 

  104.     { opcode: 0xF26F, block_boundary: 1, custom: 1, is_string: 1, os: 1, skip: 1 },
    105. 

  105.     { opcode: 0xF36F, block_boundary: 1, custom: 1, is_string: 1, os: 1, skip: 1 },
    106. 

  106. 

  107.     { opcode: 0x84, custom: 1, e: 1 },
    108. 

  108.     { opcode: 0x85, custom: 1, e: 1, os: 1 },
    109. 

  109.     { opcode: 0x86, custom: 1, e: 1 },
    110. 

  110.     { opcode: 0x87, custom: 1, os: 1, e: 1 },
    111. 

  111.     { opcode: 0x88, custom: 1, e: 1 },
    112. 

  112.     { opcode: 0x89, custom: 1, os: 1, e: 1 },
    113. 

  113.     { opcode: 0x8A, custom: 1, e: 1 },
    114. 

  114.     { opcode: 0x8B, custom: 1, os: 1, e: 1 },
    115. 

  115. 

  116.     { opcode: 0x8C, os: 1, e: 1, custom: 1, skip: 1 }, // mov reg, sreg
    117. 

  117.     { opcode: 0x8D, reg_ud: 1, os: 1, e: 1, custom_modrm_resolve: 1, custom: 1 }, // lea
    118. 

  118.     { opcode: 0x8E, block_boundary: 1, e: 1, skip: 1 }, // mov sreg
    119. 

  119.     { opcode: 0x8F, os: 1, e: 1, fixed_g: 0, custom_modrm_resolve: 1, custom: 1, block_boundary: 1 }, // pop r/m
    120. 

  120. 

  121.     { opcode: 0x90, custom: 1 },
    122. 

  122.     { opcode: 0x91, custom: 1, os: 1 },
    123. 

  123.     { opcode: 0x92, custom: 1, os: 1 },
    124. 

  124.     { opcode: 0x93, custom: 1, os: 1 },
    125. 

  125.     { opcode: 0x94, custom: 1, os: 1 },
    126. 

  126.     { opcode: 0x95, custom: 1, os: 1 },
    127. 

  127.     { opcode: 0x96, custom: 1, os: 1 },
    128. 

  128.     { opcode: 0x97, custom: 1, os: 1 },
    129. 

  129. 

  130.     { opcode: 0x98, os: 1, custom: 1 },
    131. 

  131.     { opcode: 0x99, os: 1, custom: 1 },
    132. 

  132.     { opcode: 0x9A, os: 1, imm1632: 1, extra_imm16: 1, skip: 1, block_boundary: 1 }, // callf
    133. 

  133.     { opcode: 0x9B, block_boundary: 1, skip: 1 }, // fwait: block_boundary since it uses non-raising cpu exceptions
    134. 

  134.     { opcode: 0x9C, os: 1, custom: 1, skip: 1 }, // pushf
    135. 

  135.     { opcode: 0x9D, os: 1, custom: 1, skip: 1 }, // popf
    136. 

  136.     { opcode: 0x9E, custom: 1 },
    137. 

  137.     { opcode: 0x9F, custom: 1 },
    138. 

  138. 

  139.     { opcode: 0xA0, custom: 1, immaddr: 1 },
    140. 

  140.     { opcode: 0xA1, custom: 1, os: 1, immaddr: 1 },
    141. 

  141.     { opcode: 0xA2, custom: 1, immaddr: 1 },
    142. 

  142.     { opcode: 0xA3, custom: 1, os: 1, immaddr: 1 },
    143. 

  143. 

  144.     // string instructions aren't jumps, but they modify eip due to how they're implemented
    145. 

  145.     { opcode: 0xA4, block_boundary: 0, custom: 1, is_string: 1 },
    146. 

  146.     { opcode: 0xF2A4, block_boundary: 1, custom: 1, is_string: 1 },
    147. 

  147.     { opcode: 0xF3A4, block_boundary: 1, custom: 1, is_string: 1 },
    148. 

  148.     { opcode: 0xA5, block_boundary: 0, custom: 1, is_string: 1, os: 1 },
    149. 

  149.     { opcode: 0xF2A5, block_boundary: 1, custom: 1, is_string: 1, os: 1 },
    150. 

  150.     { opcode: 0xF3A5, block_boundary: 1, custom: 1, is_string: 1, os: 1 },
    151. 

  151. 

  152.     { opcode: 0xA6, block_boundary: 1, custom: 1, is_string: 1 },
    153. 

  153.     { opcode: 0xF2A6, block_boundary: 1, custom: 1, is_string: 1 },
    154. 

  154.     { opcode: 0xF3A6, block_boundary: 1, custom: 1, is_string: 1 },
    155. 

  155.     { opcode: 0xA7, block_boundary: 1, custom: 1, is_string: 1, os: 1 },
    156. 

  156.     { opcode: 0xF2A7, block_boundary: 1, custom: 1, is_string: 1, os: 1 },
    157. 

  157.     { opcode: 0xF3A7, block_boundary: 1, custom: 1, is_string: 1, os: 1 },
    158. 

  158. 

  159.     { opcode: 0xA8, custom: 1, imm8: 1 },
    160. 

  160.     { opcode: 0xA9, custom: 1, os: 1, imm1632: 1 },
    161. 

  161. 

  162.     { opcode: 0xAA, block_boundary: 0, custom: 1, is_string: 1 },
    163. 

  163.     { opcode: 0xF2AA, block_boundary: 1, custom: 1, is_string: 1 },
    164. 

  164.     { opcode: 0xF3AA, block_boundary: 1, custom: 1, is_string: 1 },
    165. 

  165.     { opcode: 0xAB, block_boundary: 0, custom: 1, is_string: 1, os: 1 },
    166. 

  166.     { opcode: 0xF2AB, block_boundary: 1, custom: 1, is_string: 1, os: 1 },
    167. 

  167.     { opcode: 0xF3AB, block_boundary: 1, custom: 1, is_string: 1, os: 1 },
    168. 

  168. 

  169.     { opcode: 0xAC, block_boundary: 0, custom: 1, is_string: 1 },
    170. 

  170.     { opcode: 0xF2AC, block_boundary: 1, custom: 1, is_string: 1 },
    171. 

  171.     { opcode: 0xF3AC, block_boundary: 1, custom: 1, is_string: 1 },
    172. 

  172.     { opcode: 0xAD, block_boundary: 0, custom: 1, is_string: 1, os: 1 },
    173. 

  173.     { opcode: 0xF2AD, block_boundary: 1, custom: 1, is_string: 1, os: 1 },
    174. 

  174.     { opcode: 0xF3AD, block_boundary: 1, custom: 1, is_string: 1, os: 1 },
    175. 

  175. 

  176.     { opcode: 0xAE, block_boundary: 0, custom: 1, is_string: 1 },
    177. 

  177.     { opcode: 0xF2AE, block_boundary: 1, custom: 1, is_string: 1 },
    178. 

  178.     { opcode: 0xF3AE, block_boundary: 1, custom: 1, is_string: 1 },
    179. 

  179.     { opcode: 0xAF, block_boundary: 0, custom: 1, is_string: 1, os: 1 },
    180. 

  180.     { opcode: 0xF2AF, block_boundary: 1, custom: 1, is_string: 1, os: 1 },
    181. 

  181.     { opcode: 0xF3AF, block_boundary: 1, custom: 1, is_string: 1, os: 1 },
    182. 

  182. 

  183.     { opcode: 0xC2, custom: 1, block_boundary: 1, no_next_instruction: 1, os: 1, absolute_jump: 1, imm16: 1, skip: 1 }, // ret
    184. 

  184.     { opcode: 0xC3, custom: 1, block_boundary: 1, no_next_instruction: 1, os: 1, absolute_jump: 1, skip: 1 },
    185. 

  185. 

  186.     { opcode: 0xC4, block_boundary: 1, os: 1, e: 1, skip: 1 }, // les
    187. 

  187.     { opcode: 0xC5, block_boundary: 1, os: 1, e: 1, skip: 1 }, // lds
    188. 

  188. 

  189.     { opcode: 0xC6, custom: 1, e: 1, fixed_g: 0, imm8: 1 },
    190. 

  190.     { opcode: 0xC7, custom: 1, os: 1, e: 1, fixed_g: 0, imm1632: 1 },
    191. 

  191. 

  192.     // XXX: Temporary block boundary
    193. 

  193.     { opcode: 0xC8, os: 1, imm16: 1, extra_imm8: 1, block_boundary: 1 }, // enter
    194. 

  194.     { opcode: 0xC9, custom: 1, os: 1, skip: 1 }, // leave
    195. 

  195. 

  196.     { opcode: 0xCA, block_boundary: 1, no_next_instruction: 1, os: 1, imm16: 1, skip: 1 }, // retf
    197. 

  197.     { opcode: 0xCB, block_boundary: 1, no_next_instruction: 1, os: 1, skip: 1 },
    198. 

  198.     { opcode: 0xCC, block_boundary: 1, skip: 1 }, // int
    199. 

  199.     { opcode: 0xCD, block_boundary: 1, skip: 1, imm8: 1 },
    200. 

  200.     { opcode: 0xCE, block_boundary: 1, skip: 1 },
    201. 

  201.     { opcode: 0xCF, block_boundary: 1, no_next_instruction: 1, os: 1, skip: 1 }, // iret
    202. 

  202. 

  203.     { opcode: 0xD4, imm8: 1, block_boundary: 1 }, // aam, may trigger #de
    204. 

  204.     { opcode: 0xD5, imm8: 1, mask_flags: of | cf | af },
    205. 

  205.     { opcode: 0xD6 },
    206. 

  206. 

  207.     { opcode: 0xD7, skip: 1, custom: 1 },
    208. 

  208. 

  209.     { opcode: 0xD8, e: 1, fixed_g: 0, custom: 1, is_fpu: 1, task_switch_test: 1 },
    210. 

  210.     { opcode: 0xD8, e: 1, fixed_g: 1, custom: 1, is_fpu: 1, task_switch_test: 1 },
    211. 

  211.     { opcode: 0xD8, e: 1, fixed_g: 2, custom: 1, is_fpu: 1, task_switch_test: 1 },
    212. 

  212.     { opcode: 0xD8, e: 1, fixed_g: 3, custom: 1, is_fpu: 1, task_switch_test: 1 },
    213. 

  213.     { opcode: 0xD8, e: 1, fixed_g: 4, custom: 1, is_fpu: 1, task_switch_test: 1 },
    214. 

  214.     { opcode: 0xD8, e: 1, fixed_g: 5, custom: 1, is_fpu: 1, task_switch_test: 1 },
    215. 

  215.     { opcode: 0xD8, e: 1, fixed_g: 6, custom: 1, is_fpu: 1, task_switch_test: 1 },
    216. 

  216.     { opcode: 0xD8, e: 1, fixed_g: 7, custom: 1, is_fpu: 1, task_switch_test: 1 },
    217. 

  217. 

  218.     { opcode: 0xD9, e: 1, fixed_g: 0, custom: 1, is_fpu: 1, task_switch_test: 1, os: 1 },
    219. 

  219.     { opcode: 0xD9, e: 1, fixed_g: 1, custom: 1, is_fpu: 1, task_switch_test: 1, os: 1 },
    220. 

  220.     { opcode: 0xD9, e: 1, fixed_g: 2, custom: 1, is_fpu: 1, task_switch_test: 1, os: 1 },
    221. 

  221.     { opcode: 0xD9, e: 1, fixed_g: 3, custom: 1, is_fpu: 1, task_switch_test: 1, os: 1 },
    222. 

  222.     { opcode: 0xD9, e: 1, fixed_g: 4, custom: 1, is_fpu: 1, task_switch_test: 1, os: 1, skip_mem: 1 }, // fldenv (mem)
    223. 

  223.     { opcode: 0xD9, e: 1, fixed_g: 5, custom: 1, is_fpu: 1, task_switch_test: 1, os: 1 },
    224. 

  224.     { opcode: 0xD9, e: 1, fixed_g: 6, custom: 1, is_fpu: 1, task_switch_test: 1, os: 1, skip: 1 }, // fstenv (mem), fprem (reg)
    225. 

  225.     { opcode: 0xD9, e: 1, fixed_g: 7, custom: 1, is_fpu: 1, task_switch_test: 1, os: 1, skip_reg: 1 }, // fprem, fyl2xp1 (precision issues)
    226. 

  226. 

  227.     { opcode: 0xDA, e: 1, fixed_g: 0, custom: 1, is_fpu: 1, task_switch_test: 1 },
    228. 

  228.     { opcode: 0xDA, e: 1, fixed_g: 1, custom: 1, is_fpu: 1, task_switch_test: 1 },
    229. 

  229.     { opcode: 0xDA, e: 1, fixed_g: 2, custom: 1, is_fpu: 1, task_switch_test: 1 },
    230. 

  230.     { opcode: 0xDA, e: 1, fixed_g: 3, custom: 1, is_fpu: 1, task_switch_test: 1 },
    231. 

  231.     { opcode: 0xDA, e: 1, fixed_g: 4, custom: 1, is_fpu: 1, task_switch_test: 1 },
    232. 

  232.     { opcode: 0xDA, e: 1, fixed_g: 5, custom: 1, is_fpu: 1, task_switch_test: 1 },
    233. 

  233.     { opcode: 0xDA, e: 1, fixed_g: 6, custom: 1, is_fpu: 1, task_switch_test: 1 },
    234. 

  234.     { opcode: 0xDA, e: 1, fixed_g: 7, custom: 1, is_fpu: 1, task_switch_test: 1 },
    235. 

  235. 

  236.     { opcode: 0xDB, e: 1, fixed_g: 0, custom: 1, is_fpu: 1, task_switch_test: 1 },
    237. 

  237.     { opcode: 0xDB, e: 1, fixed_g: 1, custom: 1, is_fpu: 1, task_switch_test: 1 }, // fisttp (sse3)
    238. 

  238.     { opcode: 0xDB, e: 1, fixed_g: 2, custom: 1, is_fpu: 1, task_switch_test: 1 },
    239. 

  239.     { opcode: 0xDB, e: 1, fixed_g: 3, custom: 1, is_fpu: 1, task_switch_test: 1 },
    240. 

  240.     { opcode: 0xDB, e: 1, fixed_g: 4, custom: 0, is_fpu: 1, task_switch_test: 1 },
    241. 

  241.     { opcode: 0xDB, e: 1, fixed_g: 5, custom: 1, is_fpu: 1, task_switch_test: 1 },
    242. 

  242.     { opcode: 0xDB, e: 1, fixed_g: 6, custom: 1, is_fpu: 1, task_switch_test: 1 },
    243. 

  243.     { opcode: 0xDB, e: 1, fixed_g: 7, custom: 0, is_fpu: 1, task_switch_test: 1 },
    244. 

  244. 

  245.     { opcode: 0xDC, e: 1, fixed_g: 0, custom: 1, is_fpu: 1, task_switch_test: 1 },
    246. 

  246.     { opcode: 0xDC, e: 1, fixed_g: 1, custom: 1, is_fpu: 1, task_switch_test: 1 },
    247. 

  247.     { opcode: 0xDC, e: 1, fixed_g: 2, custom: 1, is_fpu: 1, task_switch_test: 1 },
    248. 

  248.     { opcode: 0xDC, e: 1, fixed_g: 3, custom: 1, is_fpu: 1, task_switch_test: 1 },
    249. 

  249.     { opcode: 0xDC, e: 1, fixed_g: 4, custom: 1, is_fpu: 1, task_switch_test: 1 },
    250. 

  250.     { opcode: 0xDC, e: 1, fixed_g: 5, custom: 1, is_fpu: 1, task_switch_test: 1 },
    251. 

  251.     { opcode: 0xDC, e: 1, fixed_g: 6, custom: 1, is_fpu: 1, task_switch_test: 1 },
    252. 

  252.     { opcode: 0xDC, e: 1, fixed_g: 7, custom: 1, is_fpu: 1, task_switch_test: 1 },
    253. 

  253. 

  254.     { opcode: 0xDD, e: 1, fixed_g: 0, custom: 1, is_fpu: 1, task_switch_test: 1, os: 1 },
    255. 

  255.     { opcode: 0xDD, e: 1, fixed_g: 1, custom: 1, is_fpu: 1, task_switch_test: 1, os: 1 }, // fisttp (sse3)
    256. 

  256.     { opcode: 0xDD, e: 1, fixed_g: 2, custom: 1, is_fpu: 1, task_switch_test: 1, os: 1 },
    257. 

  257.     { opcode: 0xDD, e: 1, fixed_g: 3, custom: 1, is_fpu: 1, task_switch_test: 1, os: 1 },
    258. 

  258.     { opcode: 0xDD, e: 1, fixed_g: 4, custom: 0, is_fpu: 1, task_switch_test: 1, os: 1, skip_mem: 1 }, // frstor
    259. 

  259.     { opcode: 0xDD, e: 1, fixed_g: 5, custom: 1, is_fpu: 1, task_switch_test: 1, os: 1 },
    260. 

  260.     { opcode: 0xDD, e: 1, fixed_g: 6, custom: 0, is_fpu: 1, task_switch_test: 1, os: 1, skip_mem: 1 }, // fsave
    261. 

  261.     { opcode: 0xDD, e: 1, fixed_g: 7, custom: 0, is_fpu: 1, task_switch_test: 1, os: 1, skip_mem: 1 }, // fstsw (denormal flag)
    262. 

  262. 

  263.     { opcode: 0xDE, e: 1, fixed_g: 0, custom: 1, is_fpu: 1, task_switch_test: 1 },
    264. 

  264.     { opcode: 0xDE, e: 1, fixed_g: 1, custom: 1, is_fpu: 1, task_switch_test: 1 },
    265. 

  265.     { opcode: 0xDE, e: 1, fixed_g: 2, custom: 1, is_fpu: 1, task_switch_test: 1 },
    266. 

  266.     { opcode: 0xDE, e: 1, fixed_g: 3, custom: 1, is_fpu: 1, task_switch_test: 1 },
    267. 

  267.     { opcode: 0xDE, e: 1, fixed_g: 4, custom: 1, is_fpu: 1, task_switch_test: 1 },
    268. 

  268.     { opcode: 0xDE, e: 1, fixed_g: 5, custom: 1, is_fpu: 1, task_switch_test: 1 },
    269. 

  269.     { opcode: 0xDE, e: 1, fixed_g: 6, custom: 1, is_fpu: 1, task_switch_test: 1 },
    270. 

  270.     { opcode: 0xDE, e: 1, fixed_g: 7, custom: 1, is_fpu: 1, task_switch_test: 1 },
    271. 

  271. 

  272.     { opcode: 0xDF, e: 1, fixed_g: 0, custom: 0, is_fpu: 1, task_switch_test: 1 },
    273. 

  273.     { opcode: 0xDF, e: 1, fixed_g: 1, custom: 1, is_fpu: 1, task_switch_test: 1 }, // fisttp (sse3)
    274. 

  274.     { opcode: 0xDF, e: 1, fixed_g: 2, custom: 1, is_fpu: 1, task_switch_test: 1 },
    275. 

  275.     { opcode: 0xDF, e: 1, fixed_g: 3, custom: 1, is_fpu: 1, task_switch_test: 1 },
    276. 

  276.     { opcode: 0xDF, e: 1, fixed_g: 4, custom: 1, is_fpu: 1, task_switch_test: 1, skip: 1 }, // unimplemented: Binary Coded Decimals / fsts (denormal flag)
    277. 

  277.     { opcode: 0xDF, e: 1, fixed_g: 5, custom: 1, is_fpu: 1, task_switch_test: 1 },
    278. 

  278.     { opcode: 0xDF, e: 1, fixed_g: 6, custom: 1, is_fpu: 1, task_switch_test: 1 },
    279. 

  279.     { opcode: 0xDF, e: 1, fixed_g: 7, custom: 1, is_fpu: 1, task_switch_test: 1 },
    280. 

  280. 

  281.     // loop, jcxz, etc.
    282. 

  282.     { opcode: 0xE0, os: 1, imm8s: 1, no_block_boundary_in_interpreted: 1, skip: 1, block_boundary: 1, jump_offset_imm: 1, custom: 1, conditional_jump: 1 },
    283. 

  283.     { opcode: 0xE1, os: 1, imm8s: 1, no_block_boundary_in_interpreted: 1, skip: 1, block_boundary: 1, jump_offset_imm: 1, custom: 1, conditional_jump: 1 },
    284. 

  284.     { opcode: 0xE2, os: 1, imm8s: 1, no_block_boundary_in_interpreted: 1, skip: 1, block_boundary: 1, jump_offset_imm: 1, custom: 1, conditional_jump: 1 },
    285. 

  285.     { opcode: 0xE3, os: 1, imm8s: 1, no_block_boundary_in_interpreted: 1, skip: 1, block_boundary: 1, jump_offset_imm: 1, custom: 1, conditional_jump: 1 },
    286. 

  286. 

  287.     // port functions aren't jumps, but they may modify eip due to how they are implemented
    288. 

  288.     { opcode: 0xE4, block_boundary: 1, imm8: 1, skip: 1 }, // in
    289. 

  289.     { opcode: 0xE5, block_boundary: 1, os: 1, imm8: 1, skip: 1 },
    290. 

  290.     { opcode: 0xE6, block_boundary: 1, imm8: 1, skip: 1 }, // out
    291. 

  291.     { opcode: 0xE7, block_boundary: 1, os: 1, imm8: 1, skip: 1 },
    292. 

  292. 

  293.     { opcode: 0xE8, block_boundary: 1, jump_offset_imm: 1, os: 1, imm1632: 1, custom: 1, skip: 1 }, // call
    294. 

  294.     { opcode: 0xE9, block_boundary: 1, no_block_boundary_in_interpreted: 1, jump_offset_imm: 1, no_next_instruction: 1, os: 1, imm1632: 1, custom: 1, skip: 1 },
    295. 

  295.     { opcode: 0xEA, block_boundary: 1, no_next_instruction: 1, os: 1, imm1632: 1, extra_imm16: 1, skip: 1 }, // jmpf
    296. 

  296.     { opcode: 0xEB, block_boundary: 1, no_block_boundary_in_interpreted: 1, jump_offset_imm: 1, no_next_instruction: 1, os: 1, imm8s: 1, custom: 1, skip: 1 },
    297. 

  297. 

  298.     { opcode: 0xEC, block_boundary: 1, skip: 1 }, // in
    299. 

  299.     { opcode: 0xED, block_boundary: 1, os: 1, skip: 1 },
    300. 

  300.     { opcode: 0xEE, block_boundary: 1, skip: 1 }, // out
    301. 

  301.     { opcode: 0xEF, block_boundary: 1, os: 1, skip: 1 },
    302. 

  302. 

  303.     { opcode: 0xF0, prefix: 1 },
    304. 

  304.     { opcode: 0xF1, skip: 1 },
    305. 

  305.     { opcode: 0xF2, prefix: 1 },
    306. 

  306.     { opcode: 0xF3, prefix: 1 },
    307. 

  307.     { opcode: 0xF4, block_boundary: 1, no_next_instruction: 1, skip: 1 }, // hlt
    308. 

  308.     { opcode: 0xF5 },
    309. 

  309. 

  310.     { opcode: 0xF6, e: 1, fixed_g: 0, imm8: 1, custom: 1 },
    311. 

  311.     { opcode: 0xF6, e: 1, fixed_g: 1, imm8: 1, custom: 1 },
    312. 

  312.     { opcode: 0xF6, e: 1, fixed_g: 2, custom: 1 },
    313. 

  313.     { opcode: 0xF6, e: 1, fixed_g: 3, custom: 1 },
    314. 

  314.     { opcode: 0xF6, e: 1, fixed_g: 4, mask_flags: TESTS_ASSUME_INTEL ? af | zf : sf | zf | af | pf },
    315. 

  315.     { opcode: 0xF6, e: 1, fixed_g: 5, mask_flags: TESTS_ASSUME_INTEL ? af | zf : sf | zf | af | pf },
    316. 

  316.     // div/idiv: Not a block boundary, but doesn't use control flow exceptions
    317. 

  317.     { opcode: 0xF6, e: 1, fixed_g: 6, mask_flags: TESTS_ASSUME_INTEL ? 0 : sf | zf | af | pf, block_boundary: 1 },
    318. 

  318.     { opcode: 0xF6, e: 1, fixed_g: 7, mask_flags: TESTS_ASSUME_INTEL ? 0 : sf | zf | af | pf, block_boundary: 1 },
    319. 

  319. 

  320.     { opcode: 0xF7, os: 1, e: 1, fixed_g: 0, imm1632: 1, custom: 1 },
    321. 

  321.     { opcode: 0xF7, os: 1, e: 1, fixed_g: 1, imm1632: 1, custom: 1 },
    322. 

  322.     { opcode: 0xF7, os: 1, e: 1, fixed_g: 2, custom: 1 },
    323. 

  323.     { opcode: 0xF7, os: 1, e: 1, fixed_g: 3, custom: 1 },
    324. 

  324.     { opcode: 0xF7, os: 1, e: 1, fixed_g: 4, mask_flags: TESTS_ASSUME_INTEL ? af | zf : sf | zf | af | pf, custom: 1 },
    325. 

  325.     { opcode: 0xF7, os: 1, e: 1, fixed_g: 5, mask_flags: TESTS_ASSUME_INTEL ? af | zf : sf | zf | af | pf, custom: 1 },
    326. 

  326.     { opcode: 0xF7, os: 1, e: 1, fixed_g: 6, mask_flags: TESTS_ASSUME_INTEL ? 0 : sf | zf | af | pf, custom: 1 },
    327. 

  327.     { opcode: 0xF7, os: 1, e: 1, fixed_g: 7, mask_flags: TESTS_ASSUME_INTEL ? 0 : sf | zf | af | pf, custom: 1 },
    328. 

  328. 

  329.     { opcode: 0xF8, custom: 1 },
    330. 

  330.     { opcode: 0xF9, custom: 1 },
    331. 

  331.     { opcode: 0xFA, custom: 1, skip: 1 },
    332. 

  332.     // STI: Note: Has special handling in jit in order to call handle_irqs safely
    333. 

  333.     { opcode: 0xFB, custom: 1, custom_sti: 1, skip: 1 },
    334. 

  334.     { opcode: 0xFC, custom: 1 },
    335. 

  335.     { opcode: 0xFD, custom: 1 },
    336. 

  336. 

  337.     { opcode: 0xFE, e: 1, fixed_g: 0, custom: 1 },
    338. 

  338.     { opcode: 0xFE, e: 1, fixed_g: 1, custom: 1 },
    339. 

  339.     { opcode: 0xFF, os: 1, e: 1, fixed_g: 0, custom: 1 },
    340. 

  340.     { opcode: 0xFF, os: 1, e: 1, fixed_g: 1, custom: 1 },
    341. 

  341.     { opcode: 0xFF, os: 1, e: 1, fixed_g: 2, custom: 1, block_boundary: 1, absolute_jump: 1, skip: 1 },
    342. 

  342.     { opcode: 0xFF, os: 1, e: 1, fixed_g: 3, block_boundary: 1, skip: 1 },
    343. 

  343.     { opcode: 0xFF, os: 1, e: 1, fixed_g: 4, custom: 1, block_boundary: 1, absolute_jump: 1, no_next_instruction: 1, skip: 1 },
    344. 

  344.     { opcode: 0xFF, os: 1, e: 1, fixed_g: 5, block_boundary: 1, no_next_instruction: 1, skip: 1 },
    345. 

  345.     { opcode: 0xFF, custom: 1, os: 1, e: 1, fixed_g: 6 },
    346. 

  346. 

  347.     { opcode: 0x0F00, fixed_g: 0, e: 1, skip: 1, block_boundary: 1, os: 1 }, // sldt, ...
    348. 

  348.     { opcode: 0x0F00, fixed_g: 1, e: 1, skip: 1, block_boundary: 1, os: 1 },
    349. 

  349.     { opcode: 0x0F00, fixed_g: 2, e: 1, skip: 1, block_boundary: 1, os: 1 },
    350. 

  350.     { opcode: 0x0F00, fixed_g: 3, e: 1, skip: 1, block_boundary: 1, os: 1 },
    351. 

  351.     { opcode: 0x0F00, fixed_g: 4, e: 1, skip: 1, block_boundary: 1, os: 1 },
    352. 

  352.     { opcode: 0x0F00, fixed_g: 5, e: 1, skip: 1, block_boundary: 1, os: 1 },
    353. 

  353. 

  354.     { opcode: 0x0F01, fixed_g: 0, e: 1, skip: 1, block_boundary: 1, os: 1 }, // sgdt, ...
    355. 

  355.     { opcode: 0x0F01, fixed_g: 1, e: 1, skip: 1, block_boundary: 1, os: 1 },
    356. 

  356.     { opcode: 0x0F01, fixed_g: 2, e: 1, skip: 1, block_boundary: 1, os: 1 },
    357. 

  357.     { opcode: 0x0F01, fixed_g: 3, e: 1, skip: 1, block_boundary: 1, os: 1 },
    358. 

  358.     { opcode: 0x0F01, fixed_g: 4, e: 1, skip: 1, block_boundary: 1, os: 1 },
    359. 

  359.     { opcode: 0x0F01, fixed_g: 6, e: 1, skip: 1, block_boundary: 1, os: 1 },
    360. 

  360.     { opcode: 0x0F01, fixed_g: 7, e: 1, skip: 1, block_boundary: 1, os: 1 },
    361. 

  361. 

  362.     { opcode: 0x0F02, os: 1, e: 1, skip: 1, block_boundary: 1 }, // lar
    363. 

  363.     { opcode: 0x0F03, os: 1, e: 1, skip: 1, block_boundary: 1 }, // lsl
    364. 

  364.     { opcode: 0x0F04, skip: 1, block_boundary: 1 },
    365. 

  365.     { opcode: 0x0F05, skip: 1, block_boundary: 1 },
    366. 

  366.     { opcode: 0x0F06, skip: 1, block_boundary: 1 }, // clts
    367. 

  367.     { opcode: 0x0F07, skip: 1, block_boundary: 1 },
    368. 

  368.     { opcode: 0x0F08, skip: 1, block_boundary: 1 },
    369. 

  369.     { opcode: 0x0F09, skip: 1, block_boundary: 1 }, // wbinvd
    370. 

  370.     { opcode: 0x0F0A, skip: 1, block_boundary: 1 },
    371. 

  371.     // ud2
    372. 

  372.     // Technically has a next instruction, but Linux uses this for assertions
    373. 

  373.     // and embeds the assertion message after this instruction, which is likely
    374. 

  374.     // the most common use case of ud2
    375. 

  375.     { opcode: 0x0F0B, skip: 1, block_boundary: 1, custom: 1, no_next_instruction: 1 },
    376. 

  376.     { opcode: 0x0F0C, skip: 1, block_boundary: 1 },
    377. 

  377.     { opcode: 0x0F0D, skip: 1, block_boundary: 1 },
    378. 

  378.     { opcode: 0x0F0E, skip: 1, block_boundary: 1 },
    379. 

  379.     { opcode: 0x0F0F, skip: 1, block_boundary: 1 },
    380. 

  380. 

  381.     { opcode: 0x0F18, e: 1, custom: 1 },
    382. 

  382.     { opcode: 0x0F19, custom: 1, e: 1 },
    383. 

  383.     { opcode: 0x0F1A, skip: 1, block_boundary: 1 },
    384. 

  384.     { opcode: 0x0F1B, skip: 1, block_boundary: 1 },
    385. 

  385.     { opcode: 0x0F1C, custom: 1, e: 1 },
    386. 

  386.     { opcode: 0x0F1D, custom: 1, e: 1 },
    387. 

  387.     { opcode: 0x0F1E, custom: 1, e: 1 },
    388. 

  388.     { opcode: 0x0F1F, custom: 1, e: 1 },
    389. 

  389. 

  390.     { opcode: 0x0F20, ignore_mod: 1, e: 1, skip: 1, block_boundary: 1 }, // mov reg, creg
    391. 

  391.     { opcode: 0x0F21, ignore_mod: 1, e: 1, skip: 1, block_boundary: 1 }, // mov reg, dreg
    392. 

  392.     { opcode: 0x0F22, ignore_mod: 1, e: 1, skip: 1, block_boundary: 1 }, // mov creg, reg
    393. 

  393.     { opcode: 0x0F23, ignore_mod: 1, e: 1, skip: 1, block_boundary: 1 }, // mov dreg, reg
    394. 

  394.     { opcode: 0x0F24, skip: 1, block_boundary: 1 },
    395. 

  395.     { opcode: 0x0F25, skip: 1, block_boundary: 1 },
    396. 

  396.     { opcode: 0x0F26, skip: 1, block_boundary: 1 },
    397. 

  397.     { opcode: 0x0F27, skip: 1, block_boundary: 1 },
    398. 

  398. 

  399.     { opcode: 0x0F30, skip: 1, block_boundary: 1 }, // wrmsr
    400. 

  400.     { opcode: 0x0F31, skip: 1, custom: 1 }, // rdtsc
    401. 

  401.     { opcode: 0x0F32, skip: 1, block_boundary: 1 }, // rdmsr
    402. 

  402.     { opcode: 0x0F33, skip: 1, block_boundary: 1 }, // rdpmc
    403. 

  403.     { opcode: 0x0F34, skip: 1, block_boundary: 1, no_next_instruction: 1 }, // sysenter
    404. 

  404.     { opcode: 0x0F35, skip: 1, block_boundary: 1, no_next_instruction: 1 }, // sysexit
    405. 

  405. 

  406.     { opcode: 0x0F36, skip: 1, block_boundary: 1 }, // ud
    407. 

  407.     { opcode: 0x0F37, skip: 1, block_boundary: 1 }, // getsec
    408. 

  408. 

  409.     // ssse3+
    410. 

  410.     { opcode: 0x0F38, skip: 1, block_boundary: 1 },
    411. 

  411.     { opcode: 0x0F39, skip: 1, block_boundary: 1 },
    412. 

  412.     { opcode: 0x0F3A, skip: 1, block_boundary: 1 },
    413. 

  413.     { opcode: 0x0F3B, skip: 1, block_boundary: 1 },
    414. 

  414.     { opcode: 0x0F3C, skip: 1, block_boundary: 1 },
    415. 

  415.     { opcode: 0x0F3D, skip: 1, block_boundary: 1 },
    416. 

  416.     { opcode: 0x0F3E, skip: 1, block_boundary: 1 },
    417. 

  417.     { opcode: 0x0F3F, skip: 1, block_boundary: 1 },
    418. 

  418. 

  419.     { opcode: 0x0FA0, os: 1, custom: 1 },
    420. 

  420.     { opcode: 0x0FA1, os: 1, block_boundary: 1, skip: 1 }, // pop fs: block_boundary since it uses non-raising cpu exceptions
    421. 

  421. 

  422.     { opcode: 0x0FA2, skip: 1 },
    423. 

  423. 

  424.     { opcode: 0x0FA8, os: 1, custom: 1 },
    425. 

  425.     { opcode: 0x0FA9, os: 1, block_boundary: 1, skip: 1 }, // pop gs
    426. 

  426. 

  427.     { opcode: 0x0FA3, os: 1, e: 1, custom: 1, skip_mem: 1 }, // bt (can also index memory, but not supported by test right now)
    428. 

  428.     { opcode: 0x0FAB, os: 1, e: 1, custom: 1, skip_mem: 1 },
    429. 

  429.     { opcode: 0x0FB3, os: 1, e: 1, custom: 1, skip_mem: 1 },
    430. 

  430.     { opcode: 0x0FBB, os: 1, e: 1, custom: 1, skip_mem: 1 },
    431. 

  431. 

  432.     { opcode: 0x0FBA, os: 1, e: 1, fixed_g: 4, imm8: 1, custom: 1 }, // bt
    433. 

  433.     { opcode: 0x0FBA, os: 1, e: 1, fixed_g: 5, imm8: 1, custom: 1 },
    434. 

  434.     { opcode: 0x0FBA, os: 1, e: 1, fixed_g: 6, imm8: 1, custom: 1 },
    435. 

  435.     { opcode: 0x0FBA, os: 1, e: 1, fixed_g: 7, imm8: 1, custom: 1 },
    436. 

  436. 

  437.     { opcode: 0x0FBC, os: 1, e: 1, mask_flags: of | sf | af | pf | cf, custom: 1 }, // bsf
    438. 

  438.     { opcode: 0x0FBD, os: 1, e: 1, mask_flags: of | sf | af | pf | cf, custom: 1 },
    439. 

  439. 

  440.     // note: overflow flag only undefined if shift is > 1
    441. 

  441.     { opcode: 0x0FA4, os: 1, e: 1, custom: 1, imm8: 1, mask_flags: af | of }, // shld
    442. 

  442.     { opcode: 0x0FA5, os: 1, e: 1, custom: 1, mask_flags: af | of },
    443. 

  443.     { opcode: 0x0FAC, os: 1, e: 1, custom: 1, imm8: 1, mask_flags: af | of },
    444. 

  444.     { opcode: 0x0FAD, os: 1, e: 1, custom: 1, mask_flags: af | of },
    445. 

  445. 

  446.     { opcode: 0x0FA6, skip: 1, block_boundary: 1 }, // ud
    447. 

  447.     { opcode: 0x0FA7, skip: 1, block_boundary: 1 }, // ud
    448. 

  448. 

  449.     { opcode: 0x0FAA, skip: 1 },
    450. 

  450. 

  451.     { opcode: 0x0FAE, e: 1, fixed_g: 0, reg_ud: 1, task_switch_test: 1, skip: 1, block_boundary: 1 }, // fxsave
    452. 

  452.     { opcode: 0x0FAE, e: 1, fixed_g: 1, reg_ud: 1, task_switch_test: 1, skip: 1, block_boundary: 1 }, // fxrstor
    453. 

  453.     { opcode: 0x0FAE, e: 1, fixed_g: 2, reg_ud: 1, sse: 1, skip: 1, block_boundary: 1 }, // ldmxcsr
    454. 

  454.     { opcode: 0x0FAE, e: 1, fixed_g: 3, reg_ud: 1, sse: 1, skip: 1, block_boundary: 1 }, // stmxcsr
    455. 

  455. 

  456.     { opcode: 0x0FAE, e: 1, fixed_g: 4, reg_ud: 1, skip: 1, block_boundary: 1 }, // xsave (mem, not implemented)
    457. 

  457.     { opcode: 0x0FAE, e: 1, fixed_g: 5, skip: 1, custom: 1 }, // lfence (reg, only 0), xrstor (mem, not implemented)
    458. 

  458.     { opcode: 0x0FAE, e: 1, fixed_g: 6, skip: 1, block_boundary: 1 }, // mfence (reg, only 0), xsaveopt (mem, not implemented)
    459. 

  459.     { opcode: 0x0FAE, e: 1, fixed_g: 7, skip: 1, block_boundary: 1 }, // sfence (reg, only 0), clflush (mem)
    460. 

  460. 

  461.     { opcode: 0x0FAF, os: 1, e: 1, mask_flags: TESTS_ASSUME_INTEL ? af | zf : sf | zf | af | pf, custom: 1 }, // imul
    462. 

  462. 

  463.     { opcode: 0x0FB0, e: 1 }, // cmxchg
    464. 

  464.     { opcode: 0x0FB1, os: 1, e: 1, custom: 1 },
    465. 

  465.     { opcode: 0x0FC7, e: 1, fixed_g: 1, os: 1, reg_ud: 1, custom: 1 }, // cmpxchg8b (memory)
    466. 

  466.     { opcode: 0x0FC7, e: 1, fixed_g: 6, os: 1, mem_ud: 1, skip: 1 }, // rdrand
    467. 

  467. 

  468.     { opcode: 0x0FB2, block_boundary: 1, os: 1, e: 1, skip: 1 }, // lss
    469. 

  469.     { opcode: 0x0FB4, block_boundary: 1, os: 1, e: 1, skip: 1 }, // lfs
    470. 

  470.     { opcode: 0x0FB5, block_boundary: 1, os: 1, e: 1, skip: 1 }, // lgs
    471. 

  471. 

  472.     { opcode: 0x0FB6, os: 1, e: 1, custom: 1 }, // movzx
    473. 

  473.     { opcode: 0x0FB7, os: 1, e: 1, custom: 1 },
    474. 

  474. 

  475.     { opcode: 0xF30FB8, os: 1, e: 1, custom: 1 }, // popcnt
    476. 

  476.     { opcode: 0x0FB8, os: 1, e: 1, block_boundary: 1 }, // ud
    477. 

  477. 

  478.     { opcode: 0x0FB9, block_boundary: 1 }, // ud2
    479. 

  479. 

  480.     { opcode: 0x0FBE, os: 1, e: 1, custom: 1 }, // movsx
    481. 

  481.     { opcode: 0x0FBF, os: 1, e: 1, custom: 1 },
    482. 

  482. 

  483.     { opcode: 0x0FC0, e: 1 }, // xadd
    484. 

  484.     { opcode: 0x0FC1, os: 1, e: 1, custom: 1 },
    485. 

  485. 

  486.     { opcode: 0x0FC8, custom: 1 }, // bswap
    487. 

  487.     { opcode: 0x0FC9, custom: 1 },
    488. 

  488.     { opcode: 0x0FCA, custom: 1 },
    489. 

  489.     { opcode: 0x0FCB, custom: 1 },
    490. 

  490.     { opcode: 0x0FCC, custom: 1 },
    491. 

  491.     { opcode: 0x0FCD, custom: 1 },
    492. 

  492.     { opcode: 0x0FCE, custom: 1 },
    493. 

  493.     { opcode: 0x0FCF, custom: 1 },
    494. 

  494. 

  495. 

  496.     // mmx, sse
    497. 

  497. 

  498.     { sse: 1, opcode: 0x0F10, e: 1, custom: 1 },
    499. 

  499.     { sse: 1, opcode: 0xF30F10, e: 1, custom: 1 },
    500. 

  500.     { sse: 1, opcode: 0x660F10, e: 1, custom: 1 },
    501. 

  501.     { sse: 1, opcode: 0xF20F10, e: 1, custom: 1 },
    502. 

  502.     { sse: 1, opcode: 0x0F11, e: 1, custom: 1 },
    503. 

  503.     { sse: 1, opcode: 0xF30F11, e: 1, custom: 1 },
    504. 

  504.     { sse: 1, opcode: 0x660F11, e: 1, custom: 1 },
    505. 

  505.     { sse: 1, opcode: 0xF20F11, e: 1, custom: 1 },
    506. 

  506.     { sse: 1, opcode: 0x0F12, e: 1, custom: 1 },
    507. 

  507.     { sse: 1, opcode: 0x660F12, reg_ud: 1, e: 1, custom: 1 },
    508. 

  508.     { sse: 1, opcode: 0xF20F12, e: 1, custom: 1 }, // sse3
    509. 

  509.     { sse: 1, opcode: 0xF30F12, e: 1, custom: 1 }, // sse3
    510. 

  510.     { sse: 1, opcode: 0x0F13, reg_ud: 1, e: 1, custom: 1 },
    511. 

  511.     { sse: 1, opcode: 0x660F13, reg_ud: 1, e: 1, custom: 1 },
    512. 

  512.     { sse: 1, opcode: 0x0F14, e: 1, custom: 1 },
    513. 

  513.     { sse: 1, opcode: 0x660F14, e: 1, custom: 1 },
    514. 

  514.     { sse: 1, opcode: 0x0F15, e: 1, custom: 1 },
    515. 

  515.     { sse: 1, opcode: 0x660F15, e: 1, custom: 1 },
    516. 

  516.     { sse: 1, opcode: 0x0F16, e: 1, custom: 1 },
    517. 

  517.     { sse: 1, opcode: 0x660F16, reg_ud: 1, e: 1, custom: 1 },
    518. 

  518.     { sse: 1, opcode: 0xF30F16,  e: 1, custom: 1 }, // sse3
    519. 

  519.     { sse: 1, opcode: 0x0F17, reg_ud: 1, e: 1, custom: 1 },
    520. 

  520.     { sse: 1, opcode: 0x660F17, reg_ud: 1, e: 1, custom: 1 },
    521. 

  521. 

  522.     { sse: 1, opcode: 0x0F28, e: 1, custom: 1 },
    523. 

  523.     { sse: 1, opcode: 0x660F28, e: 1, custom: 1 },
    524. 

  524.     { sse: 1, opcode: 0x0F29, e: 1, custom: 1 },
    525. 

  525.     { sse: 1, opcode: 0x660F29, e: 1, custom: 1 },
    526. 

  526.     { sse: 1, opcode: 0x0F2A, e: 1, custom: 1 },
    527. 

  527.     { sse: 1, opcode: 0x660F2A, e: 1, custom: 1 },
    528. 

  528.     { sse: 1, opcode: 0xF20F2A, e: 1, custom: 1 },
    529. 

  529.     { sse: 1, opcode: 0xF30F2A, e: 1, custom: 1 },
    530. 

  530.     { sse: 1, opcode: 0x0F2B, reg_ud: 1, e: 1, custom: 1 },
    531. 

  531.     { sse: 1, opcode: 0x660F2B, reg_ud: 1, e: 1, custom: 1 },
    532. 

  532. 

  533.     { sse: 1, opcode: 0x0F2C, e: 1 },
    534. 

  534.     { sse: 1, opcode: 0x660F2C, e: 1 },
    535. 

  535.     { sse: 1, opcode: 0xF20F2C, e: 1, custom: 1 },
    536. 

  536.     { sse: 1, opcode: 0xF30F2C, e: 1, custom: 1 },
    537. 

  537.     { sse: 1, opcode: 0x0F2D, e: 1 },
    538. 

  538.     { sse: 1, opcode: 0x660F2D, e: 1 },
    539. 

  539.     { sse: 1, opcode: 0xF20F2D, e: 1, custom: 1 },
    540. 

  540.     { sse: 1, opcode: 0xF30F2D, e: 1, custom: 1 },
    541. 

  541. 

  542.     { sse: 1, opcode: 0x0F2E, e: 1, custom: 1 },
    543. 

  543.     { sse: 1, opcode: 0x660F2E, e: 1, custom: 1 },
    544. 

  544.     { sse: 1, opcode: 0x0F2F, e: 1, custom: 1 },
    545. 

  545.     { sse: 1, opcode: 0x660F2F, e: 1, custom: 1 },
    546. 

  546. 

  547.     { sse: 1, opcode: 0x0F50, mem_ud: 1, e: 1 },
    548. 

  548.     { sse: 1, opcode: 0x660F50, mem_ud: 1, e: 1 },
    549. 

  549.     { sse: 1, opcode: 0x0F51, e: 1, custom: 1 },
    550. 

  550.     { sse: 1, opcode: 0x660F51, e: 1, custom: 1 },
    551. 

  551.     { sse: 1, opcode: 0xF20F51, e: 1, custom: 1 },
    552. 

  552.     { sse: 1, opcode: 0xF30F51, e: 1, custom: 1 },
    553. 

  553. 

  554.     // approximation of 1/sqrt(x). Skipped because our approximation doesn't match intel's
    555. 

  555.     { sse: 1, opcode: 0x0F52, e: 1, skip: 1, custom: 1 },
    556. 

  556.     { sse: 1, opcode: 0xF30F52, e: 1, skip: 1, custom: 1 },
    557. 

  557. 

  558.     // reciprocal: approximation of 1/x. Skipped because our approximation doesn't match intel's
    559. 

  559.     { sse: 1, opcode: 0x0F53, e: 1, skip: 1, custom: 1 },
    560. 

  560.     { sse: 1, opcode: 0xF30F53, e: 1, skip: 1, custom: 1 },
    561. 

  561. 

  562.     { sse: 1, opcode: 0x0F54, e: 1, custom: 1 },
    563. 

  563.     { sse: 1, opcode: 0x660F54, e: 1, custom: 1 },
    564. 

  564.     { sse: 1, opcode: 0x0F55, e: 1, custom: 1 },
    565. 

  565.     { sse: 1, opcode: 0x660F55, e: 1, custom: 1 },
    566. 

  566.     { sse: 1, opcode: 0x0F56, e: 1, custom: 1 },
    567. 

  567.     { sse: 1, opcode: 0x660F56, e: 1, custom: 1 },
    568. 

  568.     { sse: 1, opcode: 0x0F57, e: 1, custom: 1 },
    569. 

  569.     { sse: 1, opcode: 0x660F57, e: 1, custom: 1 },
    570. 

  570. 

  571.     { sse: 1, opcode: 0x0F58, e: 1, custom: 1 },
    572. 

  572.     { sse: 1, opcode: 0x660F58, e: 1, custom: 1 },
    573. 

  573.     { sse: 1, opcode: 0xF20F58, e: 1, custom: 1 },
    574. 

  574.     { sse: 1, opcode: 0xF30F58, e: 1, custom: 1 },
    575. 

  575.     { sse: 1, opcode: 0x0F59, e: 1, custom: 1 },
    576. 

  576.     { sse: 1, opcode: 0x660F59, e: 1, custom: 1 },
    577. 

  577.     { sse: 1, opcode: 0xF20F59, e: 1, custom: 1 },
    578. 

  578.     { sse: 1, opcode: 0xF30F59, e: 1, custom: 1 },
    579. 

  579. 

  580.     { sse: 1, opcode: 0x0F5A, e: 1, custom: 1 },
    581. 

  581.     { sse: 1, opcode: 0x660F5A, e: 1, custom: 1 },
    582. 

  582.     { sse: 1, opcode: 0xF20F5A, e: 1, custom: 1 },
    583. 

  583.     { sse: 1, opcode: 0xF30F5A, e: 1, custom: 1 },
    584. 

  584.     { sse: 1, opcode: 0x0F5B, e: 1, custom: 1 },
    585. 

  585.     { sse: 1, opcode: 0x660F5B, e: 1, custom: 1 },
    586. 

  586.     // no F2 variant
    587. 

  587.     { sse: 1, opcode: 0xF30F5B, e: 1, custom: 1 },
    588. 

  588. 

  589.     { sse: 1, opcode: 0x0F5C, e: 1, custom: 1 },
    590. 

  590.     { sse: 1, opcode: 0x660F5C, e: 1, custom: 1 },
    591. 

  591.     { sse: 1, opcode: 0xF20F5C, e: 1, custom: 1 },
    592. 

  592.     { sse: 1, opcode: 0xF30F5C, e: 1, custom: 1 },
    593. 

  593.     { sse: 1, opcode: 0x0F5D, e: 1, custom: 1 },
    594. 

  594.     { sse: 1, opcode: 0x660F5D, e: 1, custom: 1 },
    595. 

  595.     { sse: 1, opcode: 0xF20F5D, e: 1, custom: 1 },
    596. 

  596.     { sse: 1, opcode: 0xF30F5D, e: 1, custom: 1 },
    597. 

  597. 

  598.     { sse: 1, opcode: 0x0F5E, e: 1, custom: 1 },
    599. 

  599.     { sse: 1, opcode: 0x660F5E, e: 1, custom: 1 },
    600. 

  600.     { sse: 1, opcode: 0xF20F5E, e: 1, custom: 1 },
    601. 

  601.     { sse: 1, opcode: 0xF30F5E, e: 1, custom: 1 },
    602. 

  602.     { sse: 1, opcode: 0x0F5F, e: 1, custom: 1 },
    603. 

  603.     { sse: 1, opcode: 0x660F5F, e: 1, custom: 1 },
    604. 

  604.     { sse: 1, opcode: 0xF20F5F, e: 1, custom: 1 },
    605. 

  605.     { sse: 1, opcode: 0xF30F5F, e: 1, custom: 1 },
    606. 

  606. 

  607.     { sse: 1, opcode: 0x660F60, e: 1, custom: 1 },
    608. 

  608.     { sse: 1, opcode: 0x0F60, e: 1, custom: 1 },
    609. 

  609.     { sse: 1, opcode: 0x660F61, e: 1, custom: 1 },
    610. 

  610.     { sse: 1, opcode: 0x0F61, e: 1, custom: 1 },
    611. 

  611.     { sse: 1, opcode: 0x660F62, e: 1, custom: 1 },
    612. 

  612.     { sse: 1, opcode: 0x0F62, e: 1, custom: 1 },
    613. 

  613.     { sse: 1, opcode: 0x660F63, e: 1, custom: 1 },
    614. 

  614.     { sse: 1, opcode: 0x0F63, e: 1, custom: 1 },
    615. 

  615.     { sse: 1, opcode: 0x660F64, e: 1, custom: 1 },
    616. 

  616.     { sse: 1, opcode: 0x0F64, e: 1, custom: 1 },
    617. 

  617.     { sse: 1, opcode: 0x660F65, e: 1, custom: 1 },
    618. 

  618.     { sse: 1, opcode: 0x0F65, e: 1, custom: 1 },
    619. 

  619.     { sse: 1, opcode: 0x660F66, e: 1, custom: 1 },
    620. 

  620.     { sse: 1, opcode: 0x0F66, e: 1, custom: 1 },
    621. 

  621.     { sse: 1, opcode: 0x660F67, e: 1, custom: 1 },
    622. 

  622.     { sse: 1, opcode: 0x0F67, e: 1, custom: 1 },
    623. 

  623. 

  624.     { sse: 1, opcode: 0x660F68, e: 1, custom: 1 },
    625. 

  625.     { sse: 1, opcode: 0x0F68, e: 1, custom: 1 },
    626. 

  626.     { sse: 1, opcode: 0x660F69, e: 1, custom: 1 },
    627. 

  627.     { sse: 1, opcode: 0x0F69, e: 1, custom: 1 },
    628. 

  628.     { sse: 1, opcode: 0x660F6A, e: 1, custom: 1 },
    629. 

  629.     { sse: 1, opcode: 0x0F6A, e: 1, custom: 1 },
    630. 

  630.     { sse: 1, opcode: 0x660F6B, e: 1, custom: 1 },
    631. 

  631.     { sse: 1, opcode: 0x0F6B, e: 1, custom: 1 },
    632. 

  632.     { sse: 1, opcode: 0x660F6C, e: 1, custom: 1 },
    633. 

  633.     { sse: 1, opcode: 0x0F6C, e: 1, block_boundary: 1 }, // ud
    634. 

  634.     { sse: 1, opcode: 0x660F6D, e: 1, custom: 1 },
    635. 

  635.     { sse: 1, opcode: 0x0F6D, e: 1, block_boundary: 1 }, // ud
    636. 

  636.     { sse: 1, opcode: 0x660F6E, e: 1, custom: 1 },
    637. 

  637.     { sse: 1, opcode: 0x0F6E, e: 1, custom: 1 },
    638. 

  638.     { sse: 1, opcode: 0xF30F6F, e: 1, custom: 1 },
    639. 

  639.     { sse: 1, opcode: 0x660F6F, e: 1, custom: 1 },
    640. 

  640.     { sse: 1, opcode: 0x0F6F, e: 1, custom: 1 },
    641. 

  641. 

  642.     { sse: 1, opcode: 0x0F70, e: 1, imm8: 1, custom: 1 },
    643. 

  643.     { sse: 1, opcode: 0x660F70, e: 1, imm8: 1, custom: 1 },
    644. 

  644.     { sse: 1, opcode: 0xF20F70, e: 1, imm8: 1, custom: 1 },
    645. 

  645.     { sse: 1, opcode: 0xF30F70, e: 1, imm8: 1, custom: 1 },
    646. 

  646. 

  647.     { sse: 1, opcode: 0x0F71, e: 1, fixed_g: 2, imm8: 1, mem_ud: 1, custom: 1 },
    648. 

  648.     { sse: 1, opcode: 0x660F71, e: 1, fixed_g: 2, imm8: 1, mem_ud: 1, custom: 1 },
    649. 

  649.     { sse: 1, opcode: 0x0F71, e: 1, fixed_g: 4, imm8: 1, mem_ud: 1, custom: 1 },
    650. 

  650.     { sse: 1, opcode: 0x660F71, e: 1, fixed_g: 4, imm8: 1, mem_ud: 1, custom: 1 },
    651. 

  651.     { sse: 1, opcode: 0x0F71, e: 1, fixed_g: 6, imm8: 1, mem_ud: 1, custom: 1 },
    652. 

  652.     { sse: 1, opcode: 0x660F71, e: 1, fixed_g: 6, imm8: 1, mem_ud: 1, custom: 1 },
    653. 

  653. 

  654.     { sse: 1, opcode: 0x0F72, e: 1, fixed_g: 2, imm8: 1, mem_ud: 1, custom: 1 },
    655. 

  655.     { sse: 1, opcode: 0x660F72, e: 1, fixed_g: 2, imm8: 1, mem_ud: 1, custom: 1 },
    656. 

  656.     { sse: 1, opcode: 0x0F72, e: 1, fixed_g: 4, imm8: 1, mem_ud: 1, custom: 1 },
    657. 

  657.     { sse: 1, opcode: 0x660F72, e: 1, fixed_g: 4, imm8: 1, mem_ud: 1, custom: 1 },
    658. 

  658.     { sse: 1, opcode: 0x0F72, e: 1, fixed_g: 6, imm8: 1, mem_ud: 1, custom: 1 },
    659. 

  659.     { sse: 1, opcode: 0x660F72, e: 1, fixed_g: 6, imm8: 1, mem_ud: 1, custom: 1 },
    660. 

  660. 

  661.     { sse: 1, opcode: 0x0F73, e: 1, fixed_g: 2, imm8: 1, mem_ud: 1, custom: 1 },
    662. 

  662.     { sse: 1, opcode: 0x660F73, e: 1, fixed_g: 2, imm8: 1, mem_ud: 1, custom: 1 },
    663. 

  663.     { sse: 1, opcode: 0x660F73, e: 1, fixed_g: 3, imm8: 1, mem_ud: 1, custom: 1 },
    664. 

  664.     { sse: 1, opcode: 0x0F73, e: 1, fixed_g: 6, imm8: 1, mem_ud: 1, custom: 1 },
    665. 

  665.     { sse: 1, opcode: 0x660F73, e: 1, fixed_g: 6, imm8: 1, mem_ud: 1, custom: 1 },
    666. 

  666.     { sse: 1, opcode: 0x660F73, e: 1, fixed_g: 7, imm8: 1, mem_ud: 1, custom: 1 },
    667. 

  667. 

  668.     { sse: 1, opcode: 0x0F74, e: 1, custom: 1 },
    669. 

  669.     { sse: 1, opcode: 0x660F74, e: 1, custom: 1 },
    670. 

  670.     { sse: 1, opcode: 0x0F75, e: 1, custom: 1 },
    671. 

  671.     { sse: 1, opcode: 0x660F75, e: 1, custom: 1 },
    672. 

  672.     { sse: 1, opcode: 0x0F76, e: 1, custom: 1 },
    673. 

  673.     { sse: 1, opcode: 0x660F76, e: 1, custom: 1 },
    674. 

  674.     { sse: 1, opcode: 0x0F77, skip: 1 }, // emms (skip as it breaks gdb printing of float registers)
    675. 

  675. 

  676.     // vmx instructions
    677. 

  677.     { opcode: 0x0F78, skip: 1, block_boundary: 1 },
    678. 

  678.     { opcode: 0x0F79, skip: 1, block_boundary: 1 },
    679. 

  679. 

  680.     { opcode: 0x0F7A, skip: 1, block_boundary: 1 }, // ud
    681. 

  681.     { opcode: 0x0F7B, skip: 1, block_boundary: 1 }, // ud
    682. 

  682. 

  683.     { sse: 1, opcode: 0x660F7C, e: 1, custom: 1 }, // sse3
    684. 

  684.     { sse: 1, opcode: 0xF20F7C, e: 1, custom: 1 }, // sse3
    685. 

  685.     { sse: 1, opcode: 0x660F7D, e: 1, custom: 1 }, // sse3
    686. 

  686.     { sse: 1, opcode: 0xF20F7D, e: 1, custom: 1 }, // sse3
    687. 

  687. 

  688.     { opcode: 0x0F7C, skip: 1, block_boundary: 1 }, // ud
    689. 

  689.     { opcode: 0x0F7D, skip: 1, block_boundary: 1 }, // ud
    690. 

  690. 

  691.     { sse: 1, opcode: 0x0F7E, e: 1, custom: 1 },
    692. 

  692.     { sse: 1, opcode: 0x660F7E, e: 1, custom: 1 },
    693. 

  693.     { sse: 1, opcode: 0xF30F7E, e: 1, custom: 1 },
    694. 

  694.     { sse: 1, opcode: 0x0F7F, e: 1, custom: 1 },
    695. 

  695.     { sse: 1, opcode: 0x660F7F, e: 1, custom: 1 },
    696. 

  696.     { sse: 1, opcode: 0xF30F7F, e: 1, custom: 1 },
    697. 

  697. 

  698.     { sse: 1, opcode: 0x0FC2, e: 1, imm8: 1, custom: 1 },
    699. 

  699.     { sse: 1, opcode: 0x660FC2, e: 1, imm8: 1, custom: 1 },
    700. 

  700.     { sse: 1, opcode: 0xF20FC2, e: 1, imm8: 1, custom: 1 },
    701. 

  701.     { sse: 1, opcode: 0xF30FC2, e: 1, imm8: 1, custom: 1 },
    702. 

  702. 

  703.     { opcode: 0x0FC3, e: 1, custom: 1, reg_ud: 1 }, // movnti: Uses normal registers, hence not marked as sse
    704. 

  704. 

  705.     { sse: 1, opcode: 0x0FC4, e: 1, imm8: 1, custom: 1 },
    706. 

  706.     { sse: 1, opcode: 0x660FC4, e: 1, imm8: 1, custom: 1 },
    707. 

  707.     { sse: 1, opcode: 0x0FC5, e: 1, mem_ud: 1, imm8: 1, custom: 1 },
    708. 

  708.     { sse: 1, opcode: 0x660FC5, e: 1, mem_ud: 1, imm8: 1, custom: 1 },
    709. 

  709. 

  710.     { sse: 1, opcode: 0x0FC6, e: 1, imm8: 1, custom: 1 },
    711. 

  711.     { sse: 1, opcode: 0x660FC6, e: 1, imm8: 1, custom: 1 },
    712. 

  712. 

  713.     { sse: 1, opcode: 0x0FD0, skip: 1, block_boundary: 1 }, // sse3
    714. 

  714. 

  715.     { sse: 1, opcode: 0x0FD1, e: 1, custom: 1 },
    716. 

  716.     { sse: 1, opcode: 0x660FD1, e: 1, custom: 1 },
    717. 

  717.     { sse: 1, opcode: 0x0FD2, e: 1, custom: 1 },
    718. 

  718.     { sse: 1, opcode: 0x660FD2, e: 1, custom: 1 },
    719. 

  719.     { sse: 1, opcode: 0x0FD3, e: 1, custom: 1 },
    720. 

  720.     { sse: 1, opcode: 0x660FD3, e: 1, custom: 1 },
    721. 

  721.     { sse: 1, opcode: 0x0FD4, e: 1, custom: 1 },
    722. 

  722.     { sse: 1, opcode: 0x660FD4, e: 1, custom: 1 },
    723. 

  723.     { sse: 1, opcode: 0x0FD5, e: 1, custom: 1 },
    724. 

  724.     { sse: 1, opcode: 0x660FD5, e: 1, custom: 1 },
    725. 

  725. 

  726.     { sse: 1, opcode: 0x660FD6, e: 1, custom: 1 },
    727. 

  727.     { sse: 1, opcode: 0xF20FD6, mem_ud: 1, e: 1 },
    728. 

  728.     { sse: 1, opcode: 0xF30FD6, mem_ud: 1, e: 1 },
    729. 

  729.     { sse: 1, opcode: 0x0FD6, e: 1, block_boundary: 1 }, // ud
    730. 

  730. 

  731.     { sse: 1, opcode: 0x0FD7, e: 1, mem_ud: 1, custom: 1 },
    732. 

  732.     { sse: 1, opcode: 0x660FD7, e: 1, mem_ud: 1, custom: 1 },
    733. 

  733. 

  734.     { sse: 1, opcode: 0x0FD8, e: 1, custom: 1 },
    735. 

  735.     { sse: 1, opcode: 0x660FD8, e: 1, custom: 1 },
    736. 

  736.     { sse: 1, opcode: 0x0FD9, e: 1, custom: 1 },
    737. 

  737.     { sse: 1, opcode: 0x660FD9, e: 1, custom: 1 },
    738. 

  738.     { sse: 1, opcode: 0x0FDA, e: 1, custom: 1 },
    739. 

  739.     { sse: 1, opcode: 0x660FDA, e: 1, custom: 1 },
    740. 

  740.     { sse: 1, opcode: 0x0FDB, e: 1, custom: 1 },
    741. 

  741.     { sse: 1, opcode: 0x660FDB, e: 1, custom: 1 },
    742. 

  742.     { sse: 1, opcode: 0x0FDC, e: 1, custom: 1 },
    743. 

  743.     { sse: 1, opcode: 0x660FDC, e: 1, custom: 1 },
    744. 

  744.     { sse: 1, opcode: 0x0FDD, e: 1, custom: 1 },
    745. 

  745.     { sse: 1, opcode: 0x660FDD, e: 1, custom: 1 },
    746. 

  746.     { sse: 1, opcode: 0x0FDE, e: 1, custom: 1 },
    747. 

  747.     { sse: 1, opcode: 0x660FDE, e: 1, custom: 1 },
    748. 

  748.     { sse: 1, opcode: 0x0FDF, e: 1, custom: 1 },
    749. 

  749.     { sse: 1, opcode: 0x660FDF, e: 1, custom: 1 },
    750. 

  750. 

  751.     { sse: 1, opcode: 0x0FE0, e: 1, custom: 1 },
    752. 

  752.     { sse: 1, opcode: 0x660FE0, e: 1, custom: 1 },
    753. 

  753.     { sse: 1, opcode: 0x0FE1, e: 1, custom: 1 },
    754. 

  754.     { sse: 1, opcode: 0x660FE1, e: 1, custom: 1 },
    755. 

  755.     { sse: 1, opcode: 0x0FE2, e: 1, custom: 1 },
    756. 

  756.     { sse: 1, opcode: 0x660FE2, e: 1, custom: 1 },
    757. 

  757.     { sse: 1, opcode: 0x0FE3, e: 1, custom: 1 },
    758. 

  758.     { sse: 1, opcode: 0x660FE3, e: 1, custom: 1 },
    759. 

  759.     { sse: 1, opcode: 0x0FE4, e: 1, custom: 1 },
    760. 

  760.     { sse: 1, opcode: 0x660FE4, e: 1, custom: 1 },
    761. 

  761.     { sse: 1, opcode: 0x0FE5, e: 1, custom: 1 },
    762. 

  762.     { sse: 1, opcode: 0x660FE5, e: 1, custom: 1 },
    763. 

  763. 

  764.     { sse: 1, opcode: 0x660FE6, e: 1, custom: 1 },
    765. 

  765.     { sse: 1, opcode: 0xF20FE6, e: 1, custom: 1 },
    766. 

  766.     { sse: 1, opcode: 0xF30FE6, e: 1, custom: 1 },
    767. 

  767.     { sse: 1, opcode: 0x0FE6, e: 1, block_boundary: 1 }, // ud
    768. 

  768.     { sse: 1, opcode: 0x0FE7, e: 1, reg_ud: 1 },
    769. 

  769.     { sse: 1, opcode: 0x660FE7, e: 1, reg_ud: 1, custom: 1 },
    770. 

  770. 

  771.     { sse: 1, opcode: 0x0FE8, e: 1, custom: 1 },
    772. 

  772.     { sse: 1, opcode: 0x660FE8, e: 1, custom: 1 },
    773. 

  773.     { sse: 1, opcode: 0x0FE9, e: 1, custom: 1 },
    774. 

  774.     { sse: 1, opcode: 0x660FE9, e: 1, custom: 1 },
    775. 

  775.     { sse: 1, opcode: 0x0FEA, e: 1, custom: 1 },
    776. 

  776.     { sse: 1, opcode: 0x660FEA, e: 1, custom: 1 },
    777. 

  777.     { sse: 1, opcode: 0x0FEB, e: 1, custom: 1 },
    778. 

  778.     { sse: 1, opcode: 0x660FEB, e: 1, custom: 1 },
    779. 

  779.     { sse: 1, opcode: 0x0FEC, e: 1, custom: 1 },
    780. 

  780.     { sse: 1, opcode: 0x660FEC, e: 1, custom: 1 },
    781. 

  781.     { sse: 1, opcode: 0x0FED, e: 1, custom: 1 },
    782. 

  782.     { sse: 1, opcode: 0x660FED, e: 1, custom: 1 },
    783. 

  783.     { sse: 1, opcode: 0x0FEE, e: 1, custom: 1 },
    784. 

  784.     { sse: 1, opcode: 0x660FEE, e: 1, custom: 1 },
    785. 

  785.     { sse: 1, opcode: 0x0FEF, e: 1, custom: 1 },
    786. 

  786.     { sse: 1, opcode: 0x660FEF, e: 1, custom: 1 },
    787. 

  787. 

  788.     { sse: 1, opcode: 0x0FF0, skip: 1, block_boundary: 1 }, // sse3
    789. 

  789. 

  790.     { sse: 1, opcode: 0x0FF1, e: 1, custom: 1 },
    791. 

  791.     { sse: 1, opcode: 0x660FF1, e: 1, custom: 1 },
    792. 

  792.     { sse: 1, opcode: 0x0FF2, e: 1, custom: 1 },
    793. 

  793.     { sse: 1, opcode: 0x660FF2, e: 1, custom: 1 },
    794. 

  794.     { sse: 1, opcode: 0x0FF3, e: 1, custom: 1 },
    795. 

  795.     { sse: 1, opcode: 0x660FF3, e: 1, custom: 1 },
    796. 

  796.     { sse: 1, opcode: 0x0FF4, e: 1, custom: 1 },
    797. 

  797.     { sse: 1, opcode: 0x660FF4, e: 1, custom: 1 },
    798. 

  798.     { sse: 1, opcode: 0x0FF5, e: 1, custom: 1 },
    799. 

  799.     { sse: 1, opcode: 0x660FF5, e: 1, custom: 1 },
    800. 

  800.     { sse: 1, opcode: 0x0FF6, e: 1, custom: 1 },
    801. 

  801.     { sse: 1, opcode: 0x660FF6, e: 1, custom: 1 },
    802. 

  802.     // maskmovq (0FF7), maskmovdqu (660FF7) tested manually
    803. 

  803.     // Generated tests don't setup EDI as required (yet)
    804. 

  804.     { sse: 1, opcode: 0x0FF7, mem_ud: 1, e: 1, custom: 1, skip: 1 },
    805. 

  805.     { sse: 1, opcode: 0x660FF7, mem_ud: 1, e: 1, custom: 1, skip: 1 },
    806. 

  806. 

  807.     { sse: 1, opcode: 0x0FF8, e: 1, custom: 1 },
    808. 

  808.     { sse: 1, opcode: 0x660FF8, e: 1, custom: 1 },
    809. 

  809.     { sse: 1, opcode: 0x0FF9, e: 1, custom: 1 },
    810. 

  810.     { sse: 1, opcode: 0x660FF9, e: 1, custom: 1 },
    811. 

  811.     { sse: 1, opcode: 0x0FFA, e: 1, custom: 1 },
    812. 

  812.     { sse: 1, opcode: 0x660FFA, e: 1, custom: 1 },
    813. 

  813.     { sse: 1, opcode: 0x0FFB, e: 1, custom: 1 },
    814. 

  814.     { sse: 1, opcode: 0x660FFB, e: 1, custom: 1 },
    815. 

  815.     { sse: 1, opcode: 0x0FFC, e: 1, custom: 1 },
    816. 

  816.     { sse: 1, opcode: 0x660FFC, e: 1, custom: 1 },
    817. 

  817.     { sse: 1, opcode: 0x0FFD, e: 1, custom: 1 },
    818. 

  818.     { sse: 1, opcode: 0x660FFD, e: 1, custom: 1 },
    819. 

  819.     { sse: 1, opcode: 0x0FFE, e: 1, custom: 1 },
    820. 

  820.     { sse: 1, opcode: 0x660FFE, e: 1, custom: 1 },
    821. 

  821. 

  822.     { opcode: 0x0FFF, block_boundary: 1 }, // ud
    823. 

  823. ];
    824. 

  824. 

  825. for(let i = 0; i < 8; i++)
    826. 

  826. {
    827. 

  827.     encodings.push.apply(encodings, [
    828. 

  828.         { opcode: 0x00 | i << 3, custom: 1, e: 1 },
    829. 

  829.         { opcode: 0x01 | i << 3, custom: 1, os: 1, e: 1 },
    830. 

  830.         { opcode: 0x02 | i << 3, custom: 1, e: 1 },
    831. 

  831.         { opcode: 0x03 | i << 3, custom: 1, os: 1, e: 1 },
    832. 

  832.         { opcode: 0x04 | i << 3, custom: 1, imm8: 1 },
    833. 

  833.         { opcode: 0x05 | i << 3, custom: 1, os: 1, imm1632: 1 },
    834. 

  834. 

  835.         { opcode: 0x40 | i, os: 1, custom: 1 },
    836. 

  836.         { opcode: 0x48 | i, os: 1, custom: 1 },
    837. 

  837. 

  838.         { opcode: 0x50 | i, custom: 1, os: 1 },
    839. 

  839.         { opcode: 0x58 | i, custom: 1, os: 1 },
    840. 

  840. 

  841.         { opcode: 0x70 | i, block_boundary: 1, no_block_boundary_in_interpreted: 1, jump_offset_imm: 1, conditional_jump: 1, os: 1, imm8s: 1, custom: 1, skip: 1 },
    842. 

  842.         { opcode: 0x78 | i, block_boundary: 1, no_block_boundary_in_interpreted: 1, jump_offset_imm: 1, conditional_jump: 1, os: 1, imm8s: 1, custom: 1, skip: 1 },
    843. 

  843. 

  844.         { opcode: 0x80, e: 1, fixed_g: i, imm8: 1, custom: 1 },
    845. 

  845.         { opcode: 0x81, os: 1, e: 1, fixed_g: i, imm1632: 1, custom: 1 },
    846. 

  846.         { opcode: 0x82, e: 1, fixed_g: i, imm8: 1, custom: 1 },
    847. 

  847.         { opcode: 0x83, os: 1, e: 1, fixed_g: i, imm8s: 1, custom: 1 },
    848. 

  848. 

  849.         { opcode: 0xB0 | i, custom: 1, imm8: 1 },
    850. 

  850.         { opcode: 0xB8 | i, custom: 1, os: 1, imm1632: 1 },
    851. 

  851. 

  852.         // note: overflow flag only undefined if shift is > 1
    853. 

  853.         // note: the adjust flag is undefined for shifts > 0 and unaffected by rotates
    854. 

  854.         { opcode: 0xC0, e: 1, fixed_g: i, imm8: 1, mask_flags: of | af, custom: 1 },
    855. 

  855.         { opcode: 0xC1, os: 1, e: 1, fixed_g: i, imm8: 1, mask_flags: of | af, custom: 1 },
    856. 

  856.         { opcode: 0xD0, e: 1, fixed_g: i, mask_flags: af, custom: 1 },
    857. 

  857.         { opcode: 0xD1, os: 1, e: 1, fixed_g: i, mask_flags: af, custom: 1 },
    858. 

  858.         { opcode: 0xD2, e: 1, fixed_g: i, mask_flags: of | af, custom: 1 },
    859. 

  859.         { opcode: 0xD3, os: 1, e: 1, fixed_g: i, mask_flags: of | af, custom: 1 },
    860. 

  860. 

  861.         { opcode: 0x0F40 | i, e: 1, os: 1, custom: 1 },
    862. 

  862.         { opcode: 0x0F48 | i, e: 1, os: 1, custom: 1 },
    863. 

  863. 

  864.         { opcode: 0x0F80 | i, block_boundary: 1, no_block_boundary_in_interpreted: 1, jump_offset_imm: 1, conditional_jump: 1, imm1632: 1, os: 1, custom: 1, skip: 1 },
    865. 

  865.         { opcode: 0x0F88 | i, block_boundary: 1, no_block_boundary_in_interpreted: 1, jump_offset_imm: 1, conditional_jump: 1, imm1632: 1, os: 1, custom: 1, skip: 1 },
    866. 

  866. 

  867.         { opcode: 0x0F90 | i, e: 1, custom: 1 },
    868. 

  868.         { opcode: 0x0F98 | i, e: 1, custom: 1 },
    869. 

  869.     ]);
    870. 

  870. }
    871. 

  871. 

  872. encodings.sort((e1, e2) => {
    873. 

  873.     let o1 = (e1.opcode & 0xFF00) === 0x0F00 ? e1.opcode & 0xFFFF : e1.opcode & 0xFF;
    874. 

  874.     let o2 = (e2.opcode & 0xFF00) === 0x0F00 ? e2.opcode & 0xFFFF : e2.opcode & 0xFF;
    875. 

  875.     return o1 - o2 || e1.fixed_g - e2.fixed_g;
    876. 

  876. });
    877. 

  877. 

  878. module.exports = Object.freeze(encodings.map(entry => Object.freeze(entry)));
    879.