cpu.js 43 KB

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  1. "use strict";
  2. // Resources:
  3. // https://pdos.csail.mit.edu/6.828/2006/readings/i386/toc.htm
  4. // https://www-ssl.intel.com/content/www/us/en/processors/architectures-software-developer-manuals.html
  5. // http://ref.x86asm.net/geek32.html
  6. /** @constructor */
  7. function CPU(bus, wm, next_tick_immediately)
  8. {
  9. this.next_tick_immediately = next_tick_immediately;
  10. this.wm = wm;
  11. this.wasm_patch();
  12. this.create_jit_imports();
  13. const memory = this.wm.exports.memory;
  14. this.wasm_memory = memory;
  15. this.memory_size = v86util.view(Uint32Array, memory, 812, 1);
  16. this.mem8 = new Uint8Array(0);
  17. this.mem32s = new Int32Array(this.mem8.buffer);
  18. this.segment_is_null = v86util.view(Uint8Array, memory, 724, 8);
  19. this.segment_offsets = v86util.view(Int32Array, memory, 736, 8);
  20. this.segment_limits = v86util.view(Uint32Array, memory, 768, 8);
  21. /**
  22. * Wheter or not in protected mode
  23. */
  24. this.protected_mode = v86util.view(Int32Array, memory, 800, 1);
  25. this.idtr_size = v86util.view(Int32Array, memory, 564, 1);
  26. this.idtr_offset = v86util.view(Int32Array, memory, 568, 1);
  27. /**
  28. * global descriptor table register
  29. */
  30. this.gdtr_size = v86util.view(Int32Array, memory, 572, 1);
  31. this.gdtr_offset = v86util.view(Int32Array, memory, 576, 1);
  32. this.tss_size_32 = v86util.view(Int32Array, memory, 1128, 1);
  33. /*
  34. * whether or not a page fault occured
  35. */
  36. this.page_fault = v86util.view(Uint32Array, memory, 540, 8);
  37. this.cr = v86util.view(Int32Array, memory, 580, 8);
  38. // current privilege level
  39. this.cpl = v86util.view(Uint8Array, memory, 612, 1);
  40. // current operand/address size
  41. this.is_32 = v86util.view(Int32Array, memory, 804, 1);
  42. this.stack_size_32 = v86util.view(Int32Array, memory, 808, 1);
  43. /**
  44. * Was the last instruction a hlt?
  45. */
  46. this.in_hlt = v86util.view(Uint8Array, memory, 616, 1);
  47. this.last_virt_eip = v86util.view(Int32Array, memory, 620, 1);
  48. this.eip_phys = v86util.view(Int32Array, memory, 624, 1);
  49. this.sysenter_cs = v86util.view(Int32Array, memory, 636, 1);
  50. this.sysenter_esp = v86util.view(Int32Array, memory, 640, 1);
  51. this.sysenter_eip = v86util.view(Int32Array, memory, 644, 1);
  52. this.prefixes = v86util.view(Int32Array, memory, 648, 1);
  53. this.flags = v86util.view(Int32Array, memory, 120, 1);
  54. /**
  55. * bitmap of flags which are not updated in the flags variable
  56. * changed by arithmetic instructions, so only relevant to arithmetic flags
  57. */
  58. this.flags_changed = v86util.view(Int32Array, memory, 100, 1);
  59. /**
  60. * enough infos about the last arithmetic operation to compute eflags
  61. */
  62. this.last_op_size = v86util.view(Int32Array, memory, 96, 1);
  63. this.last_op1 = v86util.view(Int32Array, memory, 104, 1);
  64. this.last_result = v86util.view(Int32Array, memory, 112, 1);
  65. this.current_tsc = v86util.view(Uint32Array, memory, 960, 2); // 64 bit
  66. /** @type {!Object} */
  67. this.devices = {};
  68. this.instruction_pointer = v86util.view(Int32Array, memory, 556, 1);
  69. this.previous_ip = v86util.view(Int32Array, memory, 560, 1);
  70. // configured by guest
  71. this.apic_enabled = v86util.view(Uint8Array, memory, 548, 1);
  72. // configured when the emulator starts (changes bios initialisation)
  73. this.acpi_enabled = v86util.view(Uint8Array, memory, 552, 1);
  74. // managed in io.js
  75. /** @const */ this.memory_map_read8 = [];
  76. /** @const */ this.memory_map_write8 = [];
  77. /** @const */ this.memory_map_read32 = [];
  78. /** @const */ this.memory_map_write32 = [];
  79. /**
  80. * @const
  81. * @type {{main: ArrayBuffer, vga: ArrayBuffer}}
  82. */
  83. this.bios = {
  84. main: null,
  85. vga: null,
  86. };
  87. this.instruction_counter = v86util.view(Uint32Array, memory, 664, 1);
  88. // registers
  89. this.reg32 = v86util.view(Int32Array, memory, 64, 8);
  90. this.fpu_st = v86util.view(Int32Array, memory, 1152, 4 * 8);
  91. this.fpu_stack_empty = v86util.view(Uint8Array, memory, 816, 1);
  92. this.fpu_stack_empty[0] = 0xFF;
  93. this.fpu_stack_ptr = v86util.view(Uint8Array, memory, 1032, 1);
  94. this.fpu_stack_ptr[0] = 0;
  95. this.fpu_control_word = v86util.view(Uint16Array, memory, 1036, 1);
  96. this.fpu_control_word[0] = 0x37F;
  97. this.fpu_status_word = v86util.view(Uint16Array, memory, 1040, 1);
  98. this.fpu_status_word[0] = 0;
  99. this.fpu_ip = v86util.view(Int32Array, memory, 1048, 1);
  100. this.fpu_ip[0] = 0;
  101. this.fpu_ip_selector = v86util.view(Int32Array, memory, 1052, 1);
  102. this.fpu_ip_selector[0] = 0;
  103. this.fpu_opcode = v86util.view(Int32Array, memory, 1044, 1);
  104. this.fpu_opcode[0] = 0;
  105. this.fpu_dp = v86util.view(Int32Array, memory, 1056, 1);
  106. this.fpu_dp[0] = 0;
  107. this.fpu_dp_selector = v86util.view(Int32Array, memory, 1060, 1);
  108. this.fpu_dp_selector[0] = 0;
  109. this.reg_xmm32s = v86util.view(Int32Array, memory, 832, 8 * 4);
  110. this.mxcsr = v86util.view(Int32Array, memory, 824, 1);
  111. // segment registers, tr and ldtr
  112. this.sreg = v86util.view(Uint16Array, memory, 668, 8);
  113. // debug registers
  114. this.dreg = v86util.view(Int32Array, memory, 684, 8);
  115. this.reg_pdpte = v86util.view(Int32Array, memory, 968, 8);
  116. this.svga_dirty_bitmap_min_offset = v86util.view(Uint32Array, memory, 716, 1);
  117. this.svga_dirty_bitmap_max_offset = v86util.view(Uint32Array, memory, 720, 1);
  118. this.fw_value = [];
  119. this.fw_pointer = 0;
  120. this.option_roms = [];
  121. this.io = undefined;
  122. this.bus = bus;
  123. this.set_tsc(0, 0);
  124. this.debug_init();
  125. if(DEBUG)
  126. {
  127. this.seen_code = {};
  128. this.seen_code_uncompiled = {};
  129. }
  130. //Object.seal(this);
  131. }
  132. CPU.prototype.clear_opstats = function()
  133. {
  134. new Uint8Array(this.wasm_memory.buffer, 0x8000, 0x20000).fill(0);
  135. this.wm.exports["profiler_init"]();
  136. };
  137. CPU.prototype.create_jit_imports = function()
  138. {
  139. // Set this.jit_imports as generated WASM modules will expect
  140. const jit_imports = Object.create(null);
  141. jit_imports["m"] = this.wm.exports["memory"];
  142. for(let name of Object.keys(this.wm.exports))
  143. {
  144. if(name.startsWith("_") || name.startsWith("zstd") || name.endsWith("_js"))
  145. {
  146. continue;
  147. }
  148. jit_imports[name] = this.wm.exports[name];
  149. }
  150. this.jit_imports = jit_imports;
  151. };
  152. CPU.prototype.wasm_patch = function()
  153. {
  154. const get_optional_import = name => this.wm.exports[name];
  155. const get_import = name =>
  156. {
  157. const f = get_optional_import(name);
  158. console.assert(f, "Missing import: " + name);
  159. return f;
  160. };
  161. this.reset_cpu = get_import("reset_cpu");
  162. this.getiopl = get_import("getiopl");
  163. this.get_eflags = get_import("get_eflags");
  164. this.handle_irqs = get_import("handle_irqs");
  165. this.main_loop = get_import("main_loop");
  166. this.set_jit_config = get_import("set_jit_config");
  167. this.read8 = get_import("read8");
  168. this.read16 = get_import("read16");
  169. this.read32s = get_import("read32s");
  170. this.write8 = get_import("write8");
  171. this.write16 = get_import("write16");
  172. this.write32 = get_import("write32");
  173. this.in_mapped_range = get_import("in_mapped_range");
  174. // used by nasmtests
  175. this.fpu_load_tag_word = get_import("fpu_load_tag_word");
  176. this.fpu_load_status_word = get_import("fpu_load_status_word");
  177. this.fpu_get_sti_f64 = get_import("fpu_get_sti_f64");
  178. this.translate_address_system_read = get_import("translate_address_system_read_js");
  179. this.get_seg_cs = get_import("get_seg_cs");
  180. this.get_real_eip = get_import("get_real_eip");
  181. this.clear_tlb = get_import("clear_tlb");
  182. this.full_clear_tlb = get_import("full_clear_tlb");
  183. this.update_state_flags = get_import("update_state_flags");
  184. this.set_tsc = get_import("set_tsc");
  185. this.store_current_tsc = get_import("store_current_tsc");
  186. this.set_cpuid_level = get_import("set_cpuid_level");
  187. this.pic_set_irq = get_import("pic_set_irq");
  188. this.pic_clear_irq = get_import("pic_clear_irq");
  189. if(DEBUG)
  190. {
  191. this.jit_force_generate_unsafe = get_optional_import("jit_force_generate_unsafe");
  192. }
  193. this.jit_clear_cache = get_import("jit_clear_cache_js");
  194. this.jit_dirty_cache = get_import("jit_dirty_cache");
  195. this.codegen_finalize_finished = get_import("codegen_finalize_finished");
  196. this.allocate_memory = get_import("allocate_memory");
  197. this.zero_memory = get_import("zero_memory");
  198. this.svga_allocate_memory = get_import("svga_allocate_memory");
  199. this.svga_allocate_dest_buffer = get_import("svga_allocate_dest_buffer");
  200. this.svga_fill_pixel_buffer = get_import("svga_fill_pixel_buffer");
  201. this.svga_mark_dirty = get_import("svga_mark_dirty");
  202. this.get_pic_addr_master = get_import("get_pic_addr_master");
  203. this.get_pic_addr_slave = get_import("get_pic_addr_slave");
  204. this.zstd_create_ctx = get_import("zstd_create_ctx");
  205. this.zstd_get_src_ptr = get_import("zstd_get_src_ptr");
  206. this.zstd_free_ctx = get_import("zstd_free_ctx");
  207. this.zstd_read = get_import("zstd_read");
  208. this.zstd_read_free = get_import("zstd_read_free");
  209. this.port20_read = get_import("port20_read");
  210. this.port21_read = get_import("port21_read");
  211. this.portA0_read = get_import("portA0_read");
  212. this.portA1_read = get_import("portA1_read");
  213. this.port20_write = get_import("port20_write");
  214. this.port21_write = get_import("port21_write");
  215. this.portA0_write = get_import("portA0_write");
  216. this.portA1_write = get_import("portA1_write");
  217. this.port4D0_read = get_import("port4D0_read");
  218. this.port4D1_read = get_import("port4D1_read");
  219. this.port4D0_write = get_import("port4D0_write");
  220. this.port4D1_write = get_import("port4D1_write");
  221. };
  222. CPU.prototype.jit_force_generate = function(addr)
  223. {
  224. if(!this.jit_force_generate_unsafe)
  225. {
  226. dbg_assert(false, "Not supported in this wasm build: jit_force_generate_unsafe");
  227. return;
  228. }
  229. this.jit_force_generate_unsafe(addr);
  230. };
  231. CPU.prototype.jit_clear_func = function(index)
  232. {
  233. dbg_assert(index >= 0 && index < WASM_TABLE_SIZE);
  234. this.wm.wasm_table.set(index + WASM_TABLE_OFFSET, null);
  235. };
  236. CPU.prototype.jit_clear_all_funcs = function()
  237. {
  238. const table = this.wm.wasm_table;
  239. for(let i = 0; i < WASM_TABLE_SIZE; i++)
  240. {
  241. table.set(WASM_TABLE_OFFSET + i, null);
  242. }
  243. };
  244. CPU.prototype.get_state = function()
  245. {
  246. var state = [];
  247. state[0] = this.memory_size[0];
  248. state[1] = this.segment_is_null;
  249. state[2] = this.segment_offsets;
  250. state[3] = this.segment_limits;
  251. state[4] = this.protected_mode[0];
  252. state[5] = this.idtr_offset[0];
  253. state[6] = this.idtr_size[0];
  254. state[7] = this.gdtr_offset[0];
  255. state[8] = this.gdtr_size[0];
  256. state[9] = this.page_fault[0];
  257. state[10] = this.cr;
  258. state[11] = this.cpl[0];
  259. state[13] = this.is_32[0];
  260. state[16] = this.stack_size_32[0];
  261. state[17] = this.in_hlt[0];
  262. state[18] = this.last_virt_eip[0];
  263. state[19] = this.eip_phys[0];
  264. state[22] = this.sysenter_cs[0];
  265. state[23] = this.sysenter_eip[0];
  266. state[24] = this.sysenter_esp[0];
  267. state[25] = this.prefixes[0];
  268. state[26] = this.flags[0];
  269. state[27] = this.flags_changed[0];
  270. state[28] = this.last_op1[0];
  271. state[30] = this.last_op_size[0];
  272. state[37] = this.instruction_pointer[0];
  273. state[38] = this.previous_ip[0];
  274. state[39] = this.reg32;
  275. state[40] = this.sreg;
  276. state[41] = this.dreg;
  277. state[42] = this.reg_pdpte;
  278. this.store_current_tsc();
  279. state[43] = this.current_tsc;
  280. state[45] = this.devices.virtio_9p;
  281. state[46] = this.devices.apic;
  282. state[47] = this.devices.rtc;
  283. state[48] = this.devices.pci;
  284. state[49] = this.devices.dma;
  285. state[50] = this.devices.acpi;
  286. // 51 (formerly hpet)
  287. state[52] = this.devices.vga;
  288. state[53] = this.devices.ps2;
  289. state[54] = this.devices.uart0;
  290. state[55] = this.devices.fdc;
  291. state[56] = this.devices.cdrom;
  292. state[57] = this.devices.hda;
  293. state[58] = this.devices.pit;
  294. state[59] = this.devices.net;
  295. state[60] = this.get_state_pic();
  296. state[61] = this.devices.sb16;
  297. state[62] = this.fw_value;
  298. state[63] = this.devices.ioapic;
  299. state[64] = this.tss_size_32[0];
  300. state[66] = this.reg_xmm32s;
  301. state[67] = this.fpu_st;
  302. state[68] = this.fpu_stack_empty[0];
  303. state[69] = this.fpu_stack_ptr[0];
  304. state[70] = this.fpu_control_word[0];
  305. state[71] = this.fpu_ip[0];
  306. state[72] = this.fpu_ip_selector[0];
  307. state[73] = this.fpu_dp[0];
  308. state[74] = this.fpu_dp_selector[0];
  309. state[75] = this.fpu_opcode[0];
  310. const { packed_memory, bitmap } = this.pack_memory();
  311. state[77] = packed_memory;
  312. state[78] = new Uint8Array(bitmap.get_buffer());
  313. state[79] = this.devices.uart1;
  314. state[80] = this.devices.uart2;
  315. state[81] = this.devices.uart3;
  316. return state;
  317. };
  318. CPU.prototype.get_state_pic = function()
  319. {
  320. const pic_size = 13;
  321. const pic = new Uint8Array(this.wasm_memory.buffer, this.get_pic_addr_master(), pic_size);
  322. const pic_slave = new Uint8Array(this.wasm_memory.buffer, this.get_pic_addr_slave(), pic_size);
  323. const state = [];
  324. const state_slave = [];
  325. state[0] = pic[0]; // irq_mask
  326. state[1] = pic[1]; // irq_map
  327. state[2] = pic[2]; // isr
  328. state[3] = pic[3]; // irr
  329. state[4] = pic[4]; // is_master
  330. state[5] = state_slave;
  331. state[6] = pic[6]; // expect_icw4
  332. state[7] = pic[7]; // state
  333. state[8] = pic[8]; // read_isr
  334. state[9] = pic[9]; // auto_eoi
  335. state[10] = pic[10]; // special_mask_mode
  336. state[11] = pic[11]; // elcr
  337. state[12] = pic[12]; // irq_value (undefined in old state images)
  338. state_slave[0] = pic_slave[0]; // irq_mask
  339. state_slave[1] = pic_slave[1]; // irq_map
  340. state_slave[2] = pic_slave[2]; // isr
  341. state_slave[3] = pic_slave[3]; // irr
  342. state_slave[4] = pic_slave[4]; // is_master
  343. state_slave[5] = null;
  344. state_slave[6] = pic_slave[6]; // expect_icw4
  345. state_slave[7] = pic_slave[7]; // state
  346. state_slave[8] = pic_slave[8]; // read_isr
  347. state_slave[9] = pic_slave[9]; // auto_eoi
  348. state_slave[10] = pic_slave[10]; // elcr
  349. state_slave[12] = pic_slave[12]; // irq_value (undefined in old state images)
  350. state_slave[12] = pic_slave[12]; // special_mask_mode (undefined in old state images)
  351. return state;
  352. };
  353. CPU.prototype.set_state = function(state)
  354. {
  355. this.memory_size[0] = state[0];
  356. if(this.mem8.length !== this.memory_size[0])
  357. {
  358. console.warn("Note: Memory size mismatch. we=" + this.mem8.length + " state=" + this.memory_size[0]);
  359. }
  360. this.segment_is_null.set(state[1]);
  361. this.segment_offsets.set(state[2]);
  362. this.segment_limits.set(state[3]);
  363. this.protected_mode[0] = state[4];
  364. this.idtr_offset[0] = state[5];
  365. this.idtr_size[0] = state[6];
  366. this.gdtr_offset[0] = state[7];
  367. this.gdtr_size[0] = state[8];
  368. this.page_fault[0] = state[9];
  369. this.cr.set(state[10]);
  370. this.cpl[0] = state[11];
  371. this.is_32[0] = state[13];
  372. this.stack_size_32[0] = state[16];
  373. this.in_hlt[0] = state[17];
  374. this.last_virt_eip[0] = state[18];
  375. this.eip_phys[0] = state[19];
  376. this.sysenter_cs[0] = state[22];
  377. this.sysenter_eip[0] = state[23];
  378. this.sysenter_esp[0] = state[24];
  379. this.prefixes[0] = state[25];
  380. this.flags[0] = state[26];
  381. this.flags_changed[0] = state[27];
  382. this.last_op1[0] = state[28];
  383. this.last_op_size[0] = state[30];
  384. this.instruction_pointer[0] = state[37];
  385. this.previous_ip[0] = state[38];
  386. this.reg32.set(state[39]);
  387. this.sreg.set(state[40]);
  388. this.dreg.set(state[41]);
  389. state[42] && this.reg_pdpte.set(state[42]);
  390. this.set_tsc(state[43][0], state[43][1]);
  391. this.devices.virtio_9p && this.devices.virtio_9p.set_state(state[45]);
  392. this.devices.apic && this.devices.apic.set_state(state[46]);
  393. this.devices.rtc && this.devices.rtc.set_state(state[47]);
  394. this.devices.pci && this.devices.pci.set_state(state[48]);
  395. this.devices.dma && this.devices.dma.set_state(state[49]);
  396. this.devices.acpi && this.devices.acpi.set_state(state[50]);
  397. // 51 (formerly hpet)
  398. this.devices.vga && this.devices.vga.set_state(state[52]);
  399. this.devices.ps2 && this.devices.ps2.set_state(state[53]);
  400. this.devices.uart0 && this.devices.uart0.set_state(state[54]);
  401. this.devices.fdc && this.devices.fdc.set_state(state[55]);
  402. this.devices.cdrom && this.devices.cdrom.set_state(state[56]);
  403. this.devices.hda && this.devices.hda.set_state(state[57]);
  404. this.devices.pit && this.devices.pit.set_state(state[58]);
  405. this.devices.net && this.devices.net.set_state(state[59]);
  406. this.set_state_pic(state[60]);
  407. this.devices.sb16 && this.devices.sb16.set_state(state[61]);
  408. this.devices.uart1 && this.devices.uart1.set_state(state[79]);
  409. this.devices.uart2 && this.devices.uart2.set_state(state[80]);
  410. this.devices.uart3 && this.devices.uart3.set_state(state[81]);
  411. this.fw_value = state[62];
  412. this.devices.ioapic && this.devices.ioapic.set_state(state[63]);
  413. this.tss_size_32[0] = state[64];
  414. this.reg_xmm32s.set(state[66]);
  415. this.fpu_st.set(state[67]);
  416. this.fpu_stack_empty[0] = state[68];
  417. this.fpu_stack_ptr[0] = state[69];
  418. this.fpu_control_word[0] = state[70];
  419. this.fpu_ip[0] = state[71];
  420. this.fpu_ip_selector[0] = state[72];
  421. this.fpu_dp[0] = state[73];
  422. this.fpu_dp_selector[0] = state[74];
  423. this.fpu_opcode[0] = state[75];
  424. const bitmap = new v86util.Bitmap(state[78].buffer);
  425. const packed_memory = state[77];
  426. this.unpack_memory(bitmap, packed_memory);
  427. this.update_state_flags();
  428. this.full_clear_tlb();
  429. this.jit_clear_cache();
  430. };
  431. CPU.prototype.set_state_pic = function(state)
  432. {
  433. // Note: This could exists for compatibility with old state images
  434. // It should be deleted when the state version changes
  435. const pic_size = 13;
  436. const pic = new Uint8Array(this.wasm_memory.buffer, this.get_pic_addr_master(), pic_size);
  437. const pic_slave = new Uint8Array(this.wasm_memory.buffer, this.get_pic_addr_slave(), pic_size);
  438. pic[0] = state[0]; // irq_mask
  439. pic[1] = state[1]; // irq_map
  440. pic[2] = state[2]; // isr
  441. pic[3] = state[3]; // irr
  442. pic[4] = state[4]; // is_master
  443. const state_slave = state[5];
  444. pic[6] = state[6]; // expect_icw4
  445. pic[7] = state[7]; // state
  446. pic[8] = state[8]; // read_isr
  447. pic[9] = state[9]; // auto_eoi
  448. pic[10] = state[10]; // special_mask_mode
  449. pic[11] = state[11]; // elcr
  450. pic[12] = state[12]; // irq_value (undefined in old state images)
  451. pic_slave[0] = state_slave[0]; // irq_mask
  452. pic_slave[1] = state_slave[1]; // irq_map
  453. pic_slave[2] = state_slave[2]; // isr
  454. pic_slave[3] = state_slave[3]; // irr
  455. pic_slave[4] = state_slave[4]; // is_master
  456. // dummy
  457. pic_slave[6] = state_slave[6]; // expect_icw4
  458. pic_slave[7] = state_slave[7]; // state
  459. pic_slave[8] = state_slave[8]; // read_isr
  460. pic_slave[9] = state_slave[9]; // auto_eoi
  461. pic_slave[10] = state_slave[10]; // elcr
  462. pic_slave[12] = state_slave[12]; // irq_value (undefined in old state images)
  463. pic_slave[12] = state_slave[12]; // special_mask_mode (undefined in old state images)
  464. };
  465. CPU.prototype.pack_memory = function()
  466. {
  467. dbg_assert((this.mem8.length & 0xFFF) === 0);
  468. const page_count = this.mem8.length >> 12;
  469. const nonzero_pages = [];
  470. for(let page = 0; page < page_count; page++)
  471. {
  472. const offset = page << 12;
  473. const view = this.mem32s.subarray(offset >> 2, offset + 0x1000 >> 2);
  474. let is_zero = true;
  475. for(let i = 0; i < view.length; i++)
  476. {
  477. if(view[i] !== 0)
  478. {
  479. is_zero = false;
  480. break;
  481. }
  482. }
  483. if(!is_zero)
  484. {
  485. nonzero_pages.push(page);
  486. }
  487. }
  488. const bitmap = new v86util.Bitmap(page_count);
  489. const packed_memory = new Uint8Array(nonzero_pages.length << 12);
  490. for(let [i, page] of nonzero_pages.entries())
  491. {
  492. bitmap.set(page, 1);
  493. const offset = page << 12;
  494. const page_contents = this.mem8.subarray(offset, offset + 0x1000);
  495. packed_memory.set(page_contents, i << 12);
  496. }
  497. return { bitmap, packed_memory };
  498. };
  499. CPU.prototype.unpack_memory = function(bitmap, packed_memory)
  500. {
  501. this.zero_memory(this.memory_size[0]);
  502. const page_count = this.memory_size[0] >> 12;
  503. let packed_page = 0;
  504. for(let page = 0; page < page_count; page++)
  505. {
  506. if(bitmap.get(page))
  507. {
  508. let offset = packed_page << 12;
  509. let view = packed_memory.subarray(offset, offset + 0x1000);
  510. this.mem8.set(view, page << 12);
  511. packed_page++;
  512. }
  513. }
  514. };
  515. CPU.prototype.reboot_internal = function()
  516. {
  517. this.reset_cpu();
  518. this.fw_value = [];
  519. if(this.devices.virtio)
  520. {
  521. this.devices.virtio.reset();
  522. }
  523. this.load_bios();
  524. };
  525. CPU.prototype.reset_memory = function()
  526. {
  527. this.mem8.fill(0);
  528. };
  529. /** @export */
  530. CPU.prototype.create_memory = function(size)
  531. {
  532. if(size < 1024 * 1024)
  533. {
  534. size = 1024 * 1024;
  535. }
  536. else if((size | 0) < 0)
  537. {
  538. size = Math.pow(2, 31) - MMAP_BLOCK_SIZE;
  539. }
  540. size = ((size - 1) | (MMAP_BLOCK_SIZE - 1)) + 1 | 0;
  541. dbg_assert((size | 0) > 0);
  542. dbg_assert((size & MMAP_BLOCK_SIZE - 1) === 0);
  543. console.assert(this.memory_size[0] === 0, "Expected uninitialised memory");
  544. this.memory_size[0] = size;
  545. const memory_offset = this.allocate_memory(size);
  546. this.mem8 = v86util.view(Uint8Array, this.wasm_memory, memory_offset, size);
  547. this.mem32s = v86util.view(Uint32Array, this.wasm_memory, memory_offset, size >> 2);
  548. };
  549. CPU.prototype.init = function(settings, device_bus)
  550. {
  551. if(typeof settings.log_level === "number")
  552. {
  553. // XXX: Shared between all emulator instances
  554. LOG_LEVEL = settings.log_level;
  555. }
  556. this.create_memory(typeof settings.memory_size === "number" ?
  557. settings.memory_size : 1024 * 1024 * 64);
  558. if(settings.disable_jit)
  559. {
  560. this.set_jit_config(0, 1);
  561. }
  562. settings.cpuid_level && this.set_cpuid_level(settings.cpuid_level);
  563. this.acpi_enabled[0] = +settings.acpi;
  564. this.reset_cpu();
  565. var io = new IO(this);
  566. this.io = io;
  567. this.bios.main = settings.bios;
  568. this.bios.vga = settings.vga_bios;
  569. this.load_bios();
  570. if(settings.bzimage)
  571. {
  572. const { option_rom } = load_kernel(this.mem8, settings.bzimage, settings.initrd, settings.cmdline || "");
  573. if(option_rom)
  574. {
  575. this.option_roms.push(option_rom);
  576. }
  577. }
  578. io.register_read(0xB3, this, function()
  579. {
  580. // seabios smm_relocate_and_restore
  581. dbg_log("port 0xB3 read");
  582. return 0;
  583. });
  584. var a20_byte = 0;
  585. io.register_read(0x92, this, function()
  586. {
  587. return a20_byte;
  588. });
  589. io.register_write(0x92, this, function(out_byte)
  590. {
  591. a20_byte = out_byte;
  592. });
  593. io.register_read(0x511, this, function()
  594. {
  595. // bios config port (used by seabios and kvm-unit-test)
  596. if(this.fw_pointer < this.fw_value.length)
  597. {
  598. return this.fw_value[this.fw_pointer++];
  599. }
  600. else
  601. {
  602. dbg_assert(false, "config port: Read past value");
  603. return 0;
  604. }
  605. });
  606. io.register_write(0x510, this, undefined, function(value)
  607. {
  608. // https://wiki.osdev.org/QEMU_fw_cfg
  609. // https://github.com/qemu/qemu/blob/master/docs/specs/fw_cfg.txt
  610. dbg_log("bios config port, index=" + h(value));
  611. function i32(x)
  612. {
  613. return new Uint8Array(Int32Array.of(x).buffer);
  614. }
  615. function to_be16(x)
  616. {
  617. return x >> 8 | x << 8 & 0xFF00;
  618. }
  619. function to_be32(x)
  620. {
  621. return x << 24 | x << 8 & 0xFF0000 | x >> 8 & 0xFF00 | x >>> 24;
  622. }
  623. this.fw_pointer = 0;
  624. if(value === FW_CFG_SIGNATURE)
  625. {
  626. // Pretend to be qemu (for seabios)
  627. this.fw_value = i32(FW_CFG_SIGNATURE_QEMU);
  628. }
  629. else if(value === FW_CFG_ID)
  630. {
  631. this.fw_value = i32(0);
  632. }
  633. else if(value === FW_CFG_RAM_SIZE)
  634. {
  635. this.fw_value = i32(this.memory_size[0]);
  636. }
  637. else if(value === FW_CFG_NB_CPUS)
  638. {
  639. this.fw_value = i32(1);
  640. }
  641. else if(value === FW_CFG_MAX_CPUS)
  642. {
  643. this.fw_value = i32(1);
  644. }
  645. else if(value === FW_CFG_NUMA)
  646. {
  647. this.fw_value = new Uint8Array(16);
  648. }
  649. else if(value === FW_CFG_FILE_DIR)
  650. {
  651. const buffer_size = 4 + 64 * this.option_roms.length;
  652. const buffer32 = new Int32Array(buffer_size);
  653. const buffer8 = new Uint8Array(buffer32.buffer);
  654. buffer32[0] = to_be32(this.option_roms.length);
  655. for(let i = 0; i < this.option_roms.length; i++)
  656. {
  657. const { name, data } = this.option_roms[i];
  658. const file_struct_ptr = 4 + 64 * i;
  659. dbg_assert(FW_CFG_FILE_START + i < 0x10000);
  660. buffer32[file_struct_ptr + 0 >> 2] = to_be32(data.length);
  661. buffer32[file_struct_ptr + 4 >> 2] = to_be16(FW_CFG_FILE_START + i);
  662. dbg_assert(name.length < 64 - 8);
  663. for(let j = 0; j < name.length; j++)
  664. {
  665. buffer8[file_struct_ptr + 8 + j] = name.charCodeAt(j);
  666. }
  667. }
  668. this.fw_value = buffer8;
  669. }
  670. else if(value >= FW_CFG_CUSTOM_START && value < FW_CFG_FILE_START)
  671. {
  672. this.fw_value = i32(0);
  673. }
  674. else if(value >= FW_CFG_FILE_START && value - FW_CFG_FILE_START < this.option_roms.length)
  675. {
  676. const i = value - FW_CFG_FILE_START;
  677. this.fw_value = this.option_roms[i].data;
  678. }
  679. else
  680. {
  681. dbg_log("Warning: Unimplemented fw index: " + h(value));
  682. this.fw_value = i32(0);
  683. }
  684. });
  685. if(DEBUG)
  686. {
  687. // Avoid logging noisey ports
  688. io.register_write(0x80, this, function(out_byte) {});
  689. io.register_read(0x80, this, function() { return 0xFF; });
  690. io.register_write(0xE9, this, function(out_byte) {});
  691. }
  692. io.register_read(0x20, this, this.port20_read);
  693. io.register_read(0x21, this, this.port21_read);
  694. io.register_read(0xA0, this, this.portA0_read);
  695. io.register_read(0xA1, this, this.portA1_read);
  696. io.register_write(0x20, this, this.port20_write);
  697. io.register_write(0x21, this, this.port21_write);
  698. io.register_write(0xA0, this, this.portA0_write);
  699. io.register_write(0xA1, this, this.portA1_write);
  700. io.register_read(0x4D0, this, this.port4D0_read);
  701. io.register_read(0x4D1, this, this.port4D1_read);
  702. io.register_write(0x4D0, this, this.port4D0_write);
  703. io.register_write(0x4D1, this, this.port4D1_write);
  704. this.devices = {};
  705. // TODO: Make this more configurable
  706. if(settings.load_devices)
  707. {
  708. this.devices.pci = new PCI(this);
  709. if(this.acpi_enabled[0])
  710. {
  711. this.devices.ioapic = new IOAPIC(this);
  712. this.devices.apic = new APIC(this);
  713. this.devices.acpi = new ACPI(this);
  714. }
  715. this.devices.rtc = new RTC(this);
  716. this.fill_cmos(this.devices.rtc, settings);
  717. this.devices.dma = new DMA(this);
  718. this.devices.vga = new VGAScreen(this, device_bus,
  719. settings.vga_memory_size || 8 * 1024 * 1024);
  720. this.devices.ps2 = new PS2(this, device_bus);
  721. this.devices.uart0 = new UART(this, 0x3F8, device_bus);
  722. if(settings.uart1)
  723. {
  724. this.devices.uart1 = new UART(this, 0x2F8, device_bus);
  725. }
  726. if(settings.uart2)
  727. {
  728. this.devices.uart2 = new UART(this, 0x3E8, device_bus);
  729. }
  730. if(settings.uart3)
  731. {
  732. this.devices.uart3 = new UART(this, 0x2E8, device_bus);
  733. }
  734. this.devices.fdc = new FloppyController(this, settings.fda, settings.fdb);
  735. var ide_device_count = 0;
  736. if(settings.hda)
  737. {
  738. this.devices.hda = new IDEDevice(this, settings.hda, settings.hdb, false, ide_device_count++, device_bus);
  739. }
  740. if(settings.cdrom)
  741. {
  742. this.devices.cdrom = new IDEDevice(this, settings.cdrom, undefined, true, ide_device_count++, device_bus);
  743. }
  744. this.devices.pit = new PIT(this, device_bus);
  745. if(settings.enable_ne2k)
  746. {
  747. this.devices.net = new Ne2k(this, device_bus, settings.preserve_mac_from_state_image, settings.mac_address_translation);
  748. }
  749. if(settings.fs9p)
  750. {
  751. this.devices.virtio_9p = new Virtio9p(settings.fs9p, this, device_bus);
  752. }
  753. if(true)
  754. {
  755. this.devices.sb16 = new SB16(this, device_bus);
  756. }
  757. }
  758. if(settings.multiboot)
  759. {
  760. this.load_multiboot(settings.multiboot);
  761. }
  762. if(DEBUG)
  763. {
  764. this.debug.init();
  765. }
  766. };
  767. CPU.prototype.load_multiboot = function(buffer)
  768. {
  769. // https://www.gnu.org/software/grub/manual/multiboot/multiboot.html
  770. dbg_log("Trying multiboot from buffer of size " + buffer.byteLength, LOG_CPU);
  771. const MAGIC = 0x1BADB002;
  772. const ELF_MAGIC = 0x464C457F;
  773. const MULTIBOOT_HEADER_ADDRESS = 0x10000;
  774. const MULTIBOOT_SEARCH_BYTES = 8192;
  775. if(buffer.byteLength < MULTIBOOT_SEARCH_BYTES)
  776. {
  777. var buf32 = new Int32Array(MULTIBOOT_SEARCH_BYTES / 4);
  778. new Uint8Array(buf32.buffer).set(new Uint8Array(buffer));
  779. }
  780. else
  781. {
  782. var buf32 = new Int32Array(buffer, 0, MULTIBOOT_SEARCH_BYTES / 4);
  783. }
  784. for(var offset = 0; offset < MULTIBOOT_SEARCH_BYTES; offset += 4)
  785. {
  786. if(buf32[offset >> 2] === MAGIC)
  787. {
  788. var flags = buf32[offset + 4 >> 2];
  789. var checksum = buf32[offset + 8 >> 2];
  790. var total = MAGIC + flags + checksum | 0;
  791. if(total)
  792. {
  793. dbg_log("Multiboot checksum check failed", LOG_CPU);
  794. continue;
  795. }
  796. }
  797. else
  798. {
  799. continue;
  800. }
  801. dbg_log("Multiboot magic found, flags: " + h(flags >>> 0, 8), LOG_CPU);
  802. dbg_assert((flags & ~MULTIBOOT_HEADER_ADDRESS) === 0, "TODO");
  803. this.reg32[REG_EAX] = 0x2BADB002;
  804. let multiboot_info_addr = 0x7C00;
  805. this.reg32[REG_EBX] = multiboot_info_addr;
  806. this.write32(multiboot_info_addr, 0);
  807. this.cr[0] = 1;
  808. this.protected_mode[0] = +true;
  809. this.flags[0] = FLAGS_DEFAULT;
  810. this.is_32[0] = +true;
  811. this.stack_size_32[0] = +true;
  812. for(var i = 0; i < 6; i++)
  813. {
  814. this.segment_is_null[i] = 0;
  815. this.segment_offsets[i] = 0;
  816. this.segment_limits[i] = 0xFFFFFFFF;
  817. // Value doesn't matter, OS isn't allowed to reload without setting
  818. // up a proper GDT
  819. this.sreg[i] = 0xB002;
  820. }
  821. if(flags & MULTIBOOT_HEADER_ADDRESS)
  822. {
  823. dbg_log("Multiboot specifies its own address table", LOG_CPU);
  824. var header_addr = buf32[offset + 12 >> 2];
  825. var load_addr = buf32[offset + 16 >> 2];
  826. var load_end_addr = buf32[offset + 20 >> 2];
  827. var bss_end_addr = buf32[offset + 24 >> 2];
  828. var entry_addr = buf32[offset + 28 >> 2];
  829. dbg_log("header=" + h(header_addr, 8) +
  830. " load=" + h(load_addr, 8) +
  831. " load_end=" + h(load_end_addr, 8) +
  832. " bss_end=" + h(bss_end_addr, 8) +
  833. " entry=" + h(entry_addr, 8));
  834. dbg_assert(load_addr <= header_addr);
  835. var file_start = offset - (header_addr - load_addr);
  836. if(load_end_addr === 0)
  837. {
  838. var length = undefined;
  839. }
  840. else
  841. {
  842. dbg_assert(load_end_addr >= load_addr);
  843. var length = load_end_addr - load_addr;
  844. }
  845. let blob = new Uint8Array(buffer, file_start, length);
  846. this.write_blob(blob, load_addr);
  847. this.instruction_pointer[0] = this.get_seg_cs() + entry_addr | 0;
  848. }
  849. else if(buf32[0] === ELF_MAGIC)
  850. {
  851. dbg_log("Multiboot image is in elf format", LOG_CPU);
  852. let elf = read_elf(buffer);
  853. this.instruction_pointer[0] = this.get_seg_cs() + elf.header.entry | 0;
  854. for(let program of elf.program_headers)
  855. {
  856. if(program.type === 0)
  857. {
  858. // null
  859. }
  860. else if(program.type === 1)
  861. {
  862. // load
  863. // Since multiboot specifies that paging is disabled,
  864. // virtual and physical address must be equal
  865. dbg_assert(program.paddr === program.vaddr);
  866. dbg_assert(program.filesz <= program.memsz);
  867. if(program.paddr + program.memsz < this.memory_size[0])
  868. {
  869. if(program.filesz) // offset might be outside of buffer if filesz is 0
  870. {
  871. let blob = new Uint8Array(buffer, program.offset, program.filesz);
  872. this.write_blob(blob, program.paddr);
  873. }
  874. }
  875. else
  876. {
  877. dbg_log("Warning: Skipped loading section, paddr=" + h(program.paddr) + " memsz=" + program.memsz, LOG_CPU);
  878. }
  879. }
  880. else if(
  881. program.type === 2 ||
  882. program.type === 3 ||
  883. program.type === 4 ||
  884. program.type === 6 ||
  885. program.type === 0x6474e550 ||
  886. program.type === 0x6474e551 ||
  887. program.type === 0x6474e553)
  888. {
  889. // ignore for now
  890. }
  891. else
  892. {
  893. dbg_assert(false, "unimplemented elf section type: " + h(program.type));
  894. }
  895. }
  896. }
  897. else
  898. {
  899. dbg_assert(false, "Not a bootable multiboot format");
  900. }
  901. // only for kvm-unit-test
  902. this.io.register_write_consecutive(0xF4, this,
  903. function(value)
  904. {
  905. console.log("Test exited with code " + h(value, 2));
  906. throw "HALT";
  907. },
  908. function() {},
  909. function() {},
  910. function() {});
  911. // only for kvm-unit-test
  912. for(let i = 0; i <= 0xF; i++)
  913. {
  914. function handle_write(value)
  915. {
  916. dbg_log("kvm-unit-test: Set irq " + h(i) + " to " + h(value, 2));
  917. if(value)
  918. {
  919. this.device_raise_irq(i);
  920. }
  921. else
  922. {
  923. this.device_lower_irq(i);
  924. }
  925. }
  926. this.io.register_write(0x2000 + i, this, handle_write, handle_write, handle_write);
  927. }
  928. this.update_state_flags();
  929. dbg_log("Starting multiboot kernel at:", LOG_CPU);
  930. this.debug.dump_state();
  931. this.debug.dump_regs();
  932. break;
  933. }
  934. };
  935. CPU.prototype.fill_cmos = function(rtc, settings)
  936. {
  937. var boot_order = settings.boot_order || BOOT_ORDER_CD_FIRST;
  938. // Used by seabios to determine the boot order
  939. // Nibble
  940. // 1: FloppyPrio
  941. // 2: HDPrio
  942. // 3: CDPrio
  943. // 4: BEVPrio
  944. // bootflag 1, high nibble, lowest priority
  945. // Low nibble: Disable floppy signature check (1)
  946. rtc.cmos_write(CMOS_BIOS_BOOTFLAG1 , 1 | boot_order >> 4 & 0xF0);
  947. // bootflag 2, both nibbles, high and middle priority
  948. rtc.cmos_write(CMOS_BIOS_BOOTFLAG2, boot_order & 0xFF);
  949. // 640k or less if less memory is used
  950. rtc.cmos_write(CMOS_MEM_BASE_LOW, 640 & 0xFF);
  951. rtc.cmos_write(CMOS_MEM_BASE_HIGH, 640 >> 8);
  952. var memory_above_1m = 0; // in k
  953. if(this.memory_size[0] >= 1024 * 1024)
  954. {
  955. memory_above_1m = (this.memory_size[0] - 1024 * 1024) >> 10;
  956. memory_above_1m = Math.min(memory_above_1m, 0xFFFF);
  957. }
  958. rtc.cmos_write(CMOS_MEM_OLD_EXT_LOW, memory_above_1m & 0xFF);
  959. rtc.cmos_write(CMOS_MEM_OLD_EXT_HIGH, memory_above_1m >> 8 & 0xFF);
  960. rtc.cmos_write(CMOS_MEM_EXTMEM_LOW, memory_above_1m & 0xFF);
  961. rtc.cmos_write(CMOS_MEM_EXTMEM_HIGH, memory_above_1m >> 8 & 0xFF);
  962. var memory_above_16m = 0; // in 64k blocks
  963. if(this.memory_size[0] >= 16 * 1024 * 1024)
  964. {
  965. memory_above_16m = (this.memory_size[0] - 16 * 1024 * 1024) >> 16;
  966. memory_above_16m = Math.min(memory_above_16m, 0xFFFF);
  967. }
  968. rtc.cmos_write(CMOS_MEM_EXTMEM2_LOW, memory_above_16m & 0xFF);
  969. rtc.cmos_write(CMOS_MEM_EXTMEM2_HIGH, memory_above_16m >> 8 & 0xFF);
  970. // memory above 4G (not supported by this emulator)
  971. rtc.cmos_write(CMOS_MEM_HIGHMEM_LOW, 0);
  972. rtc.cmos_write(CMOS_MEM_HIGHMEM_MID, 0);
  973. rtc.cmos_write(CMOS_MEM_HIGHMEM_HIGH, 0);
  974. rtc.cmos_write(CMOS_EQUIPMENT_INFO, 0x2F);
  975. rtc.cmos_write(CMOS_BIOS_SMP_COUNT, 0);
  976. // Used by bochs BIOS to skip the boot menu delay.
  977. if (settings.fastboot) rtc.cmos_write(0x3f, 0x01);
  978. };
  979. CPU.prototype.load_bios = function()
  980. {
  981. var bios = this.bios.main;
  982. var vga_bios = this.bios.vga;
  983. if(!bios)
  984. {
  985. dbg_log("Warning: No BIOS");
  986. return;
  987. }
  988. // load bios
  989. var data = new Uint8Array(bios),
  990. start = 0x100000 - bios.byteLength;
  991. this.write_blob(data, start);
  992. if(vga_bios)
  993. {
  994. // load vga bios
  995. var vga_bios8 = new Uint8Array(vga_bios);
  996. // older versions of seabios
  997. this.write_blob(vga_bios8, 0xC0000);
  998. // newer versions of seabios (needs to match pci rom address, see vga.js)
  999. this.io.mmap_register(0xFEB00000, 0x100000,
  1000. function(addr)
  1001. {
  1002. addr = (addr - 0xFEB00000) | 0;
  1003. if(addr < vga_bios8.length)
  1004. {
  1005. return vga_bios8[addr];
  1006. }
  1007. else
  1008. {
  1009. return 0;
  1010. }
  1011. },
  1012. function(addr, value)
  1013. {
  1014. dbg_assert(false, "Unexpected write to VGA rom");
  1015. });
  1016. }
  1017. else
  1018. {
  1019. dbg_log("Warning: No VGA BIOS");
  1020. }
  1021. // seabios expects the bios to be mapped to 0xFFF00000 also
  1022. this.io.mmap_register(0xFFF00000, 0x100000,
  1023. function(addr)
  1024. {
  1025. addr &= 0xFFFFF;
  1026. return this.mem8[addr];
  1027. }.bind(this),
  1028. function(addr, value)
  1029. {
  1030. addr &= 0xFFFFF;
  1031. this.mem8[addr] = value;
  1032. }.bind(this));
  1033. };
  1034. CPU.prototype.codegen_finalize = function(wasm_table_index, start, state_flags, ptr, len)
  1035. {
  1036. ptr >>>= 0;
  1037. len >>>= 0;
  1038. dbg_assert(wasm_table_index >= 0 && wasm_table_index < WASM_TABLE_SIZE);
  1039. const code = new Uint8Array(this.wasm_memory.buffer, ptr, len);
  1040. if(DEBUG)
  1041. {
  1042. if(DUMP_GENERATED_WASM && !this.seen_code[start])
  1043. {
  1044. this.debug.dump_wasm(code);
  1045. const DUMP_ASSEMBLY = false;
  1046. if(DUMP_ASSEMBLY)
  1047. {
  1048. let end = 0;
  1049. if((start ^ end) & ~0xFFF)
  1050. {
  1051. dbg_log("truncated disassembly start=" + h(start >>> 0) + " end=" + h(end >>> 0));
  1052. end = (start | 0xFFF) + 1; // until the end of the page
  1053. }
  1054. dbg_assert(end >= start);
  1055. const buffer = new Uint8Array(end - start);
  1056. for(let i = start; i < end; i++)
  1057. {
  1058. buffer[i - start] = this.read8(i);
  1059. }
  1060. this.debug.dump_code(this.is_32[0] ? 1 : 0, buffer, start);
  1061. }
  1062. }
  1063. this.seen_code[start] = (this.seen_code[start] || 0) + 1;
  1064. if(this.test_hook_did_generate_wasm)
  1065. {
  1066. this.test_hook_did_generate_wasm(code);
  1067. }
  1068. }
  1069. const SYNC_COMPILATION = false;
  1070. if(SYNC_COMPILATION)
  1071. {
  1072. const module = new WebAssembly.Module(code);
  1073. const result = new WebAssembly.Instance(module, { "e": this.jit_imports });
  1074. const f = result.exports["f"];
  1075. this.wm.wasm_table.set(wasm_table_index + WASM_TABLE_OFFSET, f);
  1076. this.codegen_finalize_finished(wasm_table_index, start, state_flags);
  1077. if(this.test_hook_did_finalize_wasm)
  1078. {
  1079. this.test_hook_did_finalize_wasm(code);
  1080. }
  1081. return;
  1082. }
  1083. const result = WebAssembly.instantiate(code, { "e": this.jit_imports }).then(result => {
  1084. const f = result.instance.exports["f"];
  1085. this.wm.wasm_table.set(wasm_table_index + WASM_TABLE_OFFSET, f);
  1086. this.codegen_finalize_finished(wasm_table_index, start, state_flags);
  1087. if(this.test_hook_did_finalize_wasm)
  1088. {
  1089. this.test_hook_did_finalize_wasm(code);
  1090. }
  1091. });
  1092. if(DEBUG)
  1093. {
  1094. result.catch(e => {
  1095. console.log(e);
  1096. debugger;
  1097. throw e;
  1098. });
  1099. }
  1100. };
  1101. CPU.prototype.log_uncompiled_code = function(start, end)
  1102. {
  1103. if(!DEBUG || !DUMP_UNCOMPILED_ASSEMBLY)
  1104. {
  1105. return;
  1106. }
  1107. if((this.seen_code_uncompiled[start] || 0) < 100)
  1108. {
  1109. this.seen_code_uncompiled[start] = (this.seen_code_uncompiled[start] || 0) + 1;
  1110. end += 8; // final jump is not included
  1111. if((start ^ end) & ~0xFFF)
  1112. {
  1113. dbg_log("truncated disassembly start=" + h(start >>> 0) + " end=" + h(end >>> 0));
  1114. end = (start | 0xFFF) + 1; // until the end of the page
  1115. }
  1116. if(end < start) end = start;
  1117. dbg_assert(end >= start);
  1118. const buffer = new Uint8Array(end - start);
  1119. for(let i = start; i < end; i++)
  1120. {
  1121. buffer[i - start] = this.read8(i);
  1122. }
  1123. dbg_log("Uncompiled code:");
  1124. this.debug.dump_code(this.is_32[0] ? 1 : 0, buffer, start);
  1125. }
  1126. };
  1127. CPU.prototype.dump_function_code = function(block_ptr, count)
  1128. {
  1129. if(!DEBUG || !DUMP_GENERATED_WASM)
  1130. {
  1131. return;
  1132. }
  1133. const SIZEOF_BASIC_BLOCK_IN_DWORDS = 7;
  1134. const mem32 = new Int32Array(this.wasm_memory.buffer);
  1135. dbg_assert((block_ptr & 3) === 0);
  1136. const is_32 = this.is_32[0];
  1137. for(let i = 0; i < count; i++)
  1138. {
  1139. const struct_start = (block_ptr >> 2) + i * SIZEOF_BASIC_BLOCK_IN_DWORDS;
  1140. const start = mem32[struct_start + 0];
  1141. const end = mem32[struct_start + 1];
  1142. const is_entry_block = mem32[struct_start + 6] & 0xFF00;
  1143. const buffer = new Uint8Array(end - start);
  1144. for(let i = start; i < end; i++)
  1145. {
  1146. buffer[i - start] = this.read8(this.translate_address_system_read(i));
  1147. }
  1148. dbg_log("---" + (is_entry_block ? " entry" : ""));
  1149. this.debug.dump_code(is_32 ? 1 : 0, buffer, start);
  1150. }
  1151. };
  1152. CPU.prototype.run_hardware_timers = function(acpi_enabled, now)
  1153. {
  1154. const pit_time = this.devices.pit.timer(now, false);
  1155. const rtc_time = this.devices.rtc.timer(now, false);
  1156. let acpi_time = 100;
  1157. let apic_time = 100;
  1158. if(acpi_enabled)
  1159. {
  1160. acpi_time = this.devices.acpi.timer(now);
  1161. apic_time = this.devices.apic.timer(now);
  1162. }
  1163. return Math.min(pit_time, rtc_time, acpi_time, apic_time);
  1164. };
  1165. CPU.prototype.device_raise_irq = function(i)
  1166. {
  1167. dbg_assert(arguments.length === 1);
  1168. this.pic_set_irq(i);
  1169. if(this.devices.ioapic)
  1170. {
  1171. this.devices.ioapic.set_irq(i);
  1172. }
  1173. };
  1174. CPU.prototype.device_lower_irq = function(i)
  1175. {
  1176. this.pic_clear_irq(i);
  1177. if(this.devices.ioapic)
  1178. {
  1179. this.devices.ioapic.clear_irq(i);
  1180. }
  1181. };
  1182. // Closure Compiler's way of exporting
  1183. if(typeof window !== "undefined")
  1184. {
  1185. window["CPU"] = CPU;
  1186. }
  1187. else if(typeof module !== "undefined" && typeof module.exports !== "undefined")
  1188. {
  1189. module.exports["CPU"] = CPU;
  1190. }
  1191. else if(typeof importScripts === "function")
  1192. {
  1193. self["CPU"] = CPU;
  1194. }